<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-toradex.git/include/acpi/acrestyp.h, branch v5.0</title>
<subtitle>Linux kernel for Apalis and Colibri modules</subtitle>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/'/>
<entry>
<title>ACPICA: adding SPDX headers</title>
<updated>2018-03-18T18:08:05+00:00</updated>
<author>
<name>Erik Schmauss</name>
<email>erik.schmauss@intel.com</email>
</author>
<published>2018-03-14T23:13:07+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=95857638889aeea1b10a16b55041adf3e3ab84c4'/>
<id>95857638889aeea1b10a16b55041adf3e3ab84c4</id>
<content type='text'>
Signed-off-by: Erik Schmauss &lt;erik.schmauss@intel.com&gt;
Signed-off-by: Rafael J. Wysocki &lt;rafael.j.wysocki@intel.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Signed-off-by: Erik Schmauss &lt;erik.schmauss@intel.com&gt;
Signed-off-by: Rafael J. Wysocki &lt;rafael.j.wysocki@intel.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ACPICA: All acpica: Update copyrights to 2018</title>
<updated>2018-02-06T09:31:20+00:00</updated>
<author>
<name>Bob Moore</name>
<email>robert.moore@intel.com</email>
</author>
<published>2018-01-04T18:06:38+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=da6f8320d58623eae9b6fa2f09b1b4f60a772ce9'/>
<id>da6f8320d58623eae9b6fa2f09b1b4f60a772ce9</id>
<content type='text'>
including tool signons.

Signed-off-by: Bob Moore &lt;robert.moore@intel.com&gt;
Signed-off-by: Erik Schmauss &lt;erik.schmauss@intel.com&gt;
Signed-off-by: Rafael J. Wysocki &lt;rafael.j.wysocki@intel.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
including tool signons.

Signed-off-by: Bob Moore &lt;robert.moore@intel.com&gt;
Signed-off-by: Erik Schmauss &lt;erik.schmauss@intel.com&gt;
Signed-off-by: Rafael J. Wysocki &lt;rafael.j.wysocki@intel.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ACPICA: Divergences: reduce access size definitions</title>
<updated>2017-08-03T21:34:15+00:00</updated>
<author>
<name>Lv Zheng</name>
<email>lv.zheng@intel.com</email>
</author>
<published>2017-08-03T06:26:19+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=4eebedd8f1a6609739c2e9a9b020791b23cbcceb'/>
<id>4eebedd8f1a6609739c2e9a9b020791b23cbcceb</id>
<content type='text'>
ACPICA commit cf27b3c98883d2a15d932016792fcb8272ace96d

The following commit introduces definition of access width to ACPICA.
  Commit: 2bece49394872d36bbc5767fd643deac05920c55
  Subject: ACPI: SPCR: Use access width to determine mmio usage

Actually the access bit width can be calculated via access width. It
would be better to define a macro calculating bit width rather than
defining fixed values. This patch thus cleans up the definitions to
reduce divergences.

Link: https://github.com/acpica/acpica/commit/cf27b3c9
Signed-off-by: Lv Zheng &lt;lv.zheng@intel.com&gt;
Signed-off-by: Rafael J. Wysocki &lt;rafael.j.wysocki@intel.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
ACPICA commit cf27b3c98883d2a15d932016792fcb8272ace96d

The following commit introduces definition of access width to ACPICA.
  Commit: 2bece49394872d36bbc5767fd643deac05920c55
  Subject: ACPI: SPCR: Use access width to determine mmio usage

Actually the access bit width can be calculated via access width. It
would be better to define a macro calculating bit width rather than
defining fixed values. This patch thus cleans up the definitions to
reduce divergences.

Link: https://github.com/acpica/acpica/commit/cf27b3c9
Signed-off-by: Lv Zheng &lt;lv.zheng@intel.com&gt;
Signed-off-by: Rafael J. Wysocki &lt;rafael.j.wysocki@intel.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branches 'acpi-spcr', 'acpi-osi', 'acpi-bus', 'acpi-scan' and 'acpi-misc'</title>
<updated>2017-07-10T20:46:21+00:00</updated>
<author>
<name>Rafael J. Wysocki</name>
<email>rafael.j.wysocki@intel.com</email>
</author>
<published>2017-07-10T20:46:21+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=f19e80b394808ed763e2669b08aea480adcc46be'/>
<id>f19e80b394808ed763e2669b08aea480adcc46be</id>
<content type='text'>
* acpi-spcr:
  ACPI: SPCR: Workaround for APM X-Gene 8250 UART 32-alignment errata
  ACPI: SPCR: Use access width to determine mmio usage

* acpi-osi:
  ACPI / osi: Make local function acpi_osi_dmi_linux() static

* acpi-bus:
  ACPI / bus: handle ACPI hotplug schedule errors completely

* acpi-scan:
  ACPI / scan: Indicate to platform when hot remove returns busy

* acpi-misc:
  ACPI / DPTF: constify attribute_group structures
  ACPI / LPSS: constify attribute_group structures
  ACPI: BGRT: constify attribute_group structures
  ACPI / power: constify attribute_group structures
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
* acpi-spcr:
  ACPI: SPCR: Workaround for APM X-Gene 8250 UART 32-alignment errata
  ACPI: SPCR: Use access width to determine mmio usage

* acpi-osi:
  ACPI / osi: Make local function acpi_osi_dmi_linux() static

* acpi-bus:
  ACPI / bus: handle ACPI hotplug schedule errors completely

* acpi-scan:
  ACPI / scan: Indicate to platform when hot remove returns busy

* acpi-misc:
  ACPI / DPTF: constify attribute_group structures
  ACPI / LPSS: constify attribute_group structures
  ACPI: BGRT: constify attribute_group structures
  ACPI / power: constify attribute_group structures
</pre>
</div>
</content>
</entry>
<entry>
<title>ACPI: SPCR: Use access width to determine mmio usage</title>
<updated>2017-07-04T19:29:38+00:00</updated>
<author>
<name>Loc Ho</name>
<email>lho@apm.com</email>
</author>
<published>2017-07-03T21:33:08+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=2bece49394872d36bbc5767fd643deac05920c55'/>
<id>2bece49394872d36bbc5767fd643deac05920c55</id>
<content type='text'>
The current SPCR code does not check the access width of the MMIO, and
uses a default of 8bit register accesses.  This prevents devices that
only do 16 or 32bit register accesses from working.  By simply checking
this field and setting the MMIO string appropriately, this issue can be
corrected.  To prevent any legacy issues, the code will default to 8bit
accesses if the value is anything but 16 or 32.

Signed-off-by: Jon Mason &lt;jon.mason@broadcom.com&gt;
Signed-off-by: Loc Ho &lt;lho@apm.com&gt;
Acked-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
Signed-off-by: Rafael J. Wysocki &lt;rafael.j.wysocki@intel.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The current SPCR code does not check the access width of the MMIO, and
uses a default of 8bit register accesses.  This prevents devices that
only do 16 or 32bit register accesses from working.  By simply checking
this field and setting the MMIO string appropriately, this issue can be
corrected.  To prevent any legacy issues, the code will default to 8bit
accesses if the value is anything but 16 or 32.

Signed-off-by: Jon Mason &lt;jon.mason@broadcom.com&gt;
Signed-off-by: Loc Ho &lt;lho@apm.com&gt;
Acked-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
Signed-off-by: Rafael J. Wysocki &lt;rafael.j.wysocki@intel.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ACPICA: ACPI 6.2: Add support for PinGroupConfig() resource</title>
<updated>2017-06-12T12:58:40+00:00</updated>
<author>
<name>Mika Westerberg</name>
<email>mika.westerberg@linux.intel.com</email>
</author>
<published>2017-06-05T08:39:37+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=044b72395194965069da098d729110446855bb4d'/>
<id>044b72395194965069da098d729110446855bb4d</id>
<content type='text'>
ACPICA commit 08b83591c0db751769d61fa889f4f50f575aeffb

PinGroupConfig() is analogous to PinGroupFunction() but instead of mode
(muxing), it is used to apply specific fine-grained configuration to a
set of referenced pins.

The format of this new resource is:

  PinGroupConfig (Shared/Exclusive, PinConfigType, PinConfigValue,
                  ResourceSource, ResourceSourceIndex, ResourceSourceLabel,
                  ResourceUsage, DescriptorName, VendorData)

The PinConfigType/PinConfigValue are the same used by PinConfig()
resource.

Here also the combination of ResourceSource and ResourceSourceLabel is
used to specify the PinGroup() this resource refers to.

Link: https://github.com/acpica/acpica/commit/08b83591
Signed-off-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
Signed-off-by: Lv Zheng &lt;lv.zheng@intel.com&gt;
Signed-off-by: Bob Moore &lt;robert.moore@intel.com&gt;
Signed-off-by: Rafael J. Wysocki &lt;rafael.j.wysocki@intel.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
ACPICA commit 08b83591c0db751769d61fa889f4f50f575aeffb

PinGroupConfig() is analogous to PinGroupFunction() but instead of mode
(muxing), it is used to apply specific fine-grained configuration to a
set of referenced pins.

The format of this new resource is:

  PinGroupConfig (Shared/Exclusive, PinConfigType, PinConfigValue,
                  ResourceSource, ResourceSourceIndex, ResourceSourceLabel,
                  ResourceUsage, DescriptorName, VendorData)

The PinConfigType/PinConfigValue are the same used by PinConfig()
resource.

Here also the combination of ResourceSource and ResourceSourceLabel is
used to specify the PinGroup() this resource refers to.

Link: https://github.com/acpica/acpica/commit/08b83591
Signed-off-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
Signed-off-by: Lv Zheng &lt;lv.zheng@intel.com&gt;
Signed-off-by: Bob Moore &lt;robert.moore@intel.com&gt;
Signed-off-by: Rafael J. Wysocki &lt;rafael.j.wysocki@intel.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ACPICA: ACPI 6.2: Add support for PinGroupFunction() resource</title>
<updated>2017-06-12T12:58:39+00:00</updated>
<author>
<name>Mika Westerberg</name>
<email>mika.westerberg@linux.intel.com</email>
</author>
<published>2017-06-05T08:39:31+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=f8a6c86644f6e07af0ac4e89adb4db29a640e40f'/>
<id>f8a6c86644f6e07af0ac4e89adb4db29a640e40f</id>
<content type='text'>
ACPICA commit bd9a745749eac7137cd23085e6bdeb322de14ea2

PinGroupFunction() is a new resource introduced with ACPI 6.2. It is
used with PinGroup() to configure specific mode for a set of pins
exposed by a GPIO controller.

The format of the resource is:

  PinGroupFunction (Shared/Exclusive, FunctionNumber, ResourceSource,
                    ResourceSourceIndex, ResourceSourceLabel,
                    ResourceUsage, DescriptorName, VendorData)

The resource_source and ResourceSourceLabel fields are used to specify
the PinGroup() resource referenced by PinGroupFunction().

  Device (GPIO)
  {
      Name (_CRS, ResourceTemplate () {
          PinGroup ("group1") {2, 3}
          PinGroup ("group2") {4, 5}
          ...
      })
  }

  Device (I2C)
  {
      Name (_CRS, ResourceTemplate () {
          PinGroupFunction (Exclusive, 6, "^GPIO", 0, "mygroup2")
      })
  }

In the above example the PinGroupFunction() references the second
PinGroup() resource (using label "mygroup2" and configures pins 4 and 5
into mode 6.

Link: https://github.com/acpica/acpica/commit/bd9a7457
Signed-off-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
Signed-off-by: Lv Zheng &lt;lv.zheng@intel.com&gt;
Signed-off-by: Bob Moore &lt;robert.moore@intel.com&gt;
Signed-off-by: Rafael J. Wysocki &lt;rafael.j.wysocki@intel.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
ACPICA commit bd9a745749eac7137cd23085e6bdeb322de14ea2

PinGroupFunction() is a new resource introduced with ACPI 6.2. It is
used with PinGroup() to configure specific mode for a set of pins
exposed by a GPIO controller.

The format of the resource is:

  PinGroupFunction (Shared/Exclusive, FunctionNumber, ResourceSource,
                    ResourceSourceIndex, ResourceSourceLabel,
                    ResourceUsage, DescriptorName, VendorData)

The resource_source and ResourceSourceLabel fields are used to specify
the PinGroup() resource referenced by PinGroupFunction().

  Device (GPIO)
  {
      Name (_CRS, ResourceTemplate () {
          PinGroup ("group1") {2, 3}
          PinGroup ("group2") {4, 5}
          ...
      })
  }

  Device (I2C)
  {
      Name (_CRS, ResourceTemplate () {
          PinGroupFunction (Exclusive, 6, "^GPIO", 0, "mygroup2")
      })
  }

In the above example the PinGroupFunction() references the second
PinGroup() resource (using label "mygroup2" and configures pins 4 and 5
into mode 6.

Link: https://github.com/acpica/acpica/commit/bd9a7457
Signed-off-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
Signed-off-by: Lv Zheng &lt;lv.zheng@intel.com&gt;
Signed-off-by: Bob Moore &lt;robert.moore@intel.com&gt;
Signed-off-by: Rafael J. Wysocki &lt;rafael.j.wysocki@intel.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ACPICA: ACPI 6.2: Add support for PinGroup() resource</title>
<updated>2017-06-12T12:58:39+00:00</updated>
<author>
<name>Mika Westerberg</name>
<email>mika.westerberg@linux.intel.com</email>
</author>
<published>2017-06-05T08:39:25+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=fdaa0980772cb05b53e7f544d513e3445f3f1021'/>
<id>fdaa0980772cb05b53e7f544d513e3445f3f1021</id>
<content type='text'>
ACPICA commit 7d928e3174fb19d7dc0066b03c30bea07c001563

ACPI 6.2 introduced a new resource that is used to declare set of pins
belonging to a GPIO controller. This resource is referenced by new
PinGroupFunction() and PinGroupConfig() resources using ResourceSource
and ResourceLabel fields.

The PinGroup() resource looks like this:

  PinGroup (ResourceLabel, ResourceUsage, DescriptorName,
            VendorData) {Pin List}

This resource should be listed in _CRS under the GPIO/pincontroller
device providing these pins.

Link: https://github.com/acpica/acpica/commit/7d928e31
Signed-off-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
Signed-off-by: Lv Zheng &lt;lv.zheng@intel.com&gt;
Signed-off-by: Bob Moore &lt;robert.moore@intel.com&gt;
Signed-off-by: Rafael J. Wysocki &lt;rafael.j.wysocki@intel.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
ACPICA commit 7d928e3174fb19d7dc0066b03c30bea07c001563

ACPI 6.2 introduced a new resource that is used to declare set of pins
belonging to a GPIO controller. This resource is referenced by new
PinGroupFunction() and PinGroupConfig() resources using ResourceSource
and ResourceLabel fields.

The PinGroup() resource looks like this:

  PinGroup (ResourceLabel, ResourceUsage, DescriptorName,
            VendorData) {Pin List}

This resource should be listed in _CRS under the GPIO/pincontroller
device providing these pins.

Link: https://github.com/acpica/acpica/commit/7d928e31
Signed-off-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
Signed-off-by: Lv Zheng &lt;lv.zheng@intel.com&gt;
Signed-off-by: Bob Moore &lt;robert.moore@intel.com&gt;
Signed-off-by: Rafael J. Wysocki &lt;rafael.j.wysocki@intel.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ACPICA: ACPI 6.2: Add support for PinConfig() resource</title>
<updated>2017-06-12T12:58:39+00:00</updated>
<author>
<name>Mika Westerberg</name>
<email>mika.westerberg@linux.intel.com</email>
</author>
<published>2017-06-05T08:39:19+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=97028ce6fca0fec53ee71e2fd5acfb2dc8430f1f'/>
<id>97028ce6fca0fec53ee71e2fd5acfb2dc8430f1f</id>
<content type='text'>
ACPICA commit a06fdba686cefccd5dd5b93b52fa0f1e3f984906

ACPI 6.2 introduced a new resource that is used to specify fine-grained
configuration of a pin or set of pins used by a device. The ASL syntax of
this new resource looks like:

  PinConfig (Shared/Exclusive, PinConfigType, PinConfigValue,
             ResourceSource, ResourceSourceIndex, ResourceUsage,
             DescriptorName, Vendordata) {Pin List}

PinConfigType is an integer with following accepted values:

  0x00 (Default) - No configuration is applied to the pin
  0x01 (Bias Pull-up) - Pin is pulled up using certain size resistor
  0x02 (Bias Pull-down) - Pin is pulled down using certain size resistor
  0x03 (Bias Default) - Set to default biasing
  0x04 (Bias Disable) - All bias settings will be disabled
  0x05 (Bias High Impedance) - Configure the pin as hi_z
  0x06 (Bias Bus Hold) - Configure the pin in a weak latch state where
                         it drives the last value on a tristate bus
  0x07 (Drive Open Drain) - Configure the pin into open drain state
  0x08 (Drive Open Source) - Configure the pin into open source state
  0x09 (Drive Push Pull) - Configure the pin into push-pull state
  0x0a (Drive Strength) - How much the pin can supply current
  0x0b (Slew Rate) - Configure slew rate of the pin
  0x0c (Input Debounce) - Enable input debouncer for the pin
  0x0d (Input Schmitt Trigger) - Enable schmitt trigger for the pin
  0x0e - 0x7f - Reserved
  0x80 - 0xff - Vendor defined types

The PinConfigValue depends on the type and is expressed as units
suitable for that type (for example bias uses Ohms).

Link: https://github.com/acpica/acpica/commit/a06fdba6
Signed-off-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
Signed-off-by: Lv Zheng &lt;lv.zheng@intel.com&gt;
Signed-off-by: Bob Moore &lt;robert.moore@intel.com&gt;
Signed-off-by: Rafael J. Wysocki &lt;rafael.j.wysocki@intel.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
ACPICA commit a06fdba686cefccd5dd5b93b52fa0f1e3f984906

ACPI 6.2 introduced a new resource that is used to specify fine-grained
configuration of a pin or set of pins used by a device. The ASL syntax of
this new resource looks like:

  PinConfig (Shared/Exclusive, PinConfigType, PinConfigValue,
             ResourceSource, ResourceSourceIndex, ResourceUsage,
             DescriptorName, Vendordata) {Pin List}

PinConfigType is an integer with following accepted values:

  0x00 (Default) - No configuration is applied to the pin
  0x01 (Bias Pull-up) - Pin is pulled up using certain size resistor
  0x02 (Bias Pull-down) - Pin is pulled down using certain size resistor
  0x03 (Bias Default) - Set to default biasing
  0x04 (Bias Disable) - All bias settings will be disabled
  0x05 (Bias High Impedance) - Configure the pin as hi_z
  0x06 (Bias Bus Hold) - Configure the pin in a weak latch state where
                         it drives the last value on a tristate bus
  0x07 (Drive Open Drain) - Configure the pin into open drain state
  0x08 (Drive Open Source) - Configure the pin into open source state
  0x09 (Drive Push Pull) - Configure the pin into push-pull state
  0x0a (Drive Strength) - How much the pin can supply current
  0x0b (Slew Rate) - Configure slew rate of the pin
  0x0c (Input Debounce) - Enable input debouncer for the pin
  0x0d (Input Schmitt Trigger) - Enable schmitt trigger for the pin
  0x0e - 0x7f - Reserved
  0x80 - 0xff - Vendor defined types

The PinConfigValue depends on the type and is expressed as units
suitable for that type (for example bias uses Ohms).

Link: https://github.com/acpica/acpica/commit/a06fdba6
Signed-off-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
Signed-off-by: Lv Zheng &lt;lv.zheng@intel.com&gt;
Signed-off-by: Bob Moore &lt;robert.moore@intel.com&gt;
Signed-off-by: Rafael J. Wysocki &lt;rafael.j.wysocki@intel.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ACPICA: ACPI 6.2: Add support for PinFunction() resource</title>
<updated>2017-06-12T12:58:39+00:00</updated>
<author>
<name>Mika Westerberg</name>
<email>mika.westerberg@linux.intel.com</email>
</author>
<published>2017-06-05T08:39:14+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=2b72693066a867ac073a657e871bb64391b4ffdb'/>
<id>2b72693066a867ac073a657e871bb64391b4ffdb</id>
<content type='text'>
ACPICA commit 6bbc6357f7061f1243601adde0ea45f7a89274e0

ACPI 6.2 introduced a new resource that is used to describe how certain
pins are muxed for a device. The ASL syntax of this new resource looks
like below:

  PinFunction(Shared, PinConfig, FunctionNumber, ResourceSource,
              ResourceSourceIndex, ResourceUsage, DescriptorName,
              VendorData) {Pin List}

Which is pretty similar to GpioIo()/GpioInt() resources.

Teach ACPICA about this new resource.

Link: https://github.com/acpica/acpica/commit/6bbc6357
Signed-off-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
Signed-off-by: Lv Zheng &lt;lv.zheng@intel.com&gt;
Signed-off-by: Bob Moore &lt;robert.moore@intel.com&gt;
Signed-off-by: Rafael J. Wysocki &lt;rafael.j.wysocki@intel.com&gt;
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ACPICA commit 6bbc6357f7061f1243601adde0ea45f7a89274e0

ACPI 6.2 introduced a new resource that is used to describe how certain
pins are muxed for a device. The ASL syntax of this new resource looks
like below:

  PinFunction(Shared, PinConfig, FunctionNumber, ResourceSource,
              ResourceSourceIndex, ResourceUsage, DescriptorName,
              VendorData) {Pin List}

Which is pretty similar to GpioIo()/GpioInt() resources.

Teach ACPICA about this new resource.

Link: https://github.com/acpica/acpica/commit/6bbc6357
Signed-off-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
Signed-off-by: Lv Zheng &lt;lv.zheng@intel.com&gt;
Signed-off-by: Bob Moore &lt;robert.moore@intel.com&gt;
Signed-off-by: Rafael J. Wysocki &lt;rafael.j.wysocki@intel.com&gt;
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