<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-toradex.git/include/asm-arm, branch v2.6.22.7</title>
<subtitle>Linux kernel for Apalis and Colibri modules</subtitle>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/'/>
<entry>
<title>Introduce fixed sys_sync_file_range2() syscall, implement on PowerPC and ARM</title>
<updated>2007-06-28T18:38:30+00:00</updated>
<author>
<name>David Woodhouse</name>
<email>dwmw2@infradead.org</email>
</author>
<published>2007-06-27T21:10:09+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=edd5cd4a9424f22b0fa08bef5e299d41befd5622'/>
<id>edd5cd4a9424f22b0fa08bef5e299d41befd5622</id>
<content type='text'>
Not all the world is an i386.  Many architectures need 64-bit arguments to be
aligned in suitable pairs of registers, and the original
sys_sync_file_range(int, loff_t, loff_t, int) was therefore wasting an
argument register for padding after the first integer.  Since we don't
normally have more than 6 arguments for system calls, that left no room for
the final argument on some architectures.

Fix this by introducing sys_sync_file_range2(int, int, loff_t, loff_t) which
all fits nicely.  In fact, ARM already had that, but called it
sys_arm_sync_file_range.  Move it to fs/sync.c and rename it, then implement
the needed compatibility routine.  And stop the missing syscall check from
bitching about the absence of sys_sync_file_range() if we've implemented
sys_sync_file_range2() instead.

Tested on PPC32 and with 32-bit and 64-bit userspace on PPC64.

Signed-off-by: David Woodhouse &lt;dwmw2@infradead.org&gt;
Acked-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
Cc: Arnd Bergmann &lt;arnd@arndb.de&gt;
Cc: Paul Mackerras &lt;paulus@samba.org&gt;
Signed-off-by: Andrew Morton &lt;akpm@linux-foundation.org&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Not all the world is an i386.  Many architectures need 64-bit arguments to be
aligned in suitable pairs of registers, and the original
sys_sync_file_range(int, loff_t, loff_t, int) was therefore wasting an
argument register for padding after the first integer.  Since we don't
normally have more than 6 arguments for system calls, that left no room for
the final argument on some architectures.

Fix this by introducing sys_sync_file_range2(int, int, loff_t, loff_t) which
all fits nicely.  In fact, ARM already had that, but called it
sys_arm_sync_file_range.  Move it to fs/sync.c and rename it, then implement
the needed compatibility routine.  And stop the missing syscall check from
bitching about the absence of sys_sync_file_range() if we've implemented
sys_sync_file_range2() instead.

Tested on PPC32 and with 32-bit and 64-bit userspace on PPC64.

Signed-off-by: David Woodhouse &lt;dwmw2@infradead.org&gt;
Acked-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
Cc: Arnd Bergmann &lt;arnd@arndb.de&gt;
Cc: Paul Mackerras &lt;paulus@samba.org&gt;
Signed-off-by: Andrew Morton &lt;akpm@linux-foundation.org&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[ARM] Update show_regs/oops register format</title>
<updated>2007-06-18T14:04:42+00:00</updated>
<author>
<name>Russell King</name>
<email>rmk@dyn-67.arm.linux.org.uk</email>
</author>
<published>2007-06-18T13:59:45+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=154c772ebfb12ef66855510e6be2b12c85110b0c'/>
<id>154c772ebfb12ef66855510e6be2b12c85110b0c</id>
<content type='text'>
Add the kernel release and version information to the output of
show_regs/oops.  Add the CPU PSR register.  Avoid using printk
to output partial lines; always output a complete line.

Re-combine the "Control" and "Table + DAC" lines after nommu
separated them; we don't want to waste vertical screen space
needlessly.

Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add the kernel release and version information to the output of
show_regs/oops.  Add the CPU PSR register.  Avoid using printk
to output partial lines; always output a complete line.

Re-combine the "Control" and "Table + DAC" lines after nommu
separated them; we don't want to waste vertical screen space
needlessly.

Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[ARM] 4445/1: ANUBIS: Fix CPLD registers</title>
<updated>2007-06-11T08:09:34+00:00</updated>
<author>
<name>Ben Dooks</name>
<email>ben-linux@fluff.org</email>
</author>
<published>2007-06-06T09:01:04+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=6c1640d52b9b7355cd777c4f08bc930ac96d905b'/>
<id>6c1640d52b9b7355cd777c4f08bc930ac96d905b</id>
<content type='text'>
Update the ANUBIS register definitions inline with the
specs and ensure they are registered correctly.

Signed-off-by: Ben Dooks &lt;ben-linux@fluff.org&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Update the ANUBIS register definitions inline with the
specs and ensure they are registered correctly.

Signed-off-by: Ben Dooks &lt;ben-linux@fluff.org&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[ARM] 4444/2: OSIRIS: CPLD suspend fix</title>
<updated>2007-06-11T08:09:31+00:00</updated>
<author>
<name>Ben Dooks</name>
<email>ben-linux@fluff.org</email>
</author>
<published>2007-06-06T09:36:09+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=5698bd28c67775c722dc1f4ab82e0041c1c740ea'/>
<id>5698bd28c67775c722dc1f4ab82e0041c1c740ea</id>
<content type='text'>
Ensure the CPLD 8bit settings are preserved over a suspend/resume
cycle as the CPU sends a hard-reset at resume time.

Signed-off-by: Ben Dooks &lt;ben-linux@fluff.org&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Ensure the CPLD 8bit settings are preserved over a suspend/resume
cycle as the CPU sends a hard-reset at resume time.

Signed-off-by: Ben Dooks &lt;ben-linux@fluff.org&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[ARM] 4442/1: OSIRIS: Fix CPLD register definitions</title>
<updated>2007-06-11T08:09:15+00:00</updated>
<author>
<name>Ben Dooks</name>
<email>ben-linux@fluff.org</email>
</author>
<published>2007-06-06T08:51:51+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=c362aecdb51ecb364d427a9b947fd2dfbd4cb86a'/>
<id>c362aecdb51ecb364d427a9b947fd2dfbd4cb86a</id>
<content type='text'>
Fix the CPLD register definitions to correctly mirror the
documentation

Signed-off-by: Ben Dooks &lt;ben-linux@fluff.org&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Fix the CPLD register definitions to correctly mirror the
documentation

Signed-off-by: Ben Dooks &lt;ben-linux@fluff.org&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[ARM] VFP: fix section mismatch error</title>
<updated>2007-06-10T11:22:20+00:00</updated>
<author>
<name>Russell King</name>
<email>rmk@dyn-67.arm.linux.org.uk</email>
</author>
<published>2007-06-10T11:22:20+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=5d4cae5fe2ea1a0974962e2c49dca5c9c4b14cc0'/>
<id>5d4cae5fe2ea1a0974962e2c49dca5c9c4b14cc0</id>
<content type='text'>
Fix a real section mismatch issue; the test code is thrown away after
initialisation, but if we do not detect the VFP hardware, it is left
hooked into the exception handler.  Any VFP instructions which are
subsequently executed risk calling the discarded exception handler.

Introduce a new "null" handler which returns to the "unrecognised
fault" return address.

Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Fix a real section mismatch issue; the test code is thrown away after
initialisation, but if we do not detect the VFP hardware, it is left
hooked into the exception handler.  Any VFP instructions which are
subsequently executed risk calling the discarded exception handler.

Introduce a new "null" handler which returns to the "unrecognised
fault" return address.

Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[ARM] 4421/1: AT91: Value of _KEY fields.</title>
<updated>2007-06-03T16:52:35+00:00</updated>
<author>
<name>Andrew Victor</name>
<email>andrew@sanpeople.com</email>
</author>
<published>2007-05-31T09:16:00+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=0e5f82dda5e60a21cf8ba4f77334d60290277d2c'/>
<id>0e5f82dda5e60a21cf8ba4f77334d60290277d2c</id>
<content type='text'>
Use the actual value (0xA5) for the AT91_SHDW_KEY and AT91_WDT_KEY
register fields instead of a bitmask.

This is consistent with how AT91_RSTC_KEY is defined, and is easier to
use in code.

Signed-off-by: Andrew Victor &lt;andrew@sanpeople.com&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Use the actual value (0xA5) for the AT91_SHDW_KEY and AT91_WDT_KEY
register fields instead of a bitmask.

This is consistent with how AT91_RSTC_KEY is defined, and is easier to
use in code.

Signed-off-by: Andrew Victor &lt;andrew@sanpeople.com&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[ARM] 4422/1: Fix default value handling in gpio_direction_output (PXA)</title>
<updated>2007-06-02T20:31:48+00:00</updated>
<author>
<name>Bill Gatliff</name>
<email>bgat@billgatliff.com</email>
</author>
<published>2007-05-31T15:17:16+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=29c349d22ccda5678a7dfb732093dbd3befcefa3'/>
<id>29c349d22ccda5678a7dfb732093dbd3befcefa3</id>
<content type='text'>
The default value passed through to pxa_gpio_mode() is lost
due to a missing GPIO_DFLT_HIGH mask for nonzero values.  The enclosed
patch fixes this programming error.

Signed-off-by: Bill Gatliff &lt;bgat@billgatliff.com&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The default value passed through to pxa_gpio_mode() is lost
due to a missing GPIO_DFLT_HIGH mask for nonzero values.  The enclosed
patch fixes this programming error.

Signed-off-by: Bill Gatliff &lt;bgat@billgatliff.com&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[ARM] 4394/1: ARMv7: Add the TLB range operations</title>
<updated>2007-05-30T13:32:07+00:00</updated>
<author>
<name>Catalin Marinas</name>
<email>catalin.marinas@arm.com</email>
</author>
<published>2007-05-18T10:25:31+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=2ccdd1e77da52ad494e9af46bf272d816830cb28'/>
<id>2ccdd1e77da52ad494e9af46bf272d816830cb28</id>
<content type='text'>
We are currently using the ARMv6 operations but need to duplicate some
of the code because of the introduction of the new CPU barrier
instructions in ARMv7.

Signed-off-by: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
We are currently using the ARMv6 operations but need to duplicate some
of the code because of the introduction of the new CPU barrier
instructions in ARMv7.

Signed-off-by: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[ARM] 4412/1: S3C2412: reset errata fix</title>
<updated>2007-05-30T12:15:23+00:00</updated>
<author>
<name>Ben Dooks</name>
<email>ben-linux@fluff.org</email>
</author>
<published>2007-05-28T17:19:16+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=eca8c2424171b6b6b2dcb0faa92dfddd1e3297d9'/>
<id>eca8c2424171b6b6b2dcb0faa92dfddd1e3297d9</id>
<content type='text'>
The S3C2412 has an reset-errata where the clock
may cause a glitch switching back to EXTCLK. We
force a switch to EXTCLK before writing the
reset register to force use of the CLKCON sync
logic to properly switch.

Fix problem reported by Matthieu Castet.

Signed-off-by: Ben Dooks &lt;ben-linux@fluff.org&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The S3C2412 has an reset-errata where the clock
may cause a glitch switching back to EXTCLK. We
force a switch to EXTCLK before writing the
reset register to force use of the CLKCON sync
logic to properly switch.

Fix problem reported by Matthieu Castet.

Signed-off-by: Ben Dooks &lt;ben-linux@fluff.org&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</pre>
</div>
</content>
</entry>
</feed>
