<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-toradex.git/include/asm-mips/cpu-features.h, branch v2.6.19.2</title>
<subtitle>Linux kernel for Apalis and Colibri modules</subtitle>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/'/>
<entry>
<title>[MIPS] Use the proper technical term for naming some of the cache  macros.</title>
<updated>2006-07-13T20:26:04+00:00</updated>
<author>
<name>Ralf Baechle</name>
<email>ralf@linux-mips.org</email>
</author>
<published>2006-07-06T12:04:01+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=fc5d2d279ff820172a698706d33e733d4578bd6c'/>
<id>fc5d2d279ff820172a698706d33e733d4578bd6c</id>
<content type='text'>
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[MIPS] Default cpu_has_mipsmt to a runtime check</title>
<updated>2006-07-13T20:25:58+00:00</updated>
<author>
<name>Chris Dearman</name>
<email>chris@mips.com</email>
</author>
<published>2006-06-30T11:32:37+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=2e128dedcd66d2f17f42a45dacc223fa2dcd8acd'/>
<id>2e128dedcd66d2f17f42a45dacc223fa2dcd8acd</id>
<content type='text'>
Signed-off-by: Chris Dearman &lt;chris@mips.com&gt;
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Signed-off-by: Chris Dearman &lt;chris@mips.com&gt;
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[MIPS] Fix configuration of R2 CPU features and multithreading.</title>
<updated>2006-06-29T20:10:51+00:00</updated>
<author>
<name>Ralf Baechle</name>
<email>ralf@linux-mips.org</email>
</author>
<published>2006-06-05T16:24:46+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=f41ae0b2b9e5b4455cfc68dcc885f4fa2a973384'/>
<id>f41ae0b2b9e5b4455cfc68dcc885f4fa2a973384</id>
<content type='text'>
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Don't include linux/config.h from anywhere else in include/</title>
<updated>2006-04-26T11:56:16+00:00</updated>
<author>
<name>David Woodhouse</name>
<email>dwmw2@infradead.org</email>
</author>
<published>2006-04-26T11:56:16+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=62c4f0a2d5a188f73a94f2cb8ea0dba3e7cf0a7f'/>
<id>62c4f0a2d5a188f73a94f2cb8ea0dba3e7cf0a7f</id>
<content type='text'>
Signed-off-by: David Woodhouse &lt;dwmw2@infradead.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Signed-off-by: David Woodhouse &lt;dwmw2@infradead.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[MIPS] FPU affinity for MT ASE.</title>
<updated>2006-04-19T02:14:28+00:00</updated>
<author>
<name>Ralf Baechle</name>
<email>ralf@linux-mips.org</email>
</author>
<published>2006-04-05T08:45:47+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=f088fc84f94c1a36943e28ad704a9a740a35f877'/>
<id>f088fc84f94c1a36943e28ad704a9a740a35f877</id>
<content type='text'>
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[MIPS] local_r4k_flush_cache_page fix</title>
<updated>2006-03-18T16:59:27+00:00</updated>
<author>
<name>Atsushi Nemoto</name>
<email>anemo@mba.ocn.ne.jp</email>
</author>
<published>2006-03-13T09:23:03+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=de62893bc0725f8b5f0445250577cd7a10b2d8f8'/>
<id>de62893bc0725f8b5f0445250577cd7a10b2d8f8</id>
<content type='text'>
    
If dcache_size != icache_size or dcache_size != scache_size, or
set-associative cache, icache/scache does not flushed properly.  Make
blast_?cache_page_indexed() masks its index value correctly.  Also,
use physical address for physically indexed pcache/scache.
    
Signed-off-by: Atsushi Nemoto &lt;anemo@mba.ocn.ne.jp&gt;
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
    
If dcache_size != icache_size or dcache_size != scache_size, or
set-associative cache, icache/scache does not flushed properly.  Make
blast_?cache_page_indexed() masks its index value correctly.  Also,
use physical address for physically indexed pcache/scache.
    
Signed-off-by: Atsushi Nemoto &lt;anemo@mba.ocn.ne.jp&gt;
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: Reorganize ISA constants strictly as bitmasks.</title>
<updated>2006-01-10T13:39:07+00:00</updated>
<author>
<name>Ralf Baechle</name>
<email>ralf@ongar.mips.com</email>
</author>
<published>2005-12-09T12:20:49+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=0401572a9b9b2f368176b6e53f53004fd048a566'/>
<id>0401572a9b9b2f368176b6e53f53004fd048a566</id>
<content type='text'>
    
Signed-off-by: Ralf Baechle &lt;ralf@ongar.mips.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
    
Signed-off-by: Ralf Baechle &lt;ralf@ongar.mips.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: Introduce machinery for testing for MIPSxxR1/2.</title>
<updated>2006-01-10T13:39:06+00:00</updated>
<author>
<name>Ralf Baechle</name>
<email>ralf@linux-mips.org</email>
</author>
<published>2005-12-08T14:04:24+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=b4672d37293cb045ec4d57e8b76a62810c96da71'/>
<id>b4672d37293cb045ec4d57e8b76a62810c96da71</id>
<content type='text'>
    
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
    
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Cleanup the mess in cpu_cache_init.</title>
<updated>2005-10-29T18:32:32+00:00</updated>
<author>
<name>Ralf Baechle</name>
<email>ralf@linux-mips.org</email>
</author>
<published>2005-10-01T12:06:32+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=02cf2119684e52e97a8a90bd7630386e0f1a250a'/>
<id>02cf2119684e52e97a8a90bd7630386e0f1a250a</id>
<content type='text'>
    
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
    
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Detect the MIPS R2 vectored interrupt, external interrupt controller</title>
<updated>2005-10-29T18:31:51+00:00</updated>
<author>
<name>Ralf Baechle</name>
<email>ralf@linux-mips.org</email>
</author>
<published>2005-07-14T07:34:18+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=8f40611d2b184ca5d525075d273854929cf8d1d0'/>
<id>8f40611d2b184ca5d525075d273854929cf8d1d0</id>
<content type='text'>
options and the precense of the MT ASE.

Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
options and the precense of the MT ASE.

Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
</feed>
