linux-toradex.git/include/asm-mips/cpu.h, branch v2.6.20.17 Linux kernel for Apalis and Colibri modules [MIPS] Use the proper technical term for naming some of the cache macros. 2006-07-13T20:26:04+00:00 Ralf Baechle ralf@linux-mips.org 2006-07-06T12:04:01+00:00 fc5d2d279ff820172a698706d33e733d4578bd6c Signed-off-by: Ralf Baechle <ralf@linux-mips.org> 
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
[MIPS] Treat R14000 like R10000. 2006-05-31T23:28:35+00:00 Kumba kumba@gentoo.org 2006-05-17T02:23:59+00:00 44d921b246923380f26b8010e47ac5dfe48fcec5 Signed-off-by: Joshua Kinard <kumba@gentoo.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org> 
Signed-off-by: Joshua Kinard <kumba@gentoo.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
[MIPS] Fix detection and handling of the 74K processor. 2006-05-31T23:28:30+00:00 Chris Dearman chris@mips.com 2006-05-02T13:08:46+00:00 c620953c32d301c2a7bc73f9f780301e110b7d7c Nothing exciting; Linux just didn't know it yet so this is most adding a value to a case statement. Signed-off-by: Chris Dearman <chris@mips.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org> 
    
Nothing exciting; Linux just didn't know it yet so this is most adding
a value to a case statement.
    
Signed-off-by: Chris Dearman <chris@mips.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
[MIPS] Fix CPU type bitmasks for MIPS III, IV and V. 2006-02-14T19:13:25+00:00 Maciej W. Rozycki macro@linux-mips.org 2006-02-13T09:15:49+00:00 9cf8ff96447f995d5ea18ec9f25dc8dae26501a2 Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org> 
    
Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
MIPS: Reorganize ISA constants strictly as bitmasks. 2006-01-10T13:39:07+00:00 Ralf Baechle ralf@ongar.mips.com 2005-12-09T12:20:49+00:00 0401572a9b9b2f368176b6e53f53004fd048a566 Signed-off-by: Ralf Baechle <ralf@ongar.mips.com> 
    
Signed-off-by: Ralf Baechle <ralf@ongar.mips.com>
MIPS: Introduce machinery for testing for MIPSxxR1/2. 2006-01-10T13:39:06+00:00 Ralf Baechle ralf@linux-mips.org 2005-12-08T14:04:24+00:00 b4672d37293cb045ec4d57e8b76a62810c96da71 Signed-off-by: Ralf Baechle <ralf@linux-mips.org> 
    
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
MIPS: Rename MIPS_CPU_ISA_M{32,64} -> MIPS_CPU_ISA_M{32,64}R1. 2006-01-10T13:39:06+00:00 Ralf Baechle ralf@linux-mips.org 2005-12-08T13:00:20+00:00 e7958bb90d57f0da073cbd031a1808de51d1de15 Signed-off-by: Ralf Baechle <ralf@linux-mips.org> 
    
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Add support for SB1A CPU. 2005-10-29T18:32:46+00:00 Andrew Isaacson adi@broadcom.com 2005-10-20T06:56:20+00:00 93ce2f524e96571711029884e6340c790a029b94 Signed-Off-By: Andy Isaacson <adi@broadcom.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org> 
    
Signed-Off-By: Andy Isaacson <adi@broadcom.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Cleanup the mess in cpu_cache_init. 2005-10-29T18:32:32+00:00 Ralf Baechle ralf@linux-mips.org 2005-10-01T12:06:32+00:00 02cf2119684e52e97a8a90bd7630386e0f1a250a Signed-off-by: Ralf Baechle <ralf@linux-mips.org> 
    
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Move MIPS Technologies processor IDs to where they belong. 2005-10-29T18:32:16+00:00 Maciej W. Rozycki macro@linux-mips.org 2005-09-05T10:31:27+00:00 98e316d4b151111d5a8ff2b3a684a9300634d83f Signed-off-by: Ralf Baechle <ralf@linux-mips.org> 
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>