linux-toradex.git/include/asm-ppc/io.h, branch v2.6.19.2

[PATCH] Consolidate check_signature

2006-10-11T18:14:23+00:00

There's nothing arch-specific about check_signature(), so move it to
.  Use a cross between the Alpha and i386 implementations as
the generic one.

Signed-off-by: Matthew Wilcox 
Acked-by: Alan Cox 
Signed-off-by: Andrew Morton 
Signed-off-by: Linus Torvalds

[POWERPC] convert string i/o operations to C

2006-09-20T04:06:18+00:00

This produces essentially the same code and will make the iSeries i/o
consolidation easier.

The count parameter is changed to long since that will produce the same
(better) code on 32 and 64 bit builds.

Signed-off-by: Stephen Rothwell

[POWERPC] remove unused asm routines

2006-09-20T04:06:18+00:00

_insw, _outsw, _insl amd _outsl are all unused, so remove them.

Signed-off-by: Stephen Rothwell

[POWERPC] remove unused io accessors

2006-09-20T04:06:17+00:00

The io accessors insw_ns, outsw_ns, insl_ns and outsl_ns are unused
(except for one unnecessary use in drivers/net/3c509.c that is addressed
in a previous patch) and are only defined in powerpc/ppc, so remove them.

Signed-off-by: Stephen Rothwell

[POWERPC] Fix MMIO ops to provide expected barrier behaviour

2006-09-13T12:08:26+00:00

This changes the writeX family of functions to have a sync instruction
before the MMIO store rather than after, because the generally expected
behaviour is that the device receiving the MMIO store can be guaranteed
to see the effects of any preceding writes to normal memory.

To preserve ordering between writeX and readX, and to preserve ordering
between preceding stores and the readX, the readX family of functions
have had an sync added before the load.

Although writeX followed by spin_unlock is not officially guaranteed
to keep the writeX inside the spin-locked region unless an mmiowb()
is used, there are currently drivers that depend on the previous
behaviour on powerpc, which was that the mmiowb wasn't actually required.
Therefore we have a per-cpu flag that is set by writeX, cleared by
__raw_spin_lock and mmiowb, and tested by __raw_spin_unlock.  If it is
set, __raw_spin_unlock does a sync and clears it.

This changes both 32-bit and 64-bit readX/writeX.  32-bit already has a
sync in __raw_spin_unlock (since lwsync doesn't exist on 32-bit), and thus
doesn't need the per-cpu flag.

Tested on G5 (PPC970) and POWER5.

Signed-off-by: Paul Mackerras

Don't include linux/config.h from anywhere else in include/

2006-04-26T11:56:16+00:00

Signed-off-by: David Woodhouse

[PATCH] ppc32 8xx: Added setbitsXX/clrbitsXX macro for read-modify-write operations

2006-01-20T05:13:29+00:00

This adds setbitsXX/clrbitsXX macro for read-modify-write operations
and converts the 8xx core and drivers to use them.

Signed-off-by: Vitaly Bordug 
Signed-off-by: Marcelo Tosatti 
Signed-off-by: Paul Mackerras

[PATCH] ppc32: Allows compilation of a MPC52xx kernel without PCI

2006-01-06T16:33:31+00:00

Some custom cards might not need PCI, without this patch, compilation fails.

Signed-off-by: Roger Blofeld 
Signed-off-by: Sylvain Munaut 
Signed-off-by: Andrew Morton 
Signed-off-by: Linus Torvalds

ppc32: move some dma routines

2005-11-18T14:48:33+00:00

Every other architecture define dma_cache_{inv,wback,wback_inv}
in asm/io.h and doing so brings us closer to ppc64.

Signed-off-by: Stephen Rothwell

[PATCH] ppc32: handle access to non-present IO ports on 8xx

2005-11-07T01:37:12+00:00

This adds exception table entries for I/O instructions on and
changes MachineCheckException() slightly to cover 8xx specifics (on
8xx the MCE can be generated while executing the IO access instruction
itself, which is not the case on PowerMac's, as the comment on traps.c
details).

Signed-off-by: Marcelo Tosatti 
Signed-off-by: Paul Mackerras