linux-toradex.git/include/asm-sh/cpu-sh4, branch v2.6.19.2

sh: SH-4A UBC support

2006-10-12T03:16:13+00:00

A simple patch to enable the UBC on SH-4A.

Signed-off-by: Ryusuke Sakato 
Signed-off-by: Paul Mundt

sh: Kill off more dead headers.

2006-10-03T04:12:38+00:00

Some old rtc and io headers were left hanging around, kill them off..

Signed-off-by: Paul Mundt

sh: Calculate shm alignment at runtime.

2006-09-27T09:36:17+00:00

Set the SHM alignment at runtime, based off of probed cache desc.
Optimize get_unmapped_area() to only colour align shared mappings.

Signed-off-by: Paul Mundt

sh: Add support for R7780RP and R7780MP boards.

2006-09-27T06:59:17+00:00

This adds support for the Renesas SH7780 development boards,
R7780RP and R7780MP.

Signed-off-by: Paul Mundt

sh: Store Queue API rework.

2006-09-27T06:49:57+00:00

Rewrite the store queue API for a per-cpu interface in the driver
model. The old miscdevice is dropped, due to TASK_SIZE limitations,
and no one was using it anyways.

Carve up and allocate store queue space with a bitmap, back sq
mapping objects with a slab cache, and let userspace worry about
its own prefetching.

Signed-off-by: Paul Mundt

sh: Fixup SHMLBA definition for SH7705.

2006-09-27T06:29:18+00:00

We need this set to something sensible anywhere were we have
an aliasing dcache..

Signed-off-by: Paul Mundt

sh: page table alloc cleanups and page fault optimizations.

2006-09-27T06:13:36+00:00

Cleanup of page table allocators, using generic folded PMD and PUD
helpers. TLB flushing operations are moved to a more sensible spot.

The page fault handler is also optimized slightly, we no longer waste
cycles on IRQ disabling for flushing of the page from the ITLB, since
we're already under CLI protection by the initial exception handler.

Signed-off-by: Paul Mundt

sh: Fix fatal oops in copy_user_page() on sh4a (SH7780).

2006-09-27T05:38:02+00:00

We had a pretty interesting oops happening, where copy_user_page()
was down()'ing p3map_sem[] with a bogus offset (particularly, an
offset that hadn't been initialized with sema_init(), due to the
mismatch between cpu_data->dcache.n_aliases and what was assumed
based off of the old CACHE_ALIAS value).

Luckily, spinlock debugging caught this for us, and so we drop
the old hardcoded CACHE_ALIAS for sh4 completely and rely on the
run-time probed cpu_data->dcache.alias_mask. This in turn gets
the p3map_sem[] index right, and everything works again.

While we're at it, also convert to 4-level page tables..

Signed-off-by: Paul Mundt

sh: Support for SH7770/SH7780 CPU subtypes.

2006-09-27T05:31:40+00:00

Merge support for SH7770 and SH7780 SH-4A subtypes.

Signed-off-by: Paul Mundt

[PATCH] sh: Move TRA/EXPEVT/INTEVT definitions for reuse

2006-02-01T16:53:19+00:00

Currently entry.S is home to these definitions, so we move them somewhere more
sensible.  IPR IRQ handling depends on being to read from INTEVT.

Signed-off-by: Paul Mundt 
Signed-off-by: Andrew Morton 
Signed-off-by: Linus Torvalds