linux-toradex.git/include/asm-sh/page.h, branch v2.6.24.2

sh: Kill off __{copy,clear}_user_page().

2007-11-07T02:14:12+00:00

Now that copy_to_user_page()/copy_from_user_page() are wired up, we
can drop the old __copy_xxx() implementations. Now that the page
colouring scheme has changed via kmap_coherent(), we can avoid the
flush in these specific helpers.

Signed-off-by: Paul Mundt

sh: Wire up clear_user_highpage().

2007-11-07T02:14:12+00:00

With the kmap_coherent() API in place, this is trivial to implement,
and lets us avoid the cache flush in certain cases.

Signed-off-by: Paul Mundt

sh: Correct pte_page() breakage.

2007-10-29T23:44:13+00:00

As noted by David:

pte_page() is a macro defined as follows;

    include/asm-sh/pgtable.h
    #define pte_page(x)    phys_to_page(pte_val(x)&PTE_PHYS_MASK)

    include/asm-sh/page.h
    #define phys_to_page(phys)    (pfn_to_page(phys >> PAGE_SHIFT))

So as you can see the phys_to_page() macro doesn't wrap the 'phys'
parameter in parentheses so we end up with;

    pte_val(x)&PTE_PHYS_MASK >> PAGE_SHIFT

Which is not what we wanted as '>>' has a higher precedence than bitwise
AND. I dug into the git repository and I believe this bug was added with
this commit (104b8deaa5c0144cccfc7d914413ff80c7176af1);

2006-03-27 KAMEZAWA Hiroyuki [PATCH] unify pfn_to_page: sh pfn_to_page

-#define phys_to_page(phys)     (mem_map + (((phys)-__MEMORY_START) >>
PAGE_SHIFT))
-#define page_to_phys(page)     (((page - mem_map) << PAGE_SHIFT) +
__MEMORY_START)
+#define phys_to_page(phys)     (pfn_to_page(phys >> PAGE_SHIFT))
+#define page_to_phys(page)     (page_to_pfn(page) << PAGE_SHIFT)

Reported-by: David ADDISON 
Reported-by: KAMEZAWA Hiroyuki 
Signed-off-by: Paul Mundt

sh: Fix up extended mode TLB for SH-X2+ cores.

2007-09-21T02:57:55+00:00

The extended mode TLB requires both 64-bit PTEs and a 64-bit pgprot,
correspondingly, the PGD also has to be 64-bits, so fix that up.

The kernel and user permission bits really are decoupled in early
cuts of the silicon, which means that we also have to set corresponding
kernel permissions on user pages or we end up with user pages that the
kernel simply can't touch (!).

Finally, with those things corrected, really enable MMUCR.ME and
correct the PTEA value (this simply needs to be the upper 32-bits
of the PTE, with the size and protection bit encoding).

Signed-off-by: Paul Mundt

sh: Support explicit L1 cache disabling.

2007-09-21T02:57:46+00:00

This reworks the cache mode configuration in Kconfig, and allows for
explicit selection of write-back/write-through/off configurations.
All of the cache flushing routines are optimized away for the off
case.

Signed-off-by: Paul Mundt

sh: Default to 4-byte alignment for SLUB objects.

2007-06-08T02:43:48+00:00

Slub currently defaults to 8-byte alignment for the kmalloc
and slab minalign values, where 4 will suffice. In the slab
case BYTES_PER_WORD == 4 already, so defining the minalign
values outright doesn't cause any regressions there either.

Signed-off-by: Paul Mundt

sh: pfn_valid() depends on flatmem.

2007-06-08T02:43:42+00:00

pfn_valid() is already defined in the sparsemem case, so we only
need to define this for CONFIG_FLATMEM.

Signed-off-by: Paul Mundt

sh: user annotations for get/__put_user().

2007-06-08T02:43:36+00:00

This adds in some more __user annotations. These weren't being
handled properly in some of the __get_user and __put_user paths,
so tidy those up.

Signed-off-by: Paul Mundt

sh: bootmem tidying for discontig/sparsemem preparation.

2007-05-07T02:10:54+00:00

This reworks some of the node 0 bootmem initialization in
preparation for discontigmem and sparsemem support.

ARCH_POPULATES_NODE_MAP is switched to as a result of this.

Signed-off-by: Paul Mundt

sh: Move KERNEL up in asm/page.h.

2007-02-13T01:54:46+00:00

This was breaking the uClibc build, which triggered the bogus page
size error.

Signed-off-by: Paul Mundt