PAGE_KERNEL_PCC() takes two arguments, which weren't reflected in the
nommu case. Fix it up.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>

As noted by David:

pte_page() is a macro defined as follows;

    include/asm-sh/pgtable.h
    #define pte_page(x)    phys_to_page(pte_val(x)&PTE_PHYS_MASK)

    include/asm-sh/page.h
    #define phys_to_page(phys)    (pfn_to_page(phys >> PAGE_SHIFT))

So as you can see the phys_to_page() macro doesn't wrap the 'phys'
parameter in parentheses so we end up with;

    pte_val(x)&PTE_PHYS_MASK >> PAGE_SHIFT

Which is not what we wanted as '>>' has a higher precedence than bitwise
AND. I dug into the git repository and I believe this bug was added with
this commit (104b8deaa5c0144cccfc7d914413ff80c7176af1);

2006-03-27 KAMEZAWA Hiroyuki [PATCH] unify pfn_to_page: sh pfn_to_page

-#define phys_to_page(phys)     (mem_map + (((phys)-__MEMORY_START) >>
PAGE_SHIFT))
-#define page_to_phys(page)     (((page - mem_map) << PAGE_SHIFT) +
__MEMORY_START)
+#define phys_to_page(phys)     (pfn_to_page(phys >> PAGE_SHIFT))
+#define page_to_phys(page)     (page_to_pfn(page) << PAGE_SHIFT)

Reported-by: David ADDISON <david.addison@st.com>
Reported-by: KAMEZAWA Hiroyuki <kamezawa.hiroyu@jp.fujitsu.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>

The extended mode TLB requires both 64-bit PTEs and a 64-bit pgprot,
correspondingly, the PGD also has to be 64-bits, so fix that up.

The kernel and user permission bits really are decoupled in early
cuts of the silicon, which means that we also have to set corresponding
kernel permissions on user pages or we end up with user pages that the
kernel simply can't touch (!).

Finally, with those things corrected, really enable MMUCR.ME and
correct the PTEA value (this simply needs to be the upper 32-bits
of the PTE, with the size and protection bit encoding).

Signed-off-by: Paul Mundt <lethal@linux-sh.org>

This reworks the cache mode configuration in Kconfig, and allows for
explicit selection of write-back/write-through/off configurations.
All of the cache flushing routines are optimized away for the off
case.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>

The first 1MB of P3 space was reserved and used for page colouring,
as we've reworked that to use fixmaps, we can reclaim the space and
hand it back to VMALLOC_START.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>

Kill pte_rdprotect(), pte_exprotect(), pte_mkread(), pte_mkexec(), pte_read(),
pte_exec(), and pte_user() except where arch-specific code is making use of
them.

Signed-off-by: Jan Beulich <jbeulich@novell.com>
Cc: Andi Kleen <andi@firstfloor.org>
Cc: Christoph Hellwig <hch@infradead.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>

Most architectures defined three macros, MK_IOSPACE_PFN(), GET_IOSPACE()
and GET_PFN() in pgtable.h.  However, the only callers of any of these
macros are in Sparc specific code, either in arch/sparc, arch/sparc64 or
drivers/sbus.

This patch removes the redundant macros from all architectures except
sparc and sparc64.

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Cc: <linux-arch@vger.kernel.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>

These ended up causing too many problems on older parts,
revert for now..

Signed-off-by: Paul Mundt <lethal@linux-sh.org>

This ended up causing problems for older parts (particularly ones
using PTEA). Revert this for now, it can be added back in once it's
had some more testing.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>

This converts the lazy dcache handling to the model described in
Documentation/cachetlb.txt and drops the ptep_get_and_clear() hacks
used for the aliasing dcaches on SH-4 and SH7705 in 32kB mode. As a
bonus, this slightly cuts down on the cache flushing frequency.

With that and the PTEA handling out of the way, the update_mmu_cache()
implementations can be consolidated, and we no longer have to worry
about which configuration the cache is in for the SH7705 case.

And finally, explicitly disable the lazy writeback on SMP (SH-4A).

Signed-off-by: Paul Mundt <lethal@linux-sh.org>