linux-toradex.git/include/asm-xtensa/cache.h, branch v2.6.16.61 Linux kernel for Apalis and Colibri modules [PATCH] xtensa: Architecture support for Tensilica Xtensa Part 6 2005-06-24T07:05:22+00:00 Chris Zankel czankel@tensilica.com 2005-06-24T05:01:26+00:00 9a8fd5589902153a134111ed7a40f9cca1f83254 The attached patches provides part 6 of an architecture implementation for the Tensilica Xtensa CPU series. Signed-off-by: Chris Zankel <chris@zankel.net> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org> 
The attached patches provides part 6 of an architecture implementation for the
Tensilica Xtensa CPU series.

Signed-off-by: Chris Zankel <chris@zankel.net>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>