<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-toradex.git/include/asm-xtensa/processor.h, branch v2.6.18-rc7</title>
<subtitle>Linux kernel for Apalis and Colibri modules</subtitle>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/'/>
<entry>
<title>[PATCH] Make cpu_relax() imply barrier() on all arches</title>
<updated>2006-07-12T19:56:45+00:00</updated>
<author>
<name>Chase Venters</name>
<email>chase.venters@clientec.com</email>
</author>
<published>2006-07-08T16:10:29+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=f6dc8c5b8e04ce28720155383e971561a23899d5'/>
<id>f6dc8c5b8e04ce28720155383e971561a23899d5</id>
<content type='text'>
During the recent discussion of taking 'volatile' off of the spinlock, I
noticed that while most arches #define cpu_relax() such that it implies
barrier(), some arches define cpu_relax() to be empty.

This patch changes the definition of cpu_relax() for frv, h8300, m68knommu,
sh, sh64, v850 and xtensa from an empty while(0) to the compiler barrier().

Signed-off-by: Chase Venters &lt;chase.venters@clientec.com&gt;
Acked-by: Arjan van de Ven &lt;arjan@Linux.intel.com&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@osdl.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
During the recent discussion of taking 'volatile' off of the spinlock, I
noticed that while most arches #define cpu_relax() such that it implies
barrier(), some arches define cpu_relax() to be empty.

This patch changes the definition of cpu_relax() for frv, h8300, m68knommu,
sh, sh64, v850 and xtensa from an empty while(0) to the compiler barrier().

Signed-off-by: Chase Venters &lt;chase.venters@clientec.com&gt;
Acked-by: Arjan van de Ven &lt;arjan@Linux.intel.com&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@osdl.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[PATCH] xtensa: task_pt_regs(), task_stack_page()</title>
<updated>2006-01-12T17:08:54+00:00</updated>
<author>
<name>Al Viro</name>
<email>viro@ftp.linux.org.uk</email>
</author>
<published>2006-01-12T09:05:50+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=04fe6faf10c310480151667e7fe3e06df4208a8e'/>
<id>04fe6faf10c310480151667e7fe3e06df4208a8e</id>
<content type='text'>
Signed-off-by: Al Viro &lt;viro@zeniv.linux.org.uk&gt;
Signed-off-by: Andrew Morton &lt;akpm@osdl.org&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@osdl.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Signed-off-by: Al Viro &lt;viro@zeniv.linux.org.uk&gt;
Signed-off-by: Andrew Morton &lt;akpm@osdl.org&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@osdl.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[PATCH] xtensa: Architecture support for Tensilica Xtensa Part 6</title>
<updated>2005-06-24T07:05:22+00:00</updated>
<author>
<name>Chris Zankel</name>
<email>czankel@tensilica.com</email>
</author>
<published>2005-06-24T05:01:26+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=9a8fd5589902153a134111ed7a40f9cca1f83254'/>
<id>9a8fd5589902153a134111ed7a40f9cca1f83254</id>
<content type='text'>
The attached patches provides part 6 of an architecture implementation for the
Tensilica Xtensa CPU series.

Signed-off-by: Chris Zankel &lt;chris@zankel.net&gt;
Signed-off-by: Andrew Morton &lt;akpm@osdl.org&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@osdl.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The attached patches provides part 6 of an architecture implementation for the
Tensilica Xtensa CPU series.

Signed-off-by: Chris Zankel &lt;chris@zankel.net&gt;
Signed-off-by: Andrew Morton &lt;akpm@osdl.org&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@osdl.org&gt;
</pre>
</div>
</content>
</entry>
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