linux-toradex.git/include/dt-bindings/clock/imx7d-clock.h, branch v5.0

clk: imx7d: correct enet clock CCGR registers

2018-06-01T19:15:21+00:00

Correct enet clock gates as below:

CCGR6: IMX7D_ENET_AXI_ROOT_CLK (enet1 and enet2 bus clocks)
CCGR112: IMX7D_ENET1_TIME_ROOT_CLK, IMX7D_ENET1_IPG_ROOT_CLK
CCGR113: IMX7D_ENET2_TIME_ROOT_CLK, IMX7D_ENET2_IPG_ROOT_CLK

Just rename unused IMX7D_ENETx_REF_ROOT_CLK for
IMX7D_ENETx_IPG_ROOT_CLK instead of adding new clocks.

Based on Andy Duan's patch from the NXP kernel tree.

Signed-off-by: Anson Huang 
Acked-by: Rob Herring 
Reviewed-by: Stefan Agner 
Signed-off-by: Stephen Boyd

clk: imx: imx7d: add the Keypad Port module clock

2018-02-28T06:43:00+00:00

According to the i.MX7D Reference Manual, the Keypad Port module
(KPP) requires this clock gate to be enabled.

Signed-off-by: Stefan Agner 
Signed-off-by: Shawn Guo

clk: imx7d: add CAAM clock

2018-02-28T01:17:41+00:00

Add CAAM clock so that we could use the Cryptographic Acceleration and
Assurance Module (CAAM) hardware block.

Cc: Michael Turquette 
Cc: Stephen Boyd 
Cc: linux-clk@vger.kernel.org
Cc: "Horia Geantă" 
Cc: Aymen Sghaier 
Cc: Fabio Estevam 
Cc: Peng Fan 
Cc: "David S. Miller" 
Cc: Lukas Auer 
Reviewed-by: Fabio Estevam 
Signed-off-by: Rui Miguel Silva 
Signed-off-by: Shawn Guo

clk: imx: imx7d: add the snvs clock

2018-02-22T09:46:58+00:00

According to the i.MX7D Reference Manual,
SNVS block has a clock gate, accessing SNVS block
would need this clock gate to be enabled, add it
into clock tree so that SNVS module driver can
operate this clock gate.

Signed-off-by: Anson Huang 
Acked-by: Dong Aisheng 
Reviewed-by: Fabio Estevam 
Signed-off-by: Shawn Guo

clk: imx: imx7d: Remove ARM_M0 clock

2017-11-02T07:26:18+00:00

IMX7d does not have an M0 Core and this particular
clock doesn't seem connected to anything else.
Remove this entry from the CCM driver.

Signed-off-by: Adriana Reus 
Signed-off-by: Stephen Boyd

clk: imx7d: create clocks behind rawnand clock gate

2017-06-20T02:02:41+00:00

The rawnand clock gate gates two clocks, NAND_USDHC_BUS_CLK_ROOT
and NAND_CLK_ROOT. However, the gate has been in the chain of the
latter only. This does not allow to use the NAND_USDHC_BUS_CLK_ROOT
only, e.g. as required by APBH-Bridge-DMA.

Add new clocks which represent the clock after the gate, and use a
shared clock gate to correctly model the hardware.

Signed-off-by: Stefan Agner 
Tested-by: Fabio Estevam 
Acked-by: Han Xu 
Signed-off-by: Stephen Boyd

clk: imx7d: Add the OCOTP clock

2017-01-21T00:27:19+00:00

Add the OCOTP so that this hardware block can be used.

Signed-off-by: Fabio Estevam 
Signed-off-by: Stephen Boyd

clk: imx: add ckil clock for i.MX7

2016-04-06T09:04:26+00:00

Add the necessary clock to use the ckil on i.MX7.

Inspired from the following patch:
https://github.com/boundarydevices/linux-imx6/commit/b80e8271

Signed-off-by: Troy Kisky 
Signed-off-by: Gary Bisson 
Signed-off-by: Shawn Guo

clk: imx: Add a virtual arm clk on i.mx7d

2015-12-02T05:34:01+00:00

Add a virtual arm clk to abstract the actual steps
when changing the ARM core frequency.So we can using
the 'cpufreq-dt' driver on i.MX7D/Solo.

Signed-off-by: Bai Ping 
Acked-by: Lucas Stach 
Signed-off-by: Shawn Guo

clk: imx7d: add ADC root clock

2015-10-09T03:01:50+00:00

Add ADC root clock support in imx7d clock tree.

Signed-off-by: Haibo Chen 
Acked-by: Stephen Boyd 
Signed-off-by: Shawn Guo