linux-toradex.git/include/dt-bindings/memory, branch v5.18

dt-bindings: memory: Add Tegra234 PCIe memory

2022-02-24T19:00:25+00:00

Add the memory client and stream ID definitions for the PCIe hardware
found on Tegra234 SoCs.

Signed-off-by: Vidya Sagar 
Acked-by: Rob Herring 
Signed-off-by: Thierry Reding

dt-bindings: Add HDA support for Tegra234

2022-02-24T17:34:33+00:00

Add hda clocks, memory ,power and reset binding entries
for Tegra234.

Signed-off-by: Mohan Kumar 
Signed-off-by: Thierry Reding

dt-bindings: Add Tegra234 APE support

2022-02-17T14:21:43+00:00

Add clocks, power-domain and memory bindings to support APE subsystem
on Tegra234.

Signed-off-by: Sameer Pujar 
Signed-off-by: Thierry Reding

dt-bindings: memory: tegra: Add Tegra234 support

2021-12-16T15:43:49+00:00

Document the variant of the memory controller and external memory
controllers found on Tegra234 and add some memory client and SMMU
stream ID definitions for use in device tree files.

Reviewed-by: Rob Herring 
Signed-off-by: Thierry Reding 
Reviewed-by: Krzysztof Kozlowski 
Signed-off-by: Thierry Reding

dt-bindings: mediatek: Add binding for mt8192 IOMMU

2021-02-01T11:27:59+00:00

This patch adds decriptions for mt8192 IOMMU and SMI.

mt8192 also is MTK IOMMU gen2 which uses ARM Short-Descriptor translation
table format. The M4U-SMI HW diagram is as below:

                          EMI
                           |
                          M4U
                           |
                      ------------
                       SMI Common
                      ------------
                           |
  +-------+------+------+----------------------+-------+
  |       |      |      |       ......         |       |
  |       |      |      |                      |       |
larb0   larb1  larb2  larb4     ......      larb19   larb20
disp0   disp1   mdp    vdec                   IPE      IPE

All the connections are HW fixed, SW can NOT adjust it.

mt8192 M4U support 0~16GB iova range. we preassign different engines
into different iova ranges:

domain-id  module     iova-range                  larbs
   0       disp        0 ~ 4G                      larb0/1
   1       vcodec      4G ~ 8G                     larb4/5/7
   2       cam/mdp     8G ~ 12G             larb2/9/11/13/14/16/17/18/19/20
   3       CCU0    0x4000_0000 ~ 0x43ff_ffff     larb13: port 9/10
   4       CCU1    0x4400_0000 ~ 0x47ff_ffff     larb14: port 4/5

The iova range for CCU0/1(camera control unit) is HW requirement.

Signed-off-by: Yong Wu 
Reviewed-by: Rob Herring 
Acked-by: Krzysztof Kozlowski 
Reviewed-by: Tomasz Figa 
Link: https://lore.kernel.org/r/20210111111914.22211-6-yong.wu@mediatek.com
Signed-off-by: Will Deacon

dt-bindings: memory: mediatek: Rename header guard for SMI header file

2021-02-01T11:27:59+00:00

Only rename the header guard for all the SoC larb port header file.
No funtional change.

Suggested-by: Krzysztof Kozlowski 
Signed-off-by: Yong Wu 
Acked-by: Krzysztof Kozlowski 
Acked-by: Rob Herring 
Reviewed-by: Tomasz Figa 
Link: https://lore.kernel.org/r/20210111111914.22211-5-yong.wu@mediatek.com
Signed-off-by: Will Deacon

dt-bindings: memory: mediatek: Extend LARB_NR_MAX to 32

2021-02-01T11:27:58+00:00

Extend the max larb number definition as mt8192 has larb_nr over 16.

Signed-off-by: Yong Wu 
Acked-by: Rob Herring 
Acked-by: Krzysztof Kozlowski 
Reviewed-by: Tomasz Figa 
Link: https://lore.kernel.org/r/20210111111914.22211-4-yong.wu@mediatek.com
Signed-off-by: Will Deacon

dt-bindings: memory: mediatek: Add a common memory header file

2021-02-01T11:27:58+00:00

Put all the macros about smi larb/port togethers.

Signed-off-by: Yong Wu 
Acked-by: Rob Herring 
Acked-by: Krzysztof Kozlowski 
Reviewed-by: Tomasz Figa 
Link: https://lore.kernel.org/r/20210111111914.22211-3-yong.wu@mediatek.com
Signed-off-by: Will Deacon

Merge tag 'arm-soc-drivers-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

2020-12-17T00:38:41+00:00

Pull ARM SoC driver updates from Arnd Bergmann:
 "There are a couple of subsystems maintained by other people that merge
  their drivers through the SoC tree, those changes include:

   - The SCMI firmware framework gains support for sensor notifications
     and for controlling voltage domains.

   - A large update for the Tegra memory controller driver, integrating
     it better with the interconnect framework

   - The memory controller subsystem gains support for Mediatek MT8192

   - The reset controller framework gains support for sharing pulsed
     resets

  For Soc specific drivers in drivers/soc, the main changes are

   - The Allwinner/sunxi MBUS gets a rework for the way it handles
     dma_map_ops and offsets between physical and dma address spaces.

   - An errata fix plus some cleanups for Freescale Layerscape SoCs

   - A cleanup for renesas drivers regarding MMIO accesses.

   - New SoC specific drivers for Mediatek MT8192 and MT8183 power
     domains

   - New SoC specific drivers for Aspeed AST2600 LPC bus control and SoC
     identification.

   - Core Power Domain support for Qualcomm MSM8916, MSM8939, SDM660 and
     SDX55.

   - A rework of the TI AM33xx 'genpd' power domain support to use
     information from DT instead of platform data

   - Support for TI AM64x SoCs

   - Allow building some Amlogic drivers as modules instead of built-in

  Finally, there are numerous cleanups and smaller bug fixes for
  Mediatek, Tegra, Samsung, Qualcomm, TI OMAP, Amlogic, Rockchips,
  Renesas, and Xilinx SoCs"

* tag 'arm-soc-drivers-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (222 commits)
  soc: mediatek: mmsys: Specify HAS_IOMEM dependency for MTK_MMSYS
  firmware: xilinx: Properly align function parameter
  firmware: xilinx: Add a blank line after function declaration
  firmware: xilinx: Remove additional newline
  firmware: xilinx: Fix kernel-doc warnings
  firmware: xlnx-zynqmp: fix compilation warning
  soc: xilinx: vcu: add missing register NUM_CORE
  soc: xilinx: vcu: use vcu-settings syscon registers
  dt-bindings: soc: xlnx: extract xlnx, vcu-settings to separate binding
  soc: xilinx: vcu: drop useless success message
  clk: samsung: mark PM functions as __maybe_unused
  soc: samsung: exynos-chipid: initialize later - with arch_initcall
  soc: samsung: exynos-chipid: order list of SoCs by name
  memory: jz4780_nemc: Fix potential NULL dereference in jz4780_nemc_probe()
  memory: ti-emif-sram: only build for ARMv7
  memory: tegra30: Support interconnect framework
  memory: tegra20: Support hardware versioning and clean up OPP table initialization
  dt-bindings: memory: tegra20-emc: Document opp-supported-hw property
  soc: rockchip: io-domain: Fix error return code in rockchip_iodomain_probe()
  reset-controller: ti: force the write operation when assert or deassert
  ...

dt-bindings: memory: tegra124: Add memory client IDs

2020-11-26T18:05:16+00:00

Each memory client has unique hardware ID, add these IDs.

Reviewed-by: Rob Herring 
Signed-off-by: Dmitry Osipenko 
Acked-by: Krzysztof Kozlowski 
Signed-off-by: Thierry Reding