linux-toradex.git/include/dt-bindings/regulator, branch master Linux kernel for Apalis and Colibri modules regulator: dt-bindings: add s2mpg11-pmic regulators 2026-02-04T13:35:31+00:00 André Draszik andre.draszik@linaro.org 2026-01-22T15:43:30+00:00 030158c0528d1cbfbe9eebed09bad604f6135734 The S2MPG11 PMIC is a Power Management IC for mobile applications with buck converters, various LDOs, power meters, NTC thermistor inputs, and additional GPIO interfaces. It typically complements an S2MPG10 PMIC in a main/sub configuration as the sub-PMIC. S2MPG11 has 12 buck, 1 buck-boost, and 15 LDO rails. Several of these can either be controlled via software (register writes) or via external signals, in particular by: * one out of several input pins connected to a main processor's: * GPIO pins * other pins that are e.g. firmware- or power-domain-controlled without explicit driver intervention * a combination of input pins and register writes. Control via input pins allows PMIC rails to be controlled by firmware, e.g. during standby/suspend, or as part of power domain handling where otherwise that would not be possible. Additionally toggling a pin is faster than register writes, and it also allows the PMIC to ensure that any necessary timing requirements between rails are respected automatically if multiple rails are to be enabled or disabled quasi simultaneously. While external control via input pins appears to exist on other versions of this PMIC, there is more flexibility in this version, in particular there is a selection of input pins to choose from for each rail (which must therefore be configured accordingly if in use), whereas other versions don't have this flexibility. Add documentation related to the regulator (buck & ldo) parts like devicetree definitions, regulator naming patterns, and additional properties. Since S2MPG11 is typically used as the sub-PMIC together with an S2MPG10 as the main-PMIC, the datasheet and the binding both suffix the rails with an 's'. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: André Draszik <andre.draszik@linaro.org> Link: https://patch.msgid.link/20260122-s2mpg1x-regulators-v7-3-3b1f9831fffd@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org> 
The S2MPG11 PMIC is a Power Management IC for mobile applications with
buck converters, various LDOs, power meters, NTC thermistor inputs, and
additional GPIO interfaces. It typically complements an S2MPG10 PMIC in
a main/sub configuration as the sub-PMIC.

S2MPG11 has 12 buck, 1 buck-boost, and 15 LDO rails. Several of these
can either be controlled via software (register writes) or via external
signals, in particular by:
    * one out of several input pins connected to a main processor's:
        *  GPIO pins
        * other pins that are e.g. firmware- or power-domain-controlled
          without explicit driver intervention
    * a combination of input pins and register writes.

Control via input pins allows PMIC rails to be controlled by firmware,
e.g. during standby/suspend, or as part of power domain handling where
otherwise that would not be possible. Additionally toggling a pin is
faster than register writes, and it also allows the PMIC to ensure that
any necessary timing requirements between rails are respected
automatically if multiple rails are to be enabled or disabled quasi
simultaneously.

While external control via input pins appears to exist on other
versions of this PMIC, there is more flexibility in this version, in
particular there is a selection of input pins to choose from for each
rail (which must therefore be configured accordingly if in use),
whereas other versions don't have this flexibility.

Add documentation related to the regulator (buck & ldo) parts like
devicetree definitions, regulator naming patterns, and additional
properties.

Since S2MPG11 is typically used as the sub-PMIC together with an
S2MPG10 as the main-PMIC, the datasheet and the binding both suffix the
rails with an 's'.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: André Draszik <andre.draszik@linaro.org>
Link: https://patch.msgid.link/20260122-s2mpg1x-regulators-v7-3-3b1f9831fffd@linaro.org
Signed-off-by: Mark Brown <broonie@kernel.org>
regulator: dt-bindings: add s2mpg10-pmic regulators 2026-02-04T13:35:30+00:00 André Draszik andre.draszik@linaro.org 2026-01-22T15:43:29+00:00 71bc6adae4102550717a8eeaa21d3f76f5149ac6 The S2MPG10 PMIC is a Power Management IC for mobile applications with buck converters, various LDOs, power meters, RTC, clock outputs, and additional GPIO interfaces. It has 10 buck and 31 LDO rails. Several of these can either be controlled via software (register writes) or via external signals, in particular by: * one out of several input pins connected to a main processor's: * GPIO pins * other pins that are e.g. firmware- or power-domain-controlled without explicit driver intervention * a combination of input pins and register writes. Control via input pins allows PMIC rails to be controlled by firmware, e.g. during standby/suspend, or as part of power domain handling where otherwise that would not be possible. Additionally toggling a pin is faster than register writes, and it also allows the PMIC to ensure that any necessary timing requirements between rails are respected automatically if multiple rails are to be enabled or disabled quasi simultaneously. While external control via input pins appears to exist on other versions of this PMIC, there is more flexibility in this version, in particular there is a selection of input pins to choose from for each rail (which must therefore be configured accordingly if in use), whereas other versions don't have this flexibility. Add documentation related to the regulator (buck & ldo) parts like devicetree definitions, regulator naming patterns, and additional properties. S2MPG10 is typically used as the main-PMIC together with an S2MPG11 PMIC in a main/sub configuration, hence the datasheet and the binding both suffix the rails with an 'm'. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: André Draszik <andre.draszik@linaro.org> Link: https://patch.msgid.link/20260122-s2mpg1x-regulators-v7-2-3b1f9831fffd@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org> 
The S2MPG10 PMIC is a Power Management IC for mobile applications with
buck converters, various LDOs, power meters, RTC, clock outputs, and
additional GPIO interfaces.

It has 10 buck and 31 LDO rails. Several of these can either be
controlled via software (register writes) or via external signals, in
particular by:
    * one out of several input pins connected to a main processor's:
        *  GPIO pins
        * other pins that are e.g. firmware- or power-domain-controlled
          without explicit driver intervention
    * a combination of input pins and register writes.

Control via input pins allows PMIC rails to be controlled by firmware,
e.g. during standby/suspend, or as part of power domain handling where
otherwise that would not be possible. Additionally toggling a pin is
faster than register writes, and it also allows the PMIC to ensure that
any necessary timing requirements between rails are respected
automatically if multiple rails are to be enabled or disabled quasi
simultaneously.

While external control via input pins appears to exist on other
versions of this PMIC, there is more flexibility in this version, in
particular there is a selection of input pins to choose from for each
rail (which must therefore be configured accordingly if in use),
whereas other versions don't have this flexibility.

Add documentation related to the regulator (buck & ldo) parts like
devicetree definitions, regulator naming patterns, and additional
properties.

S2MPG10 is typically used as the main-PMIC together with an S2MPG11
PMIC in a main/sub configuration, hence the datasheet and the binding
both suffix the rails with an 'm'.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: André Draszik <andre.draszik@linaro.org>
Link: https://patch.msgid.link/20260122-s2mpg1x-regulators-v7-2-3b1f9831fffd@linaro.org
Signed-off-by: Mark Brown <broonie@kernel.org>
Merge tag 'soc-dt-6.17' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc 2025-07-29T18:04:52+00:00 Linus Torvalds torvalds@linux-foundation.org 2025-07-29T18:04:52+00:00 115e74a29b530d121891238e9551c4bcdf7b04b5 Pull SoC devicetree updates from Arnd Bergmann: "There are a few new variants of existing chips: - mt6572 is an older mobile phone chip from mediatek that was extremely popular a decade ago but never got upstreamed until now - exynos2200 is a recent high-end mobile phone chip used in a few Samsung phones like the Galaxy S22 - Renesas R-Car V4M-7 (R8A779H2) is an updated version of R-Car V4M (R8A779H0) and used in automotive applications - Tegra264 is a new chip from NVIDIA, but support is fairly minimal for now, and not much information is public about it There are five more chips in a separate branch, as those are new chip families that I merged along with the necessary infrastructure. New board support is not that exciting, with a total of 33 newly added machines here: - Evaluation platforms for the chips above, plus TI am62d2 and Sophgo sg2042 - Six 32-bit industrial boards based on stm32, imx6 and am33 chips, plus eight 64-bit rockchips rk33xx/rk35xx, am62d2, t527, imx8 and imx95 - Two newly added ASPEED BMC based motherboards, and one that got removed - Phones and Tablets based on 32-bit mt6572, tegra30 and 64-bit msm8976 SoCs - Three Laptops based on Mediatek mt8186 and Qualcomm Snapdragon X1 - A set-top box based on Amlogic meson-gxm Updates for existing machines are spread over all the above families. One notable change here is support for the RP1 I/O chip used in Raspberry Pi 5" * tag 'soc-dt-6.17' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (606 commits) riscv: dts: sophgo: fix mdio node name for CV180X riscv: dts: sophgo: sophgo-srd3-10: reserve uart0 device riscv: dts: sophgo: add Sophgo SG2042_EVB_V2.0 board device tree riscv: dts: sophgo: add Sophgo SG2042_EVB_V1.X board device tree dt-bindings: riscv: add Sophgo SG2042_EVB_V1.X/V2.0 bindings riscv: dts: sophgo: add ethernet GMAC device for sg2042 riscv: dts: sophgo: Enable ethernet device for Huashan Pi riscv: dts: sophgo: Add mdio multiplexer device for cv18xx riscv: dts: sophgo: Add ethernet device for cv18xx riscv: dts: sophgo: sg2044: add pmu configuration riscv: dts: sophgo: sg2044: add ziccrse extension riscv: dts: sophgo: add zfh for sg2042 riscv: dts: sophgo: add ziccrse for sg2042 riscv: dts: sophgo: Add xtheadvector to the sg2042 devicetree riscv: dts: sophgo: sg2044: add PCIe device support for SG2044 riscv: dts: sophgo: sg2044: add MSI device support for SG2044 riscv: dts: sophgo: add reset configuration for Sophgo CV1800 series SoC riscv: dts: sophgo: add reset generator for Sophgo CV1800 series SoC dt-bindings: soc: sophgo: Move SoCs/boards from riscv into soc, add SG2000 riscv: dts: sophgo: sg2044: Add missing riscv,cbop-block-size property ... 
Pull SoC devicetree updates from Arnd Bergmann:
 "There are a few new variants of existing chips:

   - mt6572 is an older mobile phone chip from mediatek that was
     extremely popular a decade ago but never got upstreamed until now

   - exynos2200 is a recent high-end mobile phone chip used in a few
     Samsung phones like the Galaxy S22

   - Renesas R-Car V4M-7 (R8A779H2) is an updated version of R-Car V4M
     (R8A779H0) and used in automotive applications

   - Tegra264 is a new chip from NVIDIA, but support is fairly minimal
     for now, and not much information is public about it

  There are five more chips in a separate branch, as those are new chip
  families that I merged along with the necessary infrastructure.

  New board support is not that exciting, with a total of 33 newly added
  machines here:

   - Evaluation platforms for the chips above, plus TI am62d2 and Sophgo
     sg2042

   - Six 32-bit industrial boards based on stm32, imx6 and am33 chips,
     plus eight 64-bit rockchips rk33xx/rk35xx, am62d2, t527, imx8 and
     imx95

   - Two newly added ASPEED BMC based motherboards, and one that got
     removed

   - Phones and Tablets based on 32-bit mt6572, tegra30 and 64-bit
     msm8976 SoCs

   - Three Laptops based on Mediatek mt8186 and Qualcomm Snapdragon X1

   - A set-top box based on Amlogic meson-gxm

  Updates for existing machines are spread over all the above families.
  One notable change here is support for the RP1 I/O chip used in
  Raspberry Pi 5"

* tag 'soc-dt-6.17' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (606 commits)
  riscv: dts: sophgo: fix mdio node name for CV180X
  riscv: dts: sophgo: sophgo-srd3-10: reserve uart0 device
  riscv: dts: sophgo: add Sophgo SG2042_EVB_V2.0 board device tree
  riscv: dts: sophgo: add Sophgo SG2042_EVB_V1.X board device tree
  dt-bindings: riscv: add Sophgo SG2042_EVB_V1.X/V2.0 bindings
  riscv: dts: sophgo: add ethernet GMAC device for sg2042
  riscv: dts: sophgo: Enable ethernet device for Huashan Pi
  riscv: dts: sophgo: Add mdio multiplexer device for cv18xx
  riscv: dts: sophgo: Add ethernet device for cv18xx
  riscv: dts: sophgo: sg2044: add pmu configuration
  riscv: dts: sophgo: sg2044: add ziccrse extension
  riscv: dts: sophgo: add zfh for sg2042
  riscv: dts: sophgo: add ziccrse for sg2042
  riscv: dts: sophgo: Add xtheadvector to the sg2042 devicetree
  riscv: dts: sophgo: sg2044: add PCIe device support for SG2044
  riscv: dts: sophgo: sg2044: add MSI device support for SG2044
  riscv: dts: sophgo: add reset configuration for Sophgo CV1800 series SoC
  riscv: dts: sophgo: add reset generator for Sophgo CV1800 series SoC
  dt-bindings: soc: sophgo: Move SoCs/boards from riscv into soc, add SG2000
  riscv: dts: sophgo: sg2044: Add missing riscv,cbop-block-size property
  ...
dt-bindings: regulator: Add STM32MP15 SCMI regulator identifiers 2025-07-04T09:24:12+00:00 Etienne Carriere etienne.carriere@foss.st.com 2025-06-03T09:02:09+00:00 9bc35edb9ac76b23285e7ceafa1576ce53da9b6c These bindings will be used for the SCMI voltage domain. Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com> Signed-off-by: Pascal Paillet <p.paillet@foss.st.com> Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250603-stm32mp157f-dk2-v2-3-5be0854a9299@foss.st.com Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com> 
These bindings will be used for the SCMI voltage domain.

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Signed-off-by: Pascal Paillet <p.paillet@foss.st.com>
Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250603-stm32mp157f-dk2-v2-3-5be0854a9299@foss.st.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
dt-bindings: regulator: add pca9450: Add regulator-allowed-modes 2025-06-08T22:35:15+00:00 Martijn de Gouw martijn.de.gouw@prodrive-technologies.com 2025-05-25T07:18:20+00:00 d7181a2d43cffb19f1e5c19f6d2328f190c87d70 Make the PWM mode on the buck controllers configurable from devicetree. Some boards require forced PWM mode to keep the supply ripple within acceptable limits under light load conditions. Signed-off-by: Martijn de Gouw <martijn.de.gouw@prodrive-technologies.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://patch.msgid.link/20250525071823.819342-1-martijn.de.gouw@prodrive-technologies.com Signed-off-by: Mark Brown <broonie@kernel.org> 
Make the PWM mode on the buck controllers configurable from devicetree.
Some boards require forced PWM mode to keep the supply ripple within
acceptable limits under light load conditions.

Signed-off-by: Martijn de Gouw <martijn.de.gouw@prodrive-technologies.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://patch.msgid.link/20250525071823.819342-1-martijn.de.gouw@prodrive-technologies.com
Signed-off-by: Mark Brown <broonie@kernel.org>
regulator: Add STM32MP25 regulator bindings 2024-07-05T12:45:25+00:00 Pascal Paillet p.paillet@foss.st.com 2024-06-28T08:58:11+00:00 87b6426ab92efd91a17aed1f5b1d94f36938e28f These bindings will be used for the SCMI voltage domain. Signed-off-by: Pascal Paillet <p.paillet@foss.st.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Mark Brown <broonie@kernel.org> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com> 
These bindings will be used for the SCMI voltage domain.

Signed-off-by: Pascal Paillet <p.paillet@foss.st.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
dt-bindings: rcc: stm32: add STM32MP13 SCMI regulators IDs 2023-08-16T08:58:41+00:00 Etienne Carriere etienne.carriere@foss.st.com 2023-07-12T14:24:29+00:00 fe95052fc7b4f9f077d066dec78d59ec6fac9006 Adds SCMI regulator identifiers for STM32MP13x family. Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com> Signed-off-by: Pascal Paillet <p.paillet@foss.st.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com> 
Adds SCMI regulator identifiers for STM32MP13x family.

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Signed-off-by: Pascal Paillet <p.paillet@foss.st.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
regulator: Add bindings for Richtek RT5190A PMIC 2022-03-09T13:32:21+00:00 ChiYuan Huang cy_huang@richtek.com 2022-03-09T08:01:42+00:00 b77e70f6b8f2cc62fba847f3008a430a09ef275d Add bindings for Richtek RT5190A PMIC. Signed-off-by: ChiYuan Huang <cy_huang@richtek.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Link: https://lore.kernel.org/r/1646812903-32496-2-git-send-email-u0084500@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org> 
Add bindings for Richtek RT5190A PMIC.

Signed-off-by: ChiYuan Huang <cy_huang@richtek.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Link: https://lore.kernel.org/r/1646812903-32496-2-git-send-email-u0084500@gmail.com
Signed-off-by: Mark Brown <broonie@kernel.org>
regulator: Add bindings for TPS62864x 2022-02-08T13:38:08+00:00 Vincent Whitchurch vincent.whitchurch@axis.com 2022-02-04T15:52:40+00:00 2f04aa69ab5c5c40d2e3e51fd73ce2ecb651e9ba Add bindings for the TPS62864/TPS6286/TPS62868/TPS62869 voltage regulators. Signed-off-by: Vincent Whitchurch <vincent.whitchurch@axis.com> Link: https://lore.kernel.org/r/20220204155241.576342-2-vincent.whitchurch@axis.com Signed-off-by: Mark Brown <broonie@kernel.org> 
Add bindings for the TPS62864/TPS6286/TPS62868/TPS62869 voltage
regulators.

Signed-off-by: Vincent Whitchurch <vincent.whitchurch@axis.com>
Link: https://lore.kernel.org/r/20220204155241.576342-2-vincent.whitchurch@axis.com
Signed-off-by: Mark Brown <broonie@kernel.org>
regulator: Update DA9121 dt-bindings 2020-12-01T12:17:55+00:00 Adam Ward Adam.Ward.opensource@diasemi.com 2020-11-30T16:59:05+00:00 744ef9b091b8b4f6c6246c8e70dd817175bde8bc Update bindings for the Dialog Semiconductor DA9121 voltage regulator to add device variants. Because several variants have multiple regulators, and to regard potential to add GPIO support in future, the 'regulators' sub-node is added, following the precedent set by other multi-regulator devices, including the DA9211 family. This breaks compatibility with the original submission by Vincent Whitchurch - but as this is still in for-next, the alignment could be made before upstreaming occurs. Signed-off-by: Adam Ward <Adam.Ward.opensource@diasemi.com> Link: https://lore.kernel.org/r/0606d3ded5fef4c38760246146f197db4ce3a374.1606755367.git.Adam.Ward.opensource@diasemi.com Signed-off-by: Mark Brown <broonie@kernel.org> 
Update bindings for the Dialog Semiconductor DA9121 voltage regulator to
add device variants.
Because several variants have multiple regulators, and to regard potential
to add GPIO support in future, the 'regulators' sub-node is added,
following the precedent set by other multi-regulator devices, including
the DA9211 family. This breaks compatibility with the original submission
by Vincent Whitchurch - but as this is still in for-next, the alignment
could be made before upstreaming occurs.

Signed-off-by: Adam Ward <Adam.Ward.opensource@diasemi.com>
Link: https://lore.kernel.org/r/0606d3ded5fef4c38760246146f197db4ce3a374.1606755367.git.Adam.Ward.opensource@diasemi.com
Signed-off-by: Mark Brown <broonie@kernel.org>