linux-toradex.git/include/dt-bindings/soc, branch v5.16

soc: dt-bindings: qcom: add gpr bindings

2021-09-28T03:10:07+00:00

Qualcomm Generic Packet router aka GPR is the IPC mechanism found
in AudioReach next generation signal processing framework to perform
command and response messages between various processors.

GPR has concepts of static and dynamic port, all static services like
APM (Audio Processing Manager), PRM (Proxy resource manager) have
fixed port numbers where as dynamic services like graphs have dynamic
port numbers which are allocated at runtime. All GPR packet messages
will have source and destination domain and port along with opcode
and payload.

This support is added using existing APR driver to reuse most of
the code.

Signed-off-by: Srinivas Kandagatla 
Reviewed-by: Rob Herring 
Reviewed-by: Pierre-Louis Bossart 
Signed-off-by: Bjorn Andersson 
Link: https://lore.kernel.org/r/20210927135559.738-5-srinivas.kandagatla@linaro.org

dt-bindings: soc: remove obsolete zte zx header

2021-08-23T18:52:10+00:00

The zte zx platform had been removed in commit 89d4f98ae90d ("ARM: remove
zte zx platform"), so this header is no longer needed.

Cc: Arnd Bergmann 
Cc: Jun Nie 
Cc: Shawn Guo 
Signed-off-by: Zenghui Yu 
Link: https://lore.kernel.org/r/20210821030924.192-2-yuzenghui@huawei.com
Signed-off-by: Rob Herring

soc: bcm: bcm-pmb: add BCM63138 SATA support

2021-03-25T21:24:43+00:00

BCM63138 has SATA controller that needs to be powered up using PMB.

Signed-off-by: Rafał Miłecki 
Signed-off-by: Florian Fainelli

dt-bindings: power: document Broadcom's PMB binding

2021-01-13T04:45:57+00:00

Broadcom's PMB is power controller used for disabling and enabling SoC
devices.

Signed-off-by: Rafał Miłecki 
Reviewed-by: Rob Herring 
Acked-by: Florian Fainelli 
Acked-by: Ulf Hansson 
Signed-off-by: Florian Fainelli

MIPS: BMIPS: add BCM6318 power domain definitions

2020-08-17T16:14:04+00:00

BCM6318 SoCs have a power domain controller to enable/disable certain
components in order to save power.

Signed-off-by: Álvaro Fernández Rojas 
Reviewed-by: Florian Fainelli 
Reviewed-by: Rob Herring 
Signed-off-by: Florian Fainelli

MIPS: BMIPS: add BCM63268 power domain definitions

2020-08-17T16:14:04+00:00

BCM63268 SoCs have a power domain controller to enable/disable certain
components in order to save power.

Signed-off-by: Álvaro Fernández Rojas 
Reviewed-by: Florian Fainelli 
Reviewed-by: Rob Herring 
Signed-off-by: Florian Fainelli

MIPS: BMIPS: add BCM6362 power domain definitions

2020-08-17T16:14:04+00:00

BCM6362 SoCs have a power domain controller to enable/disable certain
components in order to save power.

Signed-off-by: Álvaro Fernández Rojas 
Reviewed-by: Florian Fainelli 
Reviewed-by: Rob Herring 
Signed-off-by: Florian Fainelli

MIPS: BMIPS: add BCM6328 power domain definitions

2020-08-17T16:14:04+00:00

BCM6328 SoCs have a power domain controller to enable/disable certain
components in order to save power.

Signed-off-by: Álvaro Fernández Rojas 
Reviewed-by: Florian Fainelli 
Reviewed-by: Rob Herring 
Signed-off-by: Florian Fainelli

dt-bindings: soc: tegra-pmc: Add ID for Tegra PMC 32 kHz blink clock

2020-02-17T09:09:19+00:00

Tegra PMC has blink functionality that allows 32 kHz clock out to
blink pin of the Tegra.

This patch adds id for this blink clock to use for enabling or
disabling blink output through device tree.

Tested-by: Dmitry Osipenko 
Reviewed-by: Dmitry Osipenko 
Acked-by: Rob Herring 
Signed-off-by: Sowjanya Komatineni 
Signed-off-by: Thierry Reding

dt-bindings: soc: tegra-pmc: Add Tegra PMC clock bindings

2020-02-17T09:07:39+00:00

Tegra PMC has 3 clocks clk_out_1, clk_out_2, and clk_out_3.

This patch documents PMC clock bindings and adds a header defining
Tegra PMC clock ids.

Tested-by: Dmitry Osipenko 
Reviewed-by: Dmitry Osipenko 
Reviewed-by: Rob Herring 
Signed-off-by: Sowjanya Komatineni 
Signed-off-by: Thierry Reding