linux-toradex.git/include/kvm/arm_pmu.h, branch v4.9.52

arm64: KVM: fix build with CONFIG_ARM_PMU disabled

2016-06-27T10:55:51+00:00

When CONFIG_ARM_PMU is disabled, we get the following build error:

arch/arm64/kvm/sys_regs.c: In function 'pmu_counter_idx_valid':
arch/arm64/kvm/sys_regs.c:564:27: error: 'ARMV8_PMU_CYCLE_IDX' undeclared (first use in this function)
  if (idx >= val && idx != ARMV8_PMU_CYCLE_IDX)
                           ^
arch/arm64/kvm/sys_regs.c:564:27: note: each undeclared identifier is reported only once for each function it appears in
arch/arm64/kvm/sys_regs.c: In function 'access_pmu_evcntr':
arch/arm64/kvm/sys_regs.c:592:10: error: 'ARMV8_PMU_CYCLE_IDX' undeclared (first use in this function)
    idx = ARMV8_PMU_CYCLE_IDX;
          ^
arch/arm64/kvm/sys_regs.c: In function 'access_pmu_evtyper':
arch/arm64/kvm/sys_regs.c:638:14: error: 'ARMV8_PMU_CYCLE_IDX' undeclared (first use in this function)
   if (idx == ARMV8_PMU_CYCLE_IDX)
              ^
arch/arm64/kvm/hyp/switch.c:86:15: error: 'ARMV8_PMU_USERENR_MASK' undeclared (first use in this function)
  write_sysreg(ARMV8_PMU_USERENR_MASK, pmuserenr_el0);

This patch fixes the build with CONFIG_ARM_PMU disabled.

Cc: Christoffer Dall 
Cc: Marc Zyngier 
Signed-off-by: Sudeep Holla 
Signed-off-by: Christoffer Dall

arm64: KVM: Add a new vcpu device control group for PMUv3

2016-02-29T18:34:21+00:00

To configure the virtual PMUv3 overflow interrupt number, we use the
vcpu kvm_device ioctl, encapsulating the KVM_ARM_VCPU_PMU_V3_IRQ
attribute within the KVM_ARM_VCPU_PMU_V3_CTRL group.

After configuring the PMUv3, call the vcpu ioctl with attribute
KVM_ARM_VCPU_PMU_V3_INIT to initialize the PMUv3.

Signed-off-by: Shannon Zhao 
Acked-by: Peter Maydell 
Reviewed-by: Andrew Jones 
Reviewed-by: Christoffer Dall 
Signed-off-by: Marc Zyngier

arm64: KVM: Add a new feature bit for PMUv3

2016-02-29T18:34:21+00:00

To support guest PMUv3, use one bit of the VCPU INIT feature array.
Initialize the PMU when initialzing the vcpu with that bit and PMU
overflow interrupt set.

Signed-off-by: Shannon Zhao 
Acked-by: Peter Maydell 
Reviewed-by: Andrew Jones 
Signed-off-by: Marc Zyngier

arm64: KVM: Free perf event of PMU when destroying vcpu

2016-02-29T18:34:21+00:00

When KVM frees VCPU, it needs to free the perf_event of PMU.

Signed-off-by: Shannon Zhao 
Reviewed-by: Marc Zyngier 
Reviewed-by: Andrew Jones 
Signed-off-by: Marc Zyngier

arm64: KVM: Reset PMU state when resetting vcpu

2016-02-29T18:34:21+00:00

When resetting vcpu, it needs to reset the PMU state to initial status.

Signed-off-by: Shannon Zhao 
Reviewed-by: Marc Zyngier 
Reviewed-by: Andrew Jones 
Signed-off-by: Marc Zyngier

arm64: KVM: Add PMU overflow interrupt routing

2016-02-29T18:34:21+00:00

When calling perf_event_create_kernel_counter to create perf_event,
assign a overflow handler. Then when the perf event overflows, set the
corresponding bit of guest PMOVSSET register. If this counter is enabled
and its interrupt is enabled as well, kick the vcpu to sync the
interrupt.

On VM entry, if there is counter overflowed and interrupt level is
changed, inject the interrupt with corresponding level. On VM exit, sync
the interrupt level as well if it has been changed.

Signed-off-by: Shannon Zhao 
Reviewed-by: Marc Zyngier 
Reviewed-by: Andrew Jones 
Reviewed-by: Christoffer Dall 
Signed-off-by: Marc Zyngier

arm64: KVM: Add helper to handle PMCR register bits

2016-02-29T18:34:21+00:00

According to ARMv8 spec, when writing 1 to PMCR.E, all counters are
enabled by PMCNTENSET, while writing 0 to PMCR.E, all counters are
disabled. When writing 1 to PMCR.P, reset all event counters, not
including PMCCNTR, to zero. When writing 1 to PMCR.C, reset PMCCNTR to
zero.

Signed-off-by: Shannon Zhao 
Reviewed-by: Marc Zyngier 
Signed-off-by: Marc Zyngier

arm64: KVM: Add access handler for PMSWINC register

2016-02-29T18:34:20+00:00

Add access handler which emulates writing and reading PMSWINC
register and add support for creating software increment event.

Signed-off-by: Shannon Zhao 
Reviewed-by: Andrew Jones 
Signed-off-by: Marc Zyngier

arm64: KVM: Add access handler for PMOVSSET and PMOVSCLR register

2016-02-29T18:34:20+00:00

Since the reset value of PMOVSSET and PMOVSCLR is UNKNOWN, use
reset_unknown for its reset handler. Add a handler to emulate writing
PMOVSSET or PMOVSCLR register.

When writing non-zero value to PMOVSSET, the counter and its interrupt
is enabled, kick this vcpu to sync PMU interrupt.

Signed-off-by: Shannon Zhao 
Reviewed-by: Andrew Jones 
Signed-off-by: Marc Zyngier

arm64: KVM: PMU: Add perf event map and introduce perf event creating function

2016-02-29T18:34:20+00:00

When we use tools like perf on host, perf passes the event type and the
id of this event type category to kernel, then kernel will map them to
hardware event number and write this number to PMU PMEVTYPER_EL0
register. When getting the event number in KVM, directly use raw event
type to create a perf_event for it.

Signed-off-by: Shannon Zhao 
Reviewed-by: Marc Zyngier 
Signed-off-by: Marc Zyngier