linux-toradex.git/include/linux/brcmphy.h, branch v4.11-rc3

net: phy: bcm7xxx: Add BCM74371 PHY ID

2017-02-07T18:03:10+00:00

Add the BCM74371 PHY ID to the list of supported chips. This is a 28nm
technology Gigabit PHY SoC.

Signed-off-by: Florian Fainelli 
Signed-off-by: David S. Miller

net: phy: broadcom: add support for BCM54210E

2017-01-27T16:29:18+00:00

It's Broadcom PHY simply described as single-port
RGMII 10/100/1000BASE-T PHY. It requires disabling delay skew and GTXCLK
bits.

Signed-off-by: Rafał Miłecki 
Signed-off-by: David S. Miller

net: phy: bcm-phy-lib: clean up remaining AUXCTL register defines

2017-01-26T04:13:44+00:00

1) Use 0x%02x format for register number. This follows some other
   defines and makes it easier to distinct register from values.
2) Put register define above values and sort the values. It makes
   reading header code easier.
3) Use 0x%04x format for all values. It's about consistency with other
   values (and most of the header) not a personal preference.
4) Separate define for reading shift value with an extre empty line.
   It's user for all AUXCTL registers in a bcm54xx_auxctl_read.

Signed-off-by: Rafał Miłecki 
Reviewed-by: Florian Fainelli 
Signed-off-by: David S. Miller

net: phy: broadcom: drop duplicated define for RGMII SKEW delay

2017-01-26T04:13:44+00:00

We had two defines for the same bit (both were used with the
MII_BCM54XX_AUXCTL_SHDWSEL_MISC register).

Signed-off-by: Rafał Miłecki 
Reviewed-by: Florian Fainelli 
Signed-off-by: David S. Miller

net: phy: broadcom: use auxctl reading helper in BCM54612E code

2017-01-26T04:13:44+00:00

Starting with commit 5b4e29005123 ("net: phy: broadcom: add
bcm54xx_auxctl_read") we have a reading helper so use it and avoid code
duplication.
It also means we don't need MII_BCM54XX_AUXCTL_SHDWSEL_MISC define as
it's the same as MII_BCM54XX_AUXCTL_SHDWSEL_MISC just for reading needs
(same value shifted by 12 bits).

Signed-off-by: Rafał Miłecki 
Reviewed-by: Florian Fainelli 
Signed-off-by: David S. Miller

net: phy: bcm7xxx: Add entry for BCM7278

2017-01-22T21:58:31+00:00

Add support for the BCM7278 28nm process Gigabit Ethernet PHY.

Signed-off-by: Florian Fainelli 
Signed-off-by: David S. Miller

net: phy: broadcom: Add support code for reading PHY counters

2016-11-30T15:22:27+00:00

Broadcom PHYs expose a number of PHY error counters: receive errors,
false carrier sense, SerDes BER count, local and remote receive errors.
Add support code to allow retrieving these error counters. Since the
Broadcom PHY library code is used by several drivers, make it possible
for them to specify the storage for the software copy of the statistics.

Signed-off-by: Florian Fainelli 
Signed-off-by: David S. Miller

net: phy: broadcom: Add support code for downshift/Wirespeed

2016-11-24T20:45:53+00:00

Broadcom's Wirespeed feature allows us to configure how auto-negotiation
should behave with fewer working pairs of wires on a cable. Add support
code for retrieving and setting such downshift counters using the
recently added ethtool downshift tunables.

Signed-off-by: Florian Fainelli 
Signed-off-by: David S. Miller

net: phy: broadcom: Add BCM54810 PHY entry

2016-11-07T18:11:22+00:00

The BCM54810 PHY requires some semi-unique configuration, which results
in some additional configuration in addition to the standard config.
Also, some users of the BCM54810 require the PHY lanes to be swapped.
Since there is no way to detect this, add a device tree query to see if
it is applicable.

Inspired-by: Vikas Soni 
Signed-off-by: Jon Mason 
Reviewed-by: Florian Fainelli 
Reviewed-by: Andrew Lunn 
Signed-off-by: David S. Miller

net: phy: broadcom: add bcm54xx_auxctl_read

2016-11-07T18:11:21+00:00

Add a helper function to read the AUXCTL register for the BCM54xx.  This
mirrors the bcm54xx_auxctl_write function already present in the code.

Signed-off-by: Jon Mason 
Reviewed-by: Florian Fainelli 
Signed-off-by: David S. Miller