linux-toradex.git/include/linux/brcmphy.h, branch v6.6-rc3

net: phy: bcm7xxx: Add EPHY entry for 74165

2023-07-17T06:39:04+00:00

74165 is a 16nm process SoC with a 10/100 integrated Ethernet PHY,
utilize the recently defined 16nm EPHY macro to configure that PHY.

Reviewed-by: Simon Horman 
Reviewed-by: Andrew Lunn 
Signed-off-by: Florian Fainelli 
Signed-off-by: Justin Chen 
Signed-off-by: David S. Miller

net: phy: broadcom: Add support for setting LED brightness

2023-06-09T09:38:43+00:00

Broadcom PHYs have two LEDs selector registers which allow us to control
the LED assignment, including how to turn them on/off.

Signed-off-by: Florian Fainelli 
Reviewed-by: Simon Horman 
Signed-off-by: David S. Miller

net: phy: broadcom: Rename LED registers

2023-06-09T09:38:43+00:00

These registers are common to most PHYs and are not specific to the
BCM5482, renamed the constants accordingly, no functional change.

Signed-off-by: Florian Fainelli 
Reviewed-by: Simon Horman 
Signed-off-by: David S. Miller

net: phy: broadcom: Add LPI counter

2023-06-02T04:40:10+00:00

Add the ability to read the PHY maintained LPI counter which is in the
Clause 45 vendor space, device address 7, offset 0x803F. The counter is
cleared on read.

Signed-off-by: Florian Fainelli 
Reviewed-by: Andrew Lunn 
Link: https://lore.kernel.org/r/20230531231729.1873932-1-florian.fainelli@broadcom.com
Signed-off-by: Jakub Kicinski

net: phy: broadcom: Add support for Wake-on-LAN

2023-05-13T15:56:29+00:00

Add support for WAKE_UCAST, WAKE_MCAST, WAKE_BCAST, WAKE_MAGIC and
WAKE_MAGICSECURE. This is only supported with the BCM54210E and
compatible Ethernet PHYs. Using the in-band interrupt or an out of band
GPIO interrupts are supported.

Broadcom PHYs will generate a Wake-on-LAN level low interrupt on LED4 as
soon as one of the supported patterns is being matched. That includes
generating such an interrupt even if the PHY is operated during normal
modes. If WAKE_UCAST is selected, this could lead to the LED4 interrupt
firing up for every packet being received which is absolutely
undesirable from a performance point of view.

Because the Wake-on-LAN configuration can be set long before the system
is actually put to sleep, we cannot have an interrupt service routine to
clear on read the interrupt status register and ensure that new packet
matches will be detected.

It is desirable to enable the Wake-on-LAN interrupt as late as possible
during the system suspend process such that we limit the number of
interrupts to be handled by the system, but also conversely feed into
the Linux's system suspend way of dealing with interrupts in and around
the points of no return.

Reviewed-by: Simon Horman 
Signed-off-by: Florian Fainelli 
Signed-off-by: David S. Miller

net: phy: broadcom: Implement suspend/resume for AC131 and BCM5241

2022-08-17T10:49:23+00:00

Implement the suspend/resume procedure for the Broadcom AC131 and BCM5241 type
of PHYs (10/100 only) by entering the standard power down followed by the
proprietary standby mode in the auxiliary mode 4 shadow register. On resume,
the PHY software reset is enough to make it come out of standby mode so we can
utilize brcm_fet_config_init() as the resume hook.

Signed-off-by: Florian Fainelli 
Signed-off-by: David S. Miller

net: phy: broadcom: Add support for BCM53128 internal PHYs

2022-07-04T09:33:06+00:00

Add support for BCM53128 internal PHYs. These support interrupts as well as
statistics. Therefore, enable the Broadcom PHY driver for them.

Tested on BCM53128 switch using the mainline b53 DSA driver.

Signed-off-by: Kurt Kanzenbach 
Reviewed-by: Florian Fainelli 
Signed-off-by: David S. Miller

net: phy: bcm7xxx: Add EPHY entry for 7712

2021-10-24T12:42:28+00:00

7712 is a 16nm process SoC with a 10/100 integrated Ethernet PHY,
utilize the recently defined 16nm EPHY macro to configure that PHY.

Signed-off-by: Florian Fainelli 
Reviewed-by: Andrew Lunn 
Signed-off-by: David S. Miller

net: phy: broadcom: Fix PHY_BRCM_IDDQ_SUSPEND definition

2021-09-24T13:15:56+00:00

An extraneous number was added during the inclusion of that change,
correct that such that we use a single bit as is expected by the PHY
driver.

Reported-by: Justin Chen 
Fixes: d6da08ed1425 ("net: phy: broadcom: Add IDDQ-SR mode")
Signed-off-by: Florian Fainelli 
Signed-off-by: David S. Miller

net: phy: broadcom: Add IDDQ-SR mode

2021-09-21T09:58:35+00:00

Add support for putting the PHY into IDDQ Soft Recovery mode by setting
the TOP_MISC register bits accordingly. This requires us to implement a
custom bcm54xx_suspend() routine which diverges from genphy_suspend() in
order to configure the PHY to enter IDDQ with software recovery as well
as avoid doing a read/modify/write on the BMCR register.

Doing a read/modify/write on the BMCR register means that the
auto-negotation bit may remain which interferes with the ability to put
the PHY into IDDQ-SR mode. We do software reset upon suspend in order to
put the PHY back into its state prior to suspend as recommended by the
datasheet.

Signed-off-by: Florian Fainelli 
Signed-off-by: David S. Miller