<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-toradex.git/include/linux/clk-provider.h, branch v4.16-rc4</title>
<subtitle>Linux kernel for Apalis and Colibri modules</subtitle>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/'/>
<entry>
<title>Merge branches 'clk-remove-asm-clkdev', 'clk-debugfs-fixes', 'clk-renesas' and 'clk-meson' into clk-next</title>
<updated>2018-01-27T00:43:32+00:00</updated>
<author>
<name>Stephen Boyd</name>
<email>sboyd@codeaurora.org</email>
</author>
<published>2018-01-27T00:43:32+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=4d1d13a5ae8d468923106d5b05de407bc25cefa2'/>
<id>4d1d13a5ae8d468923106d5b05de407bc25cefa2</id>
<content type='text'>
* clk-remove-asm-clkdev:
  clk: Move __clk_{get,put}() into private clk.h API
  clk: sunxi: Use CLK_IS_CRITICAL flag for critical clks
  arch: Remove clkdev.h asm-generic from Kbuild
  clk: Prepare to remove asm-generic/clkdev.h
  blackfin: Use generic clkdev.h header

* clk-debugfs-fixes:
  clk: Simplify debugfs registration
  clk: Fix debugfs_create_*() usage
  clk: Show symbolic clock flags in debugfs
  clk: Improve flags doc for of_clk_detect_critical()

* clk-renesas:
  clk: renesas: r8a7796: Add FDP clock
  clk: renesas: cpg-mssr: Keep wakeup sources active during system suspend
  clk: renesas: mstp: Keep wakeup sources active during system suspend
  clk: renesas: r8a77970: Add LVDS clock

* clk-meson:
  clk: meson-axg: fix potential NULL dereference in axg_clkc_probe()
  clk: meson-axg: make local symbol axg_gp0_params_table static
  clk: meson-axg: fix return value check in axg_clkc_probe()
  clk: meson: mpll: use 64-bit maths in params_from_rate
  clk: meson-axg: add clock controller drivers
  clk: meson-axg: add clocks dt-bindings required header
  dt-bindings: clock: add compatible variant for the Meson-AXG
  clk: meson: make the spinlock naming more specific
  clk: meson: gxbb: remove IGNORE_UNUSED from mmc clocks
  clk: meson: gxbb: fix wrong clock for SARADC/SANA
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
* clk-remove-asm-clkdev:
  clk: Move __clk_{get,put}() into private clk.h API
  clk: sunxi: Use CLK_IS_CRITICAL flag for critical clks
  arch: Remove clkdev.h asm-generic from Kbuild
  clk: Prepare to remove asm-generic/clkdev.h
  blackfin: Use generic clkdev.h header

* clk-debugfs-fixes:
  clk: Simplify debugfs registration
  clk: Fix debugfs_create_*() usage
  clk: Show symbolic clock flags in debugfs
  clk: Improve flags doc for of_clk_detect_critical()

* clk-renesas:
  clk: renesas: r8a7796: Add FDP clock
  clk: renesas: cpg-mssr: Keep wakeup sources active during system suspend
  clk: renesas: mstp: Keep wakeup sources active during system suspend
  clk: renesas: r8a77970: Add LVDS clock

* clk-meson:
  clk: meson-axg: fix potential NULL dereference in axg_clkc_probe()
  clk: meson-axg: make local symbol axg_gp0_params_table static
  clk: meson-axg: fix return value check in axg_clkc_probe()
  clk: meson: mpll: use 64-bit maths in params_from_rate
  clk: meson-axg: add clock controller drivers
  clk: meson-axg: add clocks dt-bindings required header
  dt-bindings: clock: add compatible variant for the Meson-AXG
  clk: meson: make the spinlock naming more specific
  clk: meson: gxbb: remove IGNORE_UNUSED from mmc clocks
  clk: meson: gxbb: fix wrong clock for SARADC/SANA
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branch 'clk-divider-container' into clk-next</title>
<updated>2018-01-27T00:43:14+00:00</updated>
<author>
<name>Stephen Boyd</name>
<email>sboyd@codeaurora.org</email>
</author>
<published>2018-01-27T00:42:03+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=716d9b1d4a88493ec3e52957cc1026d32534ee67'/>
<id>716d9b1d4a88493ec3e52957cc1026d32534ee67</id>
<content type='text'>
* clk-divider-container:
  clk: divider: fix incorrect usage of container_of

Plus fixup sprd/div.c to pass the width too.
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
* clk-divider-container:
  clk: divider: fix incorrect usage of container_of

Plus fixup sprd/div.c to pass the width too.
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branches 'clk-spreadtrum', 'clk-mvebu-dvfs', 'clk-qoriq', 'clk-imx' and 'clk-qcom-ipq8074' into clk-next</title>
<updated>2018-01-27T00:41:47+00:00</updated>
<author>
<name>Stephen Boyd</name>
<email>sboyd@codeaurora.org</email>
</author>
<published>2018-01-27T00:41:47+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=21170e3bda0e425d7301f27e6bee7e84cfbfa519'/>
<id>21170e3bda0e425d7301f27e6bee7e84cfbfa519</id>
<content type='text'>
* clk-spreadtrum:
  clk: sprd: add clocks support for SC9860
  clk: sprd: Add dt-bindings include file for SC9860
  dt-bindings: Add Spreadtrum clock binding documentation
  clk: sprd: add adjustable pll support
  clk: sprd: add composite clock support
  clk: sprd: add divider clock support
  clk: sprd: add mux clock support
  clk: sprd: add gate clock support
  clk: sprd: Add common infrastructure
  clk: move clock common macros out from vendor directories

* clk-mvebu-dvfs:
  clk: mvebu: armada-37xx-periph: add DVFS support for cpu clocks
  clk: mvebu: armada-37xx-periph: prepare cpu clk to be used with DVFS
  clk: mvebu: armada-37xx-periph: cosmetic changes

* clk-qoriq:
  clk: qoriq: add more divider clocks support

* clk-imx:
  clk: imx51: uart4, uart5 gates only exist on imx50, imx53

* clk-qcom-ipq8074:
  clk: qcom: ipq8074: add misc resets for PCIE and NSS
  dt-bindings: clock: qcom: add misc resets for PCIE and NSS
  clk: qcom: ipq8074: add GP and Crypto clocks
  clk: qcom: ipq8074: add NSS ethernet port clocks
  clk: qcom: ipq8074: add NSS clocks
  clk: qcom: ipq8074: add PCIE, USB and SDCC clocks
  clk: qcom: ipq8074: add remaining PLL’s
  dt-bindings: clock: qcom: add remaining clocks for IPQ8074
  clk: qcom: ipq8074: fix missing GPLL0 divider width
  clk: qcom: add parent map for regmap mux
  clk: qcom: add read-only divider operations
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
* clk-spreadtrum:
  clk: sprd: add clocks support for SC9860
  clk: sprd: Add dt-bindings include file for SC9860
  dt-bindings: Add Spreadtrum clock binding documentation
  clk: sprd: add adjustable pll support
  clk: sprd: add composite clock support
  clk: sprd: add divider clock support
  clk: sprd: add mux clock support
  clk: sprd: add gate clock support
  clk: sprd: Add common infrastructure
  clk: move clock common macros out from vendor directories

* clk-mvebu-dvfs:
  clk: mvebu: armada-37xx-periph: add DVFS support for cpu clocks
  clk: mvebu: armada-37xx-periph: prepare cpu clk to be used with DVFS
  clk: mvebu: armada-37xx-periph: cosmetic changes

* clk-qoriq:
  clk: qoriq: add more divider clocks support

* clk-imx:
  clk: imx51: uart4, uart5 gates only exist on imx50, imx53

* clk-qcom-ipq8074:
  clk: qcom: ipq8074: add misc resets for PCIE and NSS
  dt-bindings: clock: qcom: add misc resets for PCIE and NSS
  clk: qcom: ipq8074: add GP and Crypto clocks
  clk: qcom: ipq8074: add NSS ethernet port clocks
  clk: qcom: ipq8074: add NSS clocks
  clk: qcom: ipq8074: add PCIE, USB and SDCC clocks
  clk: qcom: ipq8074: add remaining PLL’s
  dt-bindings: clock: qcom: add remaining clocks for IPQ8074
  clk: qcom: ipq8074: fix missing GPLL0 divider width
  clk: qcom: add parent map for regmap mux
  clk: qcom: add read-only divider operations
</pre>
</div>
</content>
</entry>
<entry>
<title>clk: Show symbolic clock flags in debugfs</title>
<updated>2018-01-10T21:13:22+00:00</updated>
<author>
<name>Geert Uytterhoeven</name>
<email>geert+renesas@glider.be</email>
</author>
<published>2018-01-03T11:06:16+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=a6059ab98130fb561157682d320c51c5ccd4b647'/>
<id>a6059ab98130fb561157682d320c51c5ccd4b647</id>
<content type='text'>
Currently the virtual "clk_flags" file in debugfs shows the numeric
value of the top-level framework flags for the specified clock.
Hence the user must manually interpret these values.

Moreover, on big-endian 64-bit systems, the wrong half of the value is
shown, due to the cast from "unsigned long *" to "u32 *".

Fix both issues by showing the symbolic flag names instead.
Any non-standard flags are shown as a hex number.

Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Currently the virtual "clk_flags" file in debugfs shows the numeric
value of the top-level framework flags for the specified clock.
Hence the user must manually interpret these values.

Moreover, on big-endian 64-bit systems, the wrong half of the value is
shown, due to the cast from "unsigned long *" to "u32 *".

Fix both issues by showing the symbolic flag names instead.
Any non-standard flags are shown as a hex number.

Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>clk: divider: fix incorrect usage of container_of</title>
<updated>2017-12-28T23:16:04+00:00</updated>
<author>
<name>Jerome Brunet</name>
<email>jbrunet@baylibre.com</email>
</author>
<published>2017-12-21T16:30:54+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=12a26c298d2a8b1cab498533fa65198e49e3afd3'/>
<id>12a26c298d2a8b1cab498533fa65198e49e3afd3</id>
<content type='text'>
divider_recalc_rate() is an helper function used by clock divider of
different types, so the structure containing the 'hw' pointer is not
always a 'struct clk_divider'

At the following line:
&gt; div = _get_div(table, val, flags, divider-&gt;width);

in several cases, the value of 'divider-&gt;width' is garbage as the actual
structure behind this memory is not a 'struct clk_divider'

Fortunately, this width value is used by _get_val() only when
CLK_DIVIDER_MAX_AT_ZERO flag is set. This has never been the case so
far when the structure is not a 'struct clk_divider'. This is probably
why we did not notice this bug before

Fixes: afe76c8fd030 ("clk: allow a clk divider with max divisor when zero")
Signed-off-by: Jerome Brunet &lt;jbrunet@baylibre.com&gt;
Acked-by: Alexandre Belloni &lt;alexandre.belloni@free-electrons.com&gt;
Acked-by: Sylvain Lemieux &lt;slemieux.tyco@gmail.com&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
divider_recalc_rate() is an helper function used by clock divider of
different types, so the structure containing the 'hw' pointer is not
always a 'struct clk_divider'

At the following line:
&gt; div = _get_div(table, val, flags, divider-&gt;width);

in several cases, the value of 'divider-&gt;width' is garbage as the actual
structure behind this memory is not a 'struct clk_divider'

Fortunately, this width value is used by _get_val() only when
CLK_DIVIDER_MAX_AT_ZERO flag is set. This has never been the case so
far when the structure is not a 'struct clk_divider'. This is probably
why we did not notice this bug before

Fixes: afe76c8fd030 ("clk: allow a clk divider with max divisor when zero")
Signed-off-by: Jerome Brunet &lt;jbrunet@baylibre.com&gt;
Acked-by: Alexandre Belloni &lt;alexandre.belloni@free-electrons.com&gt;
Acked-by: Sylvain Lemieux &lt;slemieux.tyco@gmail.com&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>clk: move clock common macros out from vendor directories</title>
<updated>2017-12-21T23:00:38+00:00</updated>
<author>
<name>Chunyan Zhang</name>
<email>chunyan.zhang@spreadtrum.com</email>
</author>
<published>2017-12-07T12:57:04+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=1ded879e12310b1f8f81b1f84e293933a3b69f14'/>
<id>1ded879e12310b1f8f81b1f84e293933a3b69f14</id>
<content type='text'>
These macros are used by more than one SoC vendor platforms, avoid to
have many copies of these code, this patch moves them to the common
header file which every clock drivers can access to.

Signed-off-by: Chunyan Zhang &lt;chunyan.zhang@spreadtrum.com&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
These macros are used by more than one SoC vendor platforms, avoid to
have many copies of these code, this patch moves them to the common
header file which every clock drivers can access to.

Signed-off-by: Chunyan Zhang &lt;chunyan.zhang@spreadtrum.com&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>clk: add clock protection mechanism to clk core</title>
<updated>2017-12-20T00:17:49+00:00</updated>
<author>
<name>Jerome Brunet</name>
<email>jbrunet@baylibre.com</email>
</author>
<published>2017-12-01T21:51:56+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=e55a839a7a1c561b7d2fbd9cc50b7d40dd2b3361'/>
<id>e55a839a7a1c561b7d2fbd9cc50b7d40dd2b3361</id>
<content type='text'>
The patch adds clk_core_protect and clk_core_unprotect to the internal
CCF API. These functions allow to set a new constraint along the clock
tree to prevent any change, even indirect, which may result in rate
change or glitch.

Tested-by: Maxime Ripard &lt;maxime.ripard@free-electrons.com&gt;
Acked-by: Michael Turquette &lt;mturquette@baylibre.com&gt;
Signed-off-by: Jerome Brunet &lt;jbrunet@baylibre.com&gt;
Signed-off-by: Michael Turquette &lt;mturquette@baylibre.com&gt;
Link: lkml.kernel.org/r/20171201215200.23523-7-jbrunet@baylibre.com
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The patch adds clk_core_protect and clk_core_unprotect to the internal
CCF API. These functions allow to set a new constraint along the clock
tree to prevent any change, even indirect, which may result in rate
change or glitch.

Tested-by: Maxime Ripard &lt;maxime.ripard@free-electrons.com&gt;
Acked-by: Michael Turquette &lt;mturquette@baylibre.com&gt;
Signed-off-by: Jerome Brunet &lt;jbrunet@baylibre.com&gt;
Signed-off-by: Michael Turquette &lt;mturquette@baylibre.com&gt;
Link: lkml.kernel.org/r/20171201215200.23523-7-jbrunet@baylibre.com
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branch 'clk-gpio' into clk-next</title>
<updated>2017-11-14T18:07:45+00:00</updated>
<author>
<name>Stephen Boyd</name>
<email>sboyd@codeaurora.org</email>
</author>
<published>2017-11-14T18:07:45+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=e8d07fd258a4ab8be7e85de44ffa2e362b49a743'/>
<id>e8d07fd258a4ab8be7e85de44ffa2e362b49a743</id>
<content type='text'>
* clk-gpio:
  clk: clk-gpio: Request GPIO descriptor as LOW
  clk: clk-gpio: Make GPIO clock provider use descriptors only
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
* clk-gpio:
  clk: clk-gpio: Request GPIO descriptor as LOW
  clk: clk-gpio: Make GPIO clock provider use descriptors only
</pre>
</div>
</content>
</entry>
<entry>
<title>clk: clk-gpio: Make GPIO clock provider use descriptors only</title>
<updated>2017-11-02T08:20:38+00:00</updated>
<author>
<name>Linus Walleij</name>
<email>linus.walleij@linaro.org</email>
</author>
<published>2017-09-24T16:19:18+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=908a543ac7cdf3aa8a283ec42cab3c16e2fc45a2'/>
<id>908a543ac7cdf3aa8a283ec42cab3c16e2fc45a2</id>
<content type='text'>
After som grep:ing it turns out nothing in the kernel is really calling
clk_[hw_]_register_gpio_[gate|mux](). All existing instances are just
created directly from the device tree probe functions at the bottom of
the clk-gpio.c clock provider file.

This means we can change the signature of the function without any
consequences! Everyone should be using GPIO descriptors now, so let's
just go in and enforce that.

This saves a bit of code since GPIO descriptors know inherently if they
are active low so no need for the code keeping track of that.

We leave it to the caller to come up with the GPIO descriptor. It is
nowadays possible to do that even without a corresponding device, so
no excuse not to pass them around. The one in-kernel user lifecycles
it using devm_gpiod_get() in gpio_clk_driver_probe().

Cc: Sergej Sawazki &lt;ce3a@gmx.de&gt;
Cc: Jyri Sarha &lt;jsarha@ti.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
After som grep:ing it turns out nothing in the kernel is really calling
clk_[hw_]_register_gpio_[gate|mux](). All existing instances are just
created directly from the device tree probe functions at the bottom of
the clk-gpio.c clock provider file.

This means we can change the signature of the function without any
consequences! Everyone should be using GPIO descriptors now, so let's
just go in and enforce that.

This saves a bit of code since GPIO descriptors know inherently if they
are active low so no need for the code keeping track of that.

We leave it to the caller to come up with the GPIO descriptor. It is
nowadays possible to do that even without a corresponding device, so
no excuse not to pass them around. The one in-kernel user lifecycles
it using devm_gpiod_get() in gpio_clk_driver_probe().

Cc: Sergej Sawazki &lt;ce3a@gmx.de&gt;
Cc: Jyri Sarha &lt;jsarha@ti.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>clk: Add devm_of_clk_add_hw_provider()/del_provider() APIs</title>
<updated>2017-11-02T06:37:19+00:00</updated>
<author>
<name>Stephen Boyd</name>
<email>sboyd@codeaurora.org</email>
</author>
<published>2017-09-01T23:16:40+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=aa795c41d9cd41dc9c915dd1956ddd0e4ae44485'/>
<id>aa795c41d9cd41dc9c915dd1956ddd0e4ae44485</id>
<content type='text'>
Sometimes we only have one of_clk_del_provider() call in driver
error and remove paths, because we're missing a
devm_of_clk_add_hw_provider() API. Introduce the API so we can
convert drivers to use this and potentially reduce the amount of
code needed to remove providers in drivers.

Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Sometimes we only have one of_clk_del_provider() call in driver
error and remove paths, because we're missing a
devm_of_clk_add_hw_provider() API. Introduce the API so we can
convert drivers to use this and potentially reduce the amount of
code needed to remove providers in drivers.

Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
</pre>
</div>
</content>
</entry>
</feed>
