linux-toradex.git/include/linux/fsl_devices.h, branch v2.6.26-rc5

Remove "#ifdef KERNEL" checks from unexported headers

2008-04-30T15:29:54+00:00

Remove the "#ifdef __KERNEL__" tests from unexported header files in
linux/include whose entire contents are wrapped in that preprocessor
test.

Signed-off-by: Robert P. J. Day 
Cc: David Woodhouse 
Cc: Sam Ravnborg 
Signed-off-by: Andrew Morton 
Signed-off-by: Linus Torvalds

phy: Change mii_bus id field to a string

2008-04-17T00:09:35+00:00

Having the id field be an int was making more complex bus topologies
excessively difficult.  For now, just convert it to a string, and
change all instances of "bus->id = val" to
snprintf(id, MII_BUS_ID_LEN, "%x", val).

Signed-off-by: Andy Fleming 
Signed-off-by: Jeff Garzik

Fix RGMII-ID handling in gianfar

2007-07-18T22:29:37+00:00

The TSEC/eTSEC can detect the interface to the PHY automatically,
but it isn't able to detect whether the RGMII connection needs internal
delay.  So we need to detect that change in the device tree, propagate
it to the platform data, and then check it if we're in RGMII.  This fixes
a bug on the 8641D HPCN board where the Vitesse PHY doesn't use the delay
for RGMII.

Signed-off-by: Andy Fleming

spi_mpc83xx.c: support QE enabled 83xx CPU's like mpc832x

2007-07-17T17:23:05+00:00

Quicc Engine enabled mpc83xx CPU's has a somewhat different HW interface to
the SPI controller.  This patch adds a qe_mode knob that sees to that
needed adaptions are performed.

Signed-off-by: Joakim Tjernlund 
Signed-off-by: David Brownell 
Signed-off-by: Andrew Morton 
Signed-off-by: Linus Torvalds

[POWERPC] 8xx: mpc885ads pcmcia support

2007-07-10T05:33:51+00:00

Adds support for PowerQuicc on-chip PCMCIA.  The driver is implemented as
of_device, so only arch/powerpc stuff is capable to use it, which now implies
only mpc885ads reference board.

To cope with the code that should be hooked inside driver, but is really board
specific (like set_voltage), global structure mpc8xx_pcmcia_ops holds
necessary function pointers that are filled in the BSP code.

[akpm@linux-foundation.org: whitespace diddles]
Signed-off-by: Vitaly Bordug 
Acked-by: Arnd Bergmann 
Acked-by: Olof Johansson 
Cc: Dominik Brodowski 
Cc: Paul Mackerras 
Cc: Benjamin Herrenschmidt 
Signed-off-by: Andrew Morton 
Signed-off-by: Kumar Gala

ucc_geth: migrate ucc_geth to phylib

2007-04-28T15:01:04+00:00

migrate ucc_geth to use the common phylib code.

There are several side effects from doing this:

o deprecate 'interface' property specification present
  in some old device tree source files in
  favour of a split 'max-speed' and 'interface-type'
  description to appropriately match definitions
  in include/linux/phy.h.  Note that 'interface' property
  is still honoured if max-speed or interface-type
  are not present (backward compatible).
o compile-time CONFIG_UGETH_HAS_GIGA is eliminated
  in favour of probe time speed derivation logic.
o adjust_link streamlined to only operate on maccfg2
  and upsmr.r10m, instead of reapplying static initial
  values related to the interface-type.
o Addition of UEC MDIO of_platform driver requires
  platform code add 'mdio' type to id list
  prior to calling of_platform_bus_probe (separate patch).
o ucc_struct_init introduced to reduce ucc_geth_startup
  complexity.

Signed-off-by: Li Yang 
Signed-off-by: Kim Phillips 
Signed-off-by: Jeff Garzik

[PPC] Fix compile failure do to introduction of PHY_POLL

2006-12-11T05:26:16+00:00

PHY_POLL is defined in  include it in  so
board code will have it defined.

Signed-off-by: Kumar Gala

[POWERPC] Add QUICC Engine (QE) infrastructure

2006-10-04T05:24:27+00:00

Add QUICC Engine (QE) configuration, header files, and
QE management and library code that are used by QE devices
drivers.

Includes Leo's modifications up to, and including, the
platform_device to of_device adaptation:

"The series of patches add generic QE infrastructure called
qe_lib, and MPC8360EMDS board support.  Qe_lib is used by
QE device drivers such as ucc_geth driver.

This version updates QE interrupt controller to use new irq
mapping mechanism, addresses all the comments received with
last submission and includes some style fixes.

v2: Change to use device tree for BCSR and MURAM;
Remove I/O port interrupt handling code as it is not generic
enough.

v3: Address comments from Kumar;  Update definition of several
device tree nodes;  Copyright style change."

In addition, the following changes have been made:

o removed typedefs
o uint -> u32 conversions
o removed following defines:
  QE_SIZEOF_BD, BD_BUFFER_ARG, BD_BUFFER_CLEAR, BD_BUFFER,
  BD_STATUS_AND_LENGTH_SET, BD_STATUS_AND_LENGTH, and BD_BUFFER_SET
  because they hid sizeof/in_be32/out_be32 operations from the reader.
o fixed qe_snums_init() serial num assignment to use a const array
o made CONFIG_UCC_FAST select UCC_SLOW
o reduced NR_QE_IC_INTS from 128 to 64
o remove _IO_BASE, etc. defines (not used)
o removed irrelevant comments, added others to resemble removed BD_ defines
o realigned struct definitions in headers
o various other style fixes including things like pinMask -> pin_mask
o fixed a ton of whitespace issues
o marked ioregs as __be32/__be16
o removed platform_device code and redundant get_qe_base()
o removed redundant comments
o added cpu_relax() to qe_reset
o uncasted all get_property() assignments
o eliminated unneeded casts
o eliminated immrbar_phys_to_virt (not used)

Signed-off-by: Li Yang 
Signed-off-by: Shlomi Gridish 
Signed-off-by: Kim Phillips 
Signed-off-by: Paul Mackerras

[PATCH] spi: add spi master driver for Freescale MPC83xx SPI controller

2006-05-21T19:59:19+00:00

This driver supports the SPI controller on the MPC83xx SoC devices from
Freescale.  Note, this driver supports only the simple shift register SPI
controller and not the descriptor based CPM or QUICCEngine SPI controller.

Signed-off-by: Kumar Gala 
Signed-off-by: David Brownell 
Cc: Greg KH 
Signed-off-by: Andrew Morton 
Signed-off-by: Linus Torvalds

[PATCH] USB: EHCI for Freescale 83xx

2006-03-20T22:49:55+00:00

Adding a Host Mode USB driver for the Freescale 83xx.

This driver supports both the Dual-Role (DR) controller and the
Multi-Port-Host (MPH) controller present in the Freescale MPC8349. It has
been tested with the MPC8349CDS reference system. This driver depends on
platform support code for setting up the pins on the device package in a
manner appropriate for the board in use. Note that this patch requires
selecting the EHCI controller option under the USB Host menu.

Signed-off-by: Randy Vinson 
Signed-off-by: Greg Kroah-Hartman