<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-toradex.git/include/linux/intel-iommu.h, branch v4.18-rc4</title>
<subtitle>Linux kernel for Apalis and Colibri modules</subtitle>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/'/>
<entry>
<title>iommu/vt-d: Clean up pasid quirk for pre-production devices</title>
<updated>2018-05-15T14:34:52+00:00</updated>
<author>
<name>Lu Baolu</name>
<email>baolu.lu@linux.intel.com</email>
</author>
<published>2018-05-04T05:08:18+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=ab96746aaa344fb720a198245a837e266fad3b62'/>
<id>ab96746aaa344fb720a198245a837e266fad3b62</id>
<content type='text'>
The pasid28 quirk is needed only for some pre-production devices.
Remove it to make the code concise.

Signed-off-by: Ashok Raj &lt;ashok.raj@intel.com&gt;
Signed-off-by: Lu Baolu &lt;baolu.lu@linux.intel.com&gt;
Signed-off-by: Joerg Roedel &lt;jroedel@suse.de&gt;
</content>
<content type='xhtml'>
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<pre>
The pasid28 quirk is needed only for some pre-production devices.
Remove it to make the code concise.

Signed-off-by: Ashok Raj &lt;ashok.raj@intel.com&gt;
Signed-off-by: Lu Baolu &lt;baolu.lu@linux.intel.com&gt;
Signed-off-by: Joerg Roedel &lt;jroedel@suse.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>iommu/vt-d: Clean/document fault status flags</title>
<updated>2018-02-13T16:40:54+00:00</updated>
<author>
<name>Dmitry Safonov</name>
<email>dima@arista.com</email>
</author>
<published>2018-02-12T16:48:21+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=b1d03c1d12abbfa7de127772f281b309cf1650c3'/>
<id>b1d03c1d12abbfa7de127772f281b309cf1650c3</id>
<content type='text'>
So one could decode them without opening the specification.

Signed-off-by: Dmitry Safonov &lt;dima@arista.com&gt;
Signed-off-by: Joerg Roedel &lt;jroedel@suse.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
So one could decode them without opening the specification.

Signed-off-by: Dmitry Safonov &lt;dima@arista.com&gt;
Signed-off-by: Joerg Roedel &lt;jroedel@suse.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>iommu/vt-d: Add a check for 5-level paging support</title>
<updated>2018-01-17T14:02:50+00:00</updated>
<author>
<name>Sohil Mehta</name>
<email>sohil.mehta@intel.com</email>
</author>
<published>2017-12-20T19:59:26+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=f1ac10c24efbbcba0f8dae37ee90d45847f5c5af'/>
<id>f1ac10c24efbbcba0f8dae37ee90d45847f5c5af</id>
<content type='text'>
Add a check to verify IOMMU 5-level paging support. If the CPU supports
supports 5-level paging but the IOMMU does not support it then disable
SVM by not allocating PASID tables.

Signed-off-by: Sohil Mehta &lt;sohil.mehta@intel.com&gt;
Signed-off-by: Joerg Roedel &lt;jroedel@suse.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add a check to verify IOMMU 5-level paging support. If the CPU supports
supports 5-level paging but the IOMMU does not support it then disable
SVM by not allocating PASID tables.

Signed-off-by: Sohil Mehta &lt;sohil.mehta@intel.com&gt;
Signed-off-by: Joerg Roedel &lt;jroedel@suse.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>iommu/vt-d: Add a check for 1GB page support</title>
<updated>2018-01-17T14:02:50+00:00</updated>
<author>
<name>Sohil Mehta</name>
<email>sohil.mehta@intel.com</email>
</author>
<published>2017-12-20T19:59:25+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=59103caa6839592788e7ad58b35863aac034631a'/>
<id>59103caa6839592788e7ad58b35863aac034631a</id>
<content type='text'>
Add a check to verify IOMMU 1GB page support. If the CPU supports 1GB
pages but the IOMMU does not support it then disable SVM by not
allocating PASID tables.

Signed-off-by: Sohil Mehta &lt;sohil.mehta@intel.com&gt;
Signed-off-by: Joerg Roedel &lt;jroedel@suse.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add a check to verify IOMMU 1GB page support. If the CPU supports 1GB
pages but the IOMMU does not support it then disable SVM by not
allocating PASID tables.

Signed-off-by: Sohil Mehta &lt;sohil.mehta@intel.com&gt;
Signed-off-by: Joerg Roedel &lt;jroedel@suse.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>iommu/vt-d: Clear Page Request Overflow fault bit</title>
<updated>2017-11-03T16:51:33+00:00</updated>
<author>
<name>Lu Baolu</name>
<email>baolu.lu@linux.intel.com</email>
</author>
<published>2017-11-03T16:51:33+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=973b546451fdf11e518cc96d1b137af893a38db5'/>
<id>973b546451fdf11e518cc96d1b137af893a38db5</id>
<content type='text'>
Currently Page Request Overflow bit in IOMMU Fault Status register
is not cleared. Not clearing this bit would mean that any  future
page-request is going to be automatically dropped by IOMMU.

Suggested-by: Ashok Raj &lt;ashok.raj@intel.com&gt;
Signed-off-by: Lu Baolu &lt;baolu.lu@linux.intel.com&gt;
Signed-off-by: Alex Williamson &lt;alex.williamson@redhat.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Currently Page Request Overflow bit in IOMMU Fault Status register
is not cleared. Not clearing this bit would mean that any  future
page-request is going to be automatically dropped by IOMMU.

Suggested-by: Ashok Raj &lt;ashok.raj@intel.com&gt;
Signed-off-by: Lu Baolu &lt;baolu.lu@linux.intel.com&gt;
Signed-off-by: Alex Williamson &lt;alex.williamson@redhat.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>iommu/vt-d: Use lo_hi_readq() / lo_hi_writeq()</title>
<updated>2017-03-22T14:42:17+00:00</updated>
<author>
<name>Andy Shevchenko</name>
<email>andriy.shevchenko@linux.intel.com</email>
</author>
<published>2017-03-16T14:23:55+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=61012985eb132a2fa5e4a3eddbc33528334fa377'/>
<id>61012985eb132a2fa5e4a3eddbc33528334fa377</id>
<content type='text'>
There is already helper functions to do 64-bit I/O on 32-bit machines or
buses, thus we don't need to reinvent the wheel.

Signed-off-by: Andy Shevchenko &lt;andriy.shevchenko@linux.intel.com&gt;
Signed-off-by: Joerg Roedel &lt;jroedel@suse.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
There is already helper functions to do 64-bit I/O on 32-bit machines or
buses, thus we don't need to reinvent the wheel.

Signed-off-by: Andy Shevchenko &lt;andriy.shevchenko@linux.intel.com&gt;
Signed-off-by: Joerg Roedel &lt;jroedel@suse.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branches 'iommu/fixes', 'arm/exynos', 'arm/renesas', 'arm/smmu', 'arm/mediatek', 'arm/core', 'x86/vt-d' and 'core' into next</title>
<updated>2017-02-10T14:13:10+00:00</updated>
<author>
<name>Joerg Roedel</name>
<email>jroedel@suse.de</email>
</author>
<published>2017-02-10T14:13:10+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=8d2932dd0634ebeb0a42df896976772bdb569bfe'/>
<id>8d2932dd0634ebeb0a42df896976772bdb569bfe</id>
<content type='text'>
</content>
<content type='xhtml'>
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<pre>
</pre>
</div>
</content>
</entry>
<entry>
<title>iommu: Add sysfs bindings for struct iommu_device</title>
<updated>2017-02-10T12:44:57+00:00</updated>
<author>
<name>Joerg Roedel</name>
<email>jroedel@suse.de</email>
</author>
<published>2017-02-01T15:56:46+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=39ab9555c24110671f8dc671311a26e5c985b592'/>
<id>39ab9555c24110671f8dc671311a26e5c985b592</id>
<content type='text'>
There is currently support for iommu sysfs bindings, but
those need to be implemented in the IOMMU drivers. Add a
more generic version of this by adding a struct device to
struct iommu_device and use that for the sysfs bindings.

Also convert the AMD and Intel IOMMU driver to make use of
it.

Signed-off-by: Joerg Roedel &lt;jroedel@suse.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
There is currently support for iommu sysfs bindings, but
those need to be implemented in the IOMMU drivers. Add a
more generic version of this by adding a struct device to
struct iommu_device and use that for the sysfs bindings.

Also convert the AMD and Intel IOMMU driver to make use of
it.

Signed-off-by: Joerg Roedel &lt;jroedel@suse.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>iommu: Introduce new 'struct iommu_device'</title>
<updated>2017-02-10T12:44:57+00:00</updated>
<author>
<name>Joerg Roedel</name>
<email>jroedel@suse.de</email>
</author>
<published>2017-02-01T12:23:08+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=b0119e870837dcd15a207b4701542ebac5d19b45'/>
<id>b0119e870837dcd15a207b4701542ebac5d19b45</id>
<content type='text'>
This struct represents one hardware iommu in the iommu core
code. For now it only has the iommu-ops associated with it,
but that will be extended soon.

The register/unregister interface is also added, as well as
making use of it in the Intel and AMD IOMMU drivers.

Signed-off-by: Joerg Roedel &lt;jroedel@suse.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This struct represents one hardware iommu in the iommu core
code. For now it only has the iommu-ops associated with it,
but that will be extended soon.

The register/unregister interface is also added, as well as
making use of it in the Intel and AMD IOMMU drivers.

Signed-off-by: Joerg Roedel &lt;jroedel@suse.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>iommu/vt-d: Fix some macros that are incorrectly specified in intel-iommu</title>
<updated>2017-01-31T11:50:05+00:00</updated>
<author>
<name>CQ Tang</name>
<email>cq.tang@intel.com</email>
</author>
<published>2017-01-30T17:39:52+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=aaa59306b0b7e0ca4ba92cc04c5db101cbb1c096'/>
<id>aaa59306b0b7e0ca4ba92cc04c5db101cbb1c096</id>
<content type='text'>
Some of the macros are incorrect with wrong bit-shifts resulting in picking
the incorrect invalidation granularity. Incorrect Source-ID in extended
devtlb invalidation caused device side errors.

To: Joerg Roedel &lt;joro@8bytes.org&gt;
To: David Woodhouse &lt;dwmw2@infradead.org&gt;
Cc: iommu@lists.linux-foundation.org
Cc: linux-kernel@vger.kernel.org
Cc: stable@vger.kernel.org
Cc: CQ Tang &lt;cq.tang@intel.com&gt;
Cc: Ashok Raj &lt;ashok.raj@intel.com&gt;

Fixes: 2f26e0a9 ("iommu/vt-d: Add basic SVM PASID support")
Signed-off-by: CQ Tang &lt;cq.tang@intel.com&gt;
Signed-off-by: Ashok Raj &lt;ashok.raj@intel.com&gt;
Tested-by: CQ Tang &lt;cq.tang@intel.com&gt;
Signed-off-by: Joerg Roedel &lt;jroedel@suse.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Some of the macros are incorrect with wrong bit-shifts resulting in picking
the incorrect invalidation granularity. Incorrect Source-ID in extended
devtlb invalidation caused device side errors.

To: Joerg Roedel &lt;joro@8bytes.org&gt;
To: David Woodhouse &lt;dwmw2@infradead.org&gt;
Cc: iommu@lists.linux-foundation.org
Cc: linux-kernel@vger.kernel.org
Cc: stable@vger.kernel.org
Cc: CQ Tang &lt;cq.tang@intel.com&gt;
Cc: Ashok Raj &lt;ashok.raj@intel.com&gt;

Fixes: 2f26e0a9 ("iommu/vt-d: Add basic SVM PASID support")
Signed-off-by: CQ Tang &lt;cq.tang@intel.com&gt;
Signed-off-by: Ashok Raj &lt;ashok.raj@intel.com&gt;
Tested-by: CQ Tang &lt;cq.tang@intel.com&gt;
Signed-off-by: Joerg Roedel &lt;jroedel@suse.de&gt;
</pre>
</div>
</content>
</entry>
</feed>
