linux-toradex.git/include/linux/intel-iommu.h, branch v4.8-rc6

iommu/vt-d: Clear PPR bit to ensure we get more page request interrupts

2016-02-15T12:42:38+00:00

According to the VT-d specification we need to clear the PPR bit in
the Page Request Status register when handling page requests, or the
hardware won't generate any more interrupts.

This wasn't actually necessary on SKL/KBL (which may well be the
subject of a hardware erratum, although it's harmless enough). But
other implementations do appear to get it right, and we only ever get
one interrupt unless we clear the PPR bit.

Reported-by: CQ Tang 
Signed-off-by: David Woodhouse 
Cc: stable@vger.kernel.org

iommu/vt-d: Implement SVM_FLAG_PRIVATE_PASID to allocate unique PASIDs

2015-10-15T14:35:32+00:00

Signed-off-by: David Woodhouse

iommu/vt-d: Add callback to device driver on page faults

2015-10-15T14:35:28+00:00

Signed-off-by: David Woodhouse

iommu/vt-d: Implement page request handling

2015-10-15T14:35:19+00:00

Largely based on the driver-mode implementation by Jesse Barnes.

Signed-off-by: David Woodhouse

iommu/vt-d: Generalise DMAR MSI setup to allow for page request events

2015-10-15T12:22:41+00:00

Signed-off-by: David Woodhouse

iommu/vt-d: Add basic SVM PASID support

2015-10-15T11:55:45+00:00

This provides basic PASID support for endpoint devices, tested with a
version of the i915 driver.

Signed-off-by: David Woodhouse

iommu/vt-d: Add initial support for PASID tables

2015-10-15T10:24:51+00:00

Add CONFIG_INTEL_IOMMU_SVM, and allocate PASID tables on supported hardware.

Signed-off-by: David Woodhouse

iommu/vt-d: Introduce intel_iommu=pasid28, and pasid_enabled() macro

2015-10-15T10:24:45+00:00

As long as we use an identity mapping to work around the worst of the
hardware bugs which caused us to defeature it and change the definition
of the capability bit, we *can* use PASID support on the devices which
advertised it in bit 28 of the Extended Capability Register.

Allow people to do so with 'intel_iommu=pasid28' on the command line.

Signed-off-by: David Woodhouse

iommu/vt-d: Use plain writeq() for dmar_writeq() where available

2015-10-13T19:48:23+00:00

Signed-off-by: David Woodhouse

iommu/vt-d: Split up iommu->domains array

2015-08-12T14:23:33+00:00

This array is indexed by the domain-id and contains the
pointers to the domains attached to this iommu. Modern
systems support 65536 domain ids, so that this array has a
size of 512kb, per iommu.

This is a huge waste of space, as the array is usually
sparsely populated. This patch makes the array
two-dimensional and allocates the memory for the domain
pointers on-demand.

Signed-off-by: Joerg Roedel