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<title>linux-toradex.git/include/linux/intel-svm.h, branch v5.1-rc1</title>
<subtitle>Linux kernel for Apalis and Colibri modules</subtitle>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/'/>
<entry>
<title>iommu/vt-d: Support page request in scalable mode</title>
<updated>2019-01-11T12:10:03+00:00</updated>
<author>
<name>Jacob Pan</name>
<email>jacob.jun.pan@linux.intel.com</email>
</author>
<published>2019-01-11T05:04:57+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=5b438f4ba315db4f8c1489d175656798d58c014f'/>
<id>5b438f4ba315db4f8c1489d175656798d58c014f</id>
<content type='text'>
VT-d Rev3.0 has made a few changes to the page request interface,

1. widened PRQ descriptor from 128 bits to 256 bits;
2. removed streaming response type;
3. introduced private data that requires page response even the
   request is not last request in group (LPIG).

This is a supplement to commit 1c4f88b7f1f92 ("iommu/vt-d: Shared
virtual address in scalable mode") and makes the svm code compliant
with VT-d Rev3.0.

Cc: Ashok Raj &lt;ashok.raj@intel.com&gt;
Cc: Liu Yi L &lt;yi.l.liu@intel.com&gt;
Cc: Kevin Tian &lt;kevin.tian@intel.com&gt;
Signed-off-by: Jacob Pan &lt;jacob.jun.pan@linux.intel.com&gt;
Fixes: 1c4f88b7f1f92 ("iommu/vt-d: Shared virtual address in scalable mode")
Signed-off-by: Lu Baolu &lt;baolu.lu@linux.intel.com&gt;
Signed-off-by: Joerg Roedel &lt;jroedel@suse.de&gt;
</content>
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<pre>
VT-d Rev3.0 has made a few changes to the page request interface,

1. widened PRQ descriptor from 128 bits to 256 bits;
2. removed streaming response type;
3. introduced private data that requires page response even the
   request is not last request in group (LPIG).

This is a supplement to commit 1c4f88b7f1f92 ("iommu/vt-d: Shared
virtual address in scalable mode") and makes the svm code compliant
with VT-d Rev3.0.

Cc: Ashok Raj &lt;ashok.raj@intel.com&gt;
Cc: Liu Yi L &lt;yi.l.liu@intel.com&gt;
Cc: Kevin Tian &lt;kevin.tian@intel.com&gt;
Signed-off-by: Jacob Pan &lt;jacob.jun.pan@linux.intel.com&gt;
Fixes: 1c4f88b7f1f92 ("iommu/vt-d: Shared virtual address in scalable mode")
Signed-off-by: Lu Baolu &lt;baolu.lu@linux.intel.com&gt;
Signed-off-by: Joerg Roedel &lt;jroedel@suse.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>iommu/vt-d: Helper function to query if a pasid has any active users</title>
<updated>2017-05-17T12:57:56+00:00</updated>
<author>
<name>CQ Tang</name>
<email>cq.tang@intel.com</email>
</author>
<published>2017-05-10T18:39:03+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=15060aba717115dc9f204c02213a7c6bf341163e'/>
<id>15060aba717115dc9f204c02213a7c6bf341163e</id>
<content type='text'>
A driver would need to know if there are any active references to a
a PASID before cleaning up its resources. This function helps check
if there are any active users of a PASID before it can perform any
recovery on that device.

To: Joerg Roedel &lt;joro@8bytes.org&gt;
To: linux-kernel@vger.kernel.org
To: David Woodhouse &lt;dwmw2@infradead.org&gt;
Cc: Jean-Phillipe Brucker &lt;jean-philippe.brucker@arm.com&gt;
Cc: iommu@lists.linux-foundation.org

Signed-off-by: CQ Tang &lt;cq.tang@intel.com&gt;
Signed-off-by: Ashok Raj &lt;ashok.raj@intel.com&gt;
Signed-off-by: Joerg Roedel &lt;jroedel@suse.de&gt;
</content>
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<pre>
A driver would need to know if there are any active references to a
a PASID before cleaning up its resources. This function helps check
if there are any active users of a PASID before it can perform any
recovery on that device.

To: Joerg Roedel &lt;joro@8bytes.org&gt;
To: linux-kernel@vger.kernel.org
To: David Woodhouse &lt;dwmw2@infradead.org&gt;
Cc: Jean-Phillipe Brucker &lt;jean-philippe.brucker@arm.com&gt;
Cc: iommu@lists.linux-foundation.org

Signed-off-by: CQ Tang &lt;cq.tang@intel.com&gt;
Signed-off-by: Ashok Raj &lt;ashok.raj@intel.com&gt;
Signed-off-by: Joerg Roedel &lt;jroedel@suse.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>iommu/vt-d: Expose struct svm_dev_ops without CONFIG_INTEL_IOMMU_SVM</title>
<updated>2015-10-26T23:36:08+00:00</updated>
<author>
<name>David Woodhouse</name>
<email>David.Woodhouse@intel.com</email>
</author>
<published>2015-10-26T23:36:08+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=da4689c0263ee5f4eee64e166a6bee6a68b9242e'/>
<id>da4689c0263ee5f4eee64e166a6bee6a68b9242e</id>
<content type='text'>
The point in providing an inline version of intel_svm_bind_mm() which
just returns -ENOSYS is that people are supposed to be able to *use* it
and just see that it fails. So we need to let them have a definition of
struct svm_dev_ops (and the flags) too.

Signed-off-by: David Woodhouse &lt;David.Woodhouse@intel.com&gt;
</content>
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<pre>
The point in providing an inline version of intel_svm_bind_mm() which
just returns -ENOSYS is that people are supposed to be able to *use* it
and just see that it fails. So we need to let them have a definition of
struct svm_dev_ops (and the flags) too.

Signed-off-by: David Woodhouse &lt;David.Woodhouse@intel.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>iommu/vt-d: Implement SVM_FLAG_SUPERVISOR_MODE for kernel access</title>
<updated>2015-10-15T14:52:21+00:00</updated>
<author>
<name>David Woodhouse</name>
<email>David.Woodhouse@intel.com</email>
</author>
<published>2015-10-15T14:52:15+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=5cec753709adf1a20c8b15edf8e5245cf4fd4e82'/>
<id>5cec753709adf1a20c8b15edf8e5245cf4fd4e82</id>
<content type='text'>
This is only usable for the static 1:1 mapping of physical memory.

Any access to vmalloc or module regions will require some way of doing
an IOTLB flush. It's theoretically possible to hook into the
tlb_flush_kernel_range() function, but that seems like overkill — most
of the addresses accessed through a kernel PASID *will* be in the 1:1
mapping.

If we really need to allow access to more interesting kernel regions,
then the answer will probably be an explicit IOTLB flush call after use,
akin to the DMA API's unmap function.

In fact, it might be worth introducing that sooner rather than later, and
making it just BUG() if the address isn't in the static 1:1 mapping.

Signed-off-by: David Woodhouse &lt;David.Woodhouse@intel.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This is only usable for the static 1:1 mapping of physical memory.

Any access to vmalloc or module regions will require some way of doing
an IOTLB flush. It's theoretically possible to hook into the
tlb_flush_kernel_range() function, but that seems like overkill — most
of the addresses accessed through a kernel PASID *will* be in the 1:1
mapping.

If we really need to allow access to more interesting kernel regions,
then the answer will probably be an explicit IOTLB flush call after use,
akin to the DMA API's unmap function.

In fact, it might be worth introducing that sooner rather than later, and
making it just BUG() if the address isn't in the static 1:1 mapping.

Signed-off-by: David Woodhouse &lt;David.Woodhouse@intel.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>iommu/vt-d: Implement SVM_FLAG_PRIVATE_PASID to allocate unique PASIDs</title>
<updated>2015-10-15T14:35:32+00:00</updated>
<author>
<name>David Woodhouse</name>
<email>David.Woodhouse@intel.com</email>
</author>
<published>2015-10-15T12:59:14+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=569e4f7782fb92d0e1b395b5fb01de642dd74dcf'/>
<id>569e4f7782fb92d0e1b395b5fb01de642dd74dcf</id>
<content type='text'>
Signed-off-by: David Woodhouse &lt;David.Woodhouse@intel.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Signed-off-by: David Woodhouse &lt;David.Woodhouse@intel.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>iommu/vt-d: Add callback to device driver on page faults</title>
<updated>2015-10-15T14:35:28+00:00</updated>
<author>
<name>David Woodhouse</name>
<email>David.Woodhouse@intel.com</email>
</author>
<published>2015-10-13T16:18:10+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=0204a49609824163092c32a8aeb073f7e9acc76d'/>
<id>0204a49609824163092c32a8aeb073f7e9acc76d</id>
<content type='text'>
Signed-off-by: David Woodhouse &lt;David.Woodhouse@intel.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Signed-off-by: David Woodhouse &lt;David.Woodhouse@intel.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>iommu/vt-d: Add basic SVM PASID support</title>
<updated>2015-10-15T11:55:45+00:00</updated>
<author>
<name>David Woodhouse</name>
<email>David.Woodhouse@intel.com</email>
</author>
<published>2015-09-09T10:40:47+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=2f26e0a9c9860db290d63e9d85c2c8c09813677f'/>
<id>2f26e0a9c9860db290d63e9d85c2c8c09813677f</id>
<content type='text'>
This provides basic PASID support for endpoint devices, tested with a
version of the i915 driver.

Signed-off-by: David Woodhouse &lt;David.Woodhouse@intel.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This provides basic PASID support for endpoint devices, tested with a
version of the i915 driver.

Signed-off-by: David Woodhouse &lt;David.Woodhouse@intel.com&gt;
</pre>
</div>
</content>
</entry>
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