Remove card states that no longer make any sense.

Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>

Create a "core" subdirectory to house the central bus handling
functions.

Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>

The classic MMC bus was defined as multi card bus
system, which is reflected in the design in the MMC
layer.

When SD showed up, the bus topology was abandoned
and a star topology (one card per host) was mandated.
MMC version 4 has followed this, officially deprecating
the bus topology.

As we do not have any known users of the bus
topology we can remove support for it. This will
simplify the code and rectify some incorrect
assumptions in the newer additions.

Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>

Split out the type of card into its own field as it hardly
qualifies as a state.

Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>

Support for MMC 4.2 sector based cards. This tweaks the init a
bit and reads a new field out of the EXT_CSD.

Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>

Thanks to the generous donation of an SDHC card by John Gilmore, and
the surprisingly enlightened decision by the SD Card Association to
publish useful specs, I've been able to bash out support for SDHC. The
changes are not too profound:

i) Add a card flag indicating the card uses block level addressing and
check it in the block driver. As we never took advantage of byte-level
addressing, this simply involves skipping the block -> byte
translation when sending commands.

ii) The layout of the CSD is changed - a set of fields are discarded
to make space for a larger C_SIZE. We did not reference any of the
discarded fields except those related to the C_SIZE.

iii) Read and write timeouts are fixed values and not calculated from
CSD values.

iv) Before invoking SEND_APP_OP_COND, we must invoke the new
SEND_IF_COND to inform the card we support SDHC.

Signed-off-by: Philipl Langdale <philipl@overt.org>
Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>

Modern SD cards support a clock speed of 50 MHz. Make sure we test for
this capability and do the song and dance required to activate it.

Activating high speed support actually modifies the TRAN_SPEED field
of the CSD. But as the spec says that the cards must report 50 MHz,
we might as well skip re-reading the CSD.

Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>

This adds support for the high-speed modes defined by mmc v4
(assuming the host controller is up to it). On a TI sdhci controller,
it improves read speed from 1.3MBps to 2.3MBps. The TI controller can
only go up to 24MHz, but everything helps. Another person has taken
this basic patch and used it on a Nokia 770 to get a bigger boost
because that controller can run at 48MHZ.

Signed-off-by: Philip Langdale <philipl@overt.org>
Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>

The CSD contains a "read2write factor" which determines the multiplier to
be applied to the read timeout to obtain the write timeout.  We were
ignoring this parameter, resulting in the possibility for writes being
timed out too early.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>