linux-toradex.git/include/linux/mmc/card.h, branch v3.0.79

mmc: core: Bus width testing needs to handle suspend/resume

2011-07-13T18:54:37+00:00

On reading the ext_csd for the first time (in 1 bit mode), save the
ext_csd information needed for bus width compare.

On every pass we make re-reading the ext_csd, compare the data
against the saved ext_csd data.

This fixes a regression introduced in 3.0-rc1 by 08ee80cc397ac1a3
("mmc: core: eMMC bus width may not work on all platforms"), which
incorrectly assumed we would be re-reading the ext_csd at resume-
time.

Signed-off-by: Philip Rakity 
Tested-by: Jaehoon Chung 
Signed-off-by: Chris Ball

mmc: core: Block CMD23 support for UHS104/SDXC cards.

2011-05-25T20:49:03+00:00

SD cards operating at UHS104 or better support SET_BLOCK_COUNT.

Signed-off-by: Andrei Warkentin 
Reviewed-by: Arindam Nath 
Signed-off-by: Chris Ball

mmc: core: Use CMD23 for multiblock transfers when we can.

2011-05-25T20:48:46+00:00

CMD23-prefixed instead of open-ended multiblock transfers
have a performance advantage on some MMC cards.

Signed-off-by: Andrei Warkentin 
Signed-off-by: Chris Ball

mmc: quirks: Add/remove quirks conditional support.

2011-05-25T03:54:01+00:00

Conditional add/remove quirks for MMC and SD.

Signed-off-by: Andrei Warkentin 
Signed-off-by: Chris Ball

mmc: sdio: optimized SDIO IRQ handling for single irq

2011-05-25T03:53:50+00:00

If there is only 1 function interrupt registered it is possible to
improve performance by directly calling the irq handler and avoiding
the overhead of reading the CCCR registers.

Signed-off-by: Per Forlin 
Acked-by: Ulf Hansson 
Reviewed-by: Nicolas Pitre 
Signed-off-by: Chris Ball

mmc: sd: report correct speed and capacity of uhs cards

2011-05-25T03:53:46+00:00

Since only UHS-I cards respond with S18A set in response to ACMD41,
we set the card as ultra-high-speed after successfull initialization.
We need to decide whether a card is SDXC based on the C_SIZE field
of CSDv2.0 register. According to Physical Layer spec v3.01, the
minimum value of C_SIZE for SDXC card is 00FFFFh.

Tested by Zhangfei Gao with a Toshiba uhs card and general hs card,
on mmp2 in SDMA mode.

Signed-off-by: Arindam Nath 
Reviewed-by: Philip Rakity 
Tested-by: Philip Rakity 
Acked-by: Zhangfei Gao 
Signed-off-by: Chris Ball

mmc: sd: set current limit for uhs cards

2011-05-25T03:53:45+00:00

We decide on the current limit to be set for the card based on the
Capability of Host Controller to provide current at 1.8V signalling,
and the maximum current limit of the card as indicated by CMD6
mode 0. We then set the current limit for the card using CMD6 mode 1.
As per the Physical Layer Spec v3.01, the current limit switch is
only applicable for SDR50, SDR104, and DDR50 bus speed modes. For
other UHS-I modes, we set the default current limit of 200mA.

Tested by Zhangfei Gao with a Toshiba uhs card and general hs card,
on mmp2 in SDMA mode.

Signed-off-by: Arindam Nath 
Reviewed-by: Philip Rakity 
Tested-by: Philip Rakity 
Acked-by: Zhangfei Gao 
Signed-off-by: Chris Ball

mmc: sd: add support for uhs bus speed mode selection

2011-05-25T03:53:45+00:00

This patch adds support for setting UHS-I bus speed mode during UHS-I
initialization procedure. Since both the host and card can support
more than one bus speed, we select the highest speed based on both of
their capabilities. First we set the bus speed mode for the card using
CMD6 mode 1, and then we program the host controller to support the
required speed mode. We also set High Speed Enable in case one of the
UHS-I modes is selected. We take care to reset SD clock before setting
UHS mode in the Host Control2 register, and then re-enable it as per
the Host Controller spec v3.00. We then set the clock frequency for
the UHS-I mode selected.

Tested by Zhangfei Gao with a Toshiba uhs card and general hs card,
on mmp2 in SDMA mode.

Signed-off-by: Arindam Nath 
Reviewed-by: Philip Rakity 
Tested-by: Philip Rakity 
Acked-by: Zhangfei Gao 
Signed-off-by: Chris Ball

mmc: sd: add support for driver type selection

2011-05-25T03:53:24+00:00

This patch adds support for setting driver strength during UHS-I
initialization procedure. Since UHS-I cards set S18A (bit 24) in
response to ACMD41, we use this as a base for UHS-I initialization.
We modify the parameter list of mmc_sd_get_cid() so that we can
save the ROCR from ACMD41 to check whether bit 24 is set.

We decide whether the Host Controller supports A, C, or D driver
type depending on the Capabilities register. Driver type B is
suported by default. We then set the appropriate driver type for
the card using CMD6 mode 1. As per Host Controller spec v3.00, we
set driver type for the host only if Preset Value Enable in the
Host Control2 register is not set. SDHCI_HOST_CONTROL has been
renamed to SDHCI_HOST_CONTROL1 to conform to the spec.

Tested by Zhangfei Gao with a Toshiba uhs card and general hs card,
on mmp2 in SDMA mode.

Signed-off-by: Arindam Nath 
Reviewed-by: Philip Rakity 
Tested-by: Philip Rakity 
Acked-by: Zhangfei Gao 
Signed-off-by: Chris Ball

mmc: sd: query function modes for uhs cards

2011-05-25T01:04:40+00:00

SD cards which conform to Physical Layer Spec v3.01 can support
additional Bus Speed Modes, Driver Strength, and Current Limit
other than the default values. We use CMD6 mode 0 to read these
additional card functions. The values read here will be used
during UHS-I initialization steps.

Tested by Zhangfei Gao with a Toshiba uhs card and general hs card,
on mmp2 in SDMA mode.

Signed-off-by: Arindam Nath 
Reviewed-by: Philip Rakity 
Tested-by: Philip Rakity 
Acked-by: Zhangfei Gao 
Signed-off-by: Chris Ball