<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-toradex.git/include/linux/pci-ecam.h, branch v5.10-rc2</title>
<subtitle>Linux kernel for Apalis and Colibri modules</subtitle>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/'/>
<entry>
<title>PCI/ACPI: Add Ampere Altra SOC MCFG quirk</title>
<updated>2020-09-17T17:27:43+00:00</updated>
<author>
<name>Tuan Phan</name>
<email>tuanphan@os.amperecomputing.com</email>
</author>
<published>2020-08-06T21:57:34+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=877c1a5f79c6984bbe3f2924234c08e2f4f1acd5'/>
<id>877c1a5f79c6984bbe3f2924234c08e2f4f1acd5</id>
<content type='text'>
Ampere Altra SOC supports only 32-bit ECAM reads.  Add an MCFG quirk for
the platform.

Link: https://lore.kernel.org/r/1596751055-12316-1-git-send-email-tuanphan@os.amperecomputing.com
Signed-off-by: Tuan Phan &lt;tuanphan@os.amperecomputing.com&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Ampere Altra SOC supports only 32-bit ECAM reads.  Add an MCFG quirk for
the platform.

Link: https://lore.kernel.org/r/1596751055-12316-1-git-send-email-tuanphan@os.amperecomputing.com
Signed-off-by: Tuan Phan &lt;tuanphan@os.amperecomputing.com&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>PCI: host-generic: Eliminate pci_host_common_probe wrappers</title>
<updated>2020-05-07T08:29:43+00:00</updated>
<author>
<name>Rob Herring</name>
<email>robh@kernel.org</email>
</author>
<published>2020-04-09T23:49:23+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=b2f75a41eaa6bfc4aa6f6a1faefbf21c2c8d1588'/>
<id>b2f75a41eaa6bfc4aa6f6a1faefbf21c2c8d1588</id>
<content type='text'>
Most ECAM host drivers are just different pci_ecam_ops which can be DT
match table data. That's already the case in some cases, but let's
do that for all the ECAM drivers. Then we can use
of_device_get_match_data() in pci_host_common_probe() and eliminate the
probe wrapper functions and use pci_host_common_probe() directly for
probe.

Link: https://lore.kernel.org/r/20200409234923.21598-4-robh@kernel.org
Signed-off-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;
Acked-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Cc: Zhou Wang &lt;wangzhou1@hisilicon.com&gt;
Cc: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;
Cc: Andrew Murray &lt;amurray@thegoodpenguin.co.uk&gt;
Cc: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Cc: Will Deacon &lt;will@kernel.org&gt;
Cc: Robert Richter &lt;rrichter@marvell.com&gt;
Cc: Marc Gonzalez &lt;marc.w.gonzalez@free.fr&gt;
Cc: Mans Rullgard &lt;mans@mansr.com&gt;
Cc: linux-pci@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Most ECAM host drivers are just different pci_ecam_ops which can be DT
match table data. That's already the case in some cases, but let's
do that for all the ECAM drivers. Then we can use
of_device_get_match_data() in pci_host_common_probe() and eliminate the
probe wrapper functions and use pci_host_common_probe() directly for
probe.

Link: https://lore.kernel.org/r/20200409234923.21598-4-robh@kernel.org
Signed-off-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;
Acked-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Cc: Zhou Wang &lt;wangzhou1@hisilicon.com&gt;
Cc: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;
Cc: Andrew Murray &lt;amurray@thegoodpenguin.co.uk&gt;
Cc: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Cc: Will Deacon &lt;will@kernel.org&gt;
Cc: Robert Richter &lt;rrichter@marvell.com&gt;
Cc: Marc Gonzalez &lt;marc.w.gonzalez@free.fr&gt;
Cc: Mans Rullgard &lt;mans@mansr.com&gt;
Cc: linux-pci@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
</pre>
</div>
</content>
</entry>
<entry>
<title>PCI: host-generic: Support building as modules</title>
<updated>2020-05-01T15:29:27+00:00</updated>
<author>
<name>Rob Herring</name>
<email>robh@kernel.org</email>
</author>
<published>2020-04-09T23:49:22+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=0c59c06a7c90390c3985c9acd58a73320781c15e'/>
<id>0c59c06a7c90390c3985c9acd58a73320781c15e</id>
<content type='text'>
Enable building host-generic and its host-common dependency as a
module.

Link: https://lore.kernel.org/r/20200409234923.21598-3-robh@kernel.org
Signed-off-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;
Acked-by: Will Deacon &lt;will@kernel.org&gt;
Acked-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Cc: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;
Cc: Andrew Murray &lt;amurray@thegoodpenguin.co.uk&gt;
Cc: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Cc: Will Deacon &lt;will@kernel.org&gt;
Cc: linux-pci@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Enable building host-generic and its host-common dependency as a
module.

Link: https://lore.kernel.org/r/20200409234923.21598-3-robh@kernel.org
Signed-off-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;
Acked-by: Will Deacon &lt;will@kernel.org&gt;
Acked-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Cc: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;
Cc: Andrew Murray &lt;amurray@thegoodpenguin.co.uk&gt;
Cc: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Cc: Will Deacon &lt;will@kernel.org&gt;
Cc: linux-pci@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
</pre>
</div>
</content>
</entry>
<entry>
<title>PCI: Constify struct pci_ecam_ops</title>
<updated>2020-05-01T15:28:59+00:00</updated>
<author>
<name>Rob Herring</name>
<email>robh@kernel.org</email>
</author>
<published>2020-04-09T23:49:21+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=0b104773b4f72ccd8af98a2f1efe69b174c344d3'/>
<id>0b104773b4f72ccd8af98a2f1efe69b174c344d3</id>
<content type='text'>
struct pci_ecam_ops is typically DT match table data which is defined to
be const. It's also best practice for ops structs to be const. Ideally,
we'd make struct pci_ops const as well, but that becomes pretty
invasive, so for now we just cast it where needed.

Link: https://lore.kernel.org/r/20200409234923.21598-2-robh@kernel.org
Signed-off-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;
Acked-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Acked-by: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
Cc: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
Cc: Will Deacon &lt;will@kernel.org&gt;
Cc: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;
Cc: Andrew Murray &lt;amurray@thegoodpenguin.co.uk&gt;
Cc: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Cc: "Rafael J. Wysocki" &lt;rjw@rjwysocki.net&gt;
Cc: Len Brown &lt;lenb@kernel.org&gt;
Cc: Jonathan Chocron &lt;jonnyc@amazon.com&gt;
Cc: Zhou Wang &lt;wangzhou1@hisilicon.com&gt;
Cc: Robert Richter &lt;rrichter@marvell.com&gt;
Cc: Toan Le &lt;toan@os.amperecomputing.com&gt;
Cc: Marc Gonzalez &lt;marc.w.gonzalez@free.fr&gt;
Cc: Mans Rullgard &lt;mans@mansr.com&gt;
Cc: linux-acpi@vger.kernel.org
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
struct pci_ecam_ops is typically DT match table data which is defined to
be const. It's also best practice for ops structs to be const. Ideally,
we'd make struct pci_ops const as well, but that becomes pretty
invasive, so for now we just cast it where needed.

Link: https://lore.kernel.org/r/20200409234923.21598-2-robh@kernel.org
Signed-off-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;
Acked-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Acked-by: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
Cc: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
Cc: Will Deacon &lt;will@kernel.org&gt;
Cc: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;
Cc: Andrew Murray &lt;amurray@thegoodpenguin.co.uk&gt;
Cc: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Cc: "Rafael J. Wysocki" &lt;rjw@rjwysocki.net&gt;
Cc: Len Brown &lt;lenb@kernel.org&gt;
Cc: Jonathan Chocron &lt;jonnyc@amazon.com&gt;
Cc: Zhou Wang &lt;wangzhou1@hisilicon.com&gt;
Cc: Robert Richter &lt;rrichter@marvell.com&gt;
Cc: Toan Le &lt;toan@os.amperecomputing.com&gt;
Cc: Marc Gonzalez &lt;marc.w.gonzalez@free.fr&gt;
Cc: Mans Rullgard &lt;mans@mansr.com&gt;
Cc: linux-acpi@vger.kernel.org
</pre>
</div>
</content>
</entry>
<entry>
<title>PCI: al: Add Amazon Annapurna Labs PCIe host controller driver</title>
<updated>2019-04-25T21:33:07+00:00</updated>
<author>
<name>Jonathan Chocron</name>
<email>jonnyc@amazon.com</email>
</author>
<published>2019-03-28T11:57:56+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=4166bfe53093b687a0b1b22e5d943e143b8089b2'/>
<id>4166bfe53093b687a0b1b22e5d943e143b8089b2</id>
<content type='text'>
Add driver for Amazon's Annapurna Labs PCIe host controller.  The
controller is based on DesignWare's IP.

The controller doesn't support accessing the Root Port's config space via
ECAM, so we obtain its base address via an AMZN0001 device.

Furthermore, the DesignWare PCIe controller doesn't filter out config
transactions sent to devices 1 and up on its bus, so they are filtered by
the driver.

All subordinate buses do support ECAM access.

Implementing specific PCI config access functions involves:
 - Adding an init function to obtain the Root Port's base address from
   an AMZN0001 device.
 - Adding a new entry in the MCFG quirk array.

[bhelgaas: Note that there is no Kconfig option for this driver because it
is only intended for use with the generic ACPI host bridge driver.  This
driver is only needed because the DesignWare IP doesn't completely support
ECAM access to the root bus.]

Link: https://lore.kernel.org/lkml/1553774276-24675-1-git-send-email-jonnyc@amazon.com
Co-developed-by: Vladimir Aerov &lt;vaerov@amazon.com&gt;
Signed-off-by: Jonathan Chocron &lt;jonnyc@amazon.com&gt;
Signed-off-by: Vladimir Aerov &lt;vaerov@amazon.com&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Reviewed-by: David Woodhouse &lt;dwmw@amazon.co.uk&gt;
Reviewed-by: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
Acked-by: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add driver for Amazon's Annapurna Labs PCIe host controller.  The
controller is based on DesignWare's IP.

The controller doesn't support accessing the Root Port's config space via
ECAM, so we obtain its base address via an AMZN0001 device.

Furthermore, the DesignWare PCIe controller doesn't filter out config
transactions sent to devices 1 and up on its bus, so they are filtered by
the driver.

All subordinate buses do support ECAM access.

Implementing specific PCI config access functions involves:
 - Adding an init function to obtain the Root Port's base address from
   an AMZN0001 device.
 - Adding a new entry in the MCFG quirk array.

[bhelgaas: Note that there is no Kconfig option for this driver because it
is only intended for use with the generic ACPI host bridge driver.  This
driver is only needed because the DesignWare IP doesn't completely support
ECAM access to the root bus.]

Link: https://lore.kernel.org/lkml/1553774276-24675-1-git-send-email-jonnyc@amazon.com
Co-developed-by: Vladimir Aerov &lt;vaerov@amazon.com&gt;
Signed-off-by: Jonathan Chocron &lt;jonnyc@amazon.com&gt;
Signed-off-by: Vladimir Aerov &lt;vaerov@amazon.com&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Reviewed-by: David Woodhouse &lt;dwmw@amazon.co.uk&gt;
Reviewed-by: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
Acked-by: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>PCI: Add support for unbinding the generic PCI host controller</title>
<updated>2018-05-30T16:35:23+00:00</updated>
<author>
<name>Jan Kiszka</name>
<email>jan.kiszka@siemens.com</email>
</author>
<published>2018-05-15T09:07:06+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=01fcb7f777a9f5d216a1ff41228f15656e50fb63'/>
<id>01fcb7f777a9f5d216a1ff41228f15656e50fb63</id>
<content type='text'>
Add support for unbinding the generic PCI host controller.  This is
particularly useful when working in virtual environments where the
controller may come and go, but possibly not only there.

Signed-off-by: Jan Kiszka &lt;jan.kiszka@siemens.com&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
CC: Will Deacon &lt;will.deacon@arm.com&gt;
CC: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add support for unbinding the generic PCI host controller.  This is
particularly useful when working in virtual environments where the
controller may come and go, but possibly not only there.

Signed-off-by: Jan Kiszka &lt;jan.kiszka@siemens.com&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
CC: Will Deacon &lt;will.deacon@arm.com&gt;
CC: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;</pre>
</div>
</content>
</entry>
<entry>
<title>PCI: Add SPDX GPL-2.0 to replace GPL v2 boilerplate</title>
<updated>2018-01-28T21:48:29+00:00</updated>
<author>
<name>Bjorn Helgaas</name>
<email>bhelgaas@google.com</email>
</author>
<published>2018-01-26T18:50:27+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=8cfab3cf63cfe5a53e2e566b3b86b30c187edf3a'/>
<id>8cfab3cf63cfe5a53e2e566b3b86b30c187edf3a</id>
<content type='text'>
Add SPDX GPL-2.0 to all PCI files that specified the GPL version 2 license.

Remove the boilerplate GPL version 2 language, relying on the assertion in
b24413180f56 ("License cleanup: add SPDX GPL-2.0 license identifier to
files with no license") that the SPDX identifier may be used instead of the
full boilerplate text.

Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Reviewed-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add SPDX GPL-2.0 to all PCI files that specified the GPL version 2 license.

Remove the boilerplate GPL version 2 language, relying on the assertion in
b24413180f56 ("License cleanup: add SPDX GPL-2.0 license identifier to
files with no license") that the SPDX identifier may be used instead of the
full boilerplate text.

Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Reviewed-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;</pre>
</div>
</content>
</entry>
<entry>
<title>PCI: Change pci_host_common_probe() visibility</title>
<updated>2017-04-18T19:21:04+00:00</updated>
<author>
<name>Marc Gonzalez</name>
<email>marc_gonzalez@sigmadesigns.com</email>
</author>
<published>2017-04-18T19:21:04+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=de5bbdd01cf9ee3cd4586b5a970d3ea015c6d7e3'/>
<id>de5bbdd01cf9ee3cd4586b5a970d3ea015c6d7e3</id>
<content type='text'>
pci_host_common_probe() is defined when CONFIG_PCI_HOST_COMMON=y;
therefore the function declaration should match that.

  drivers/pci/host/pcie-tango.c:300:9: error:
	implicit declaration of function 'pci_host_common_probe'

Signed-off-by: Marc Gonzalez &lt;marc_gonzalez@sigmadesigns.com&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
pci_host_common_probe() is defined when CONFIG_PCI_HOST_COMMON=y;
therefore the function declaration should match that.

  drivers/pci/host/pcie-tango.c:300:9: error:
	implicit declaration of function 'pci_host_common_probe'

Signed-off-by: Marc Gonzalez &lt;marc_gonzalez@sigmadesigns.com&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;</pre>
</div>
</content>
</entry>
<entry>
<title>PCI: Include pci.h for struct pci_ops definition</title>
<updated>2017-03-23T13:44:14+00:00</updated>
<author>
<name>Marc Gonzalez</name>
<email>marc_gonzalez@sigmadesigns.com</email>
</author>
<published>2017-03-17T14:53:19+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=41334f54a43ab00cbb294e6a08d0f57068f43025'/>
<id>41334f54a43ab00cbb294e6a08d0f57068f43025</id>
<content type='text'>
struct pci_ecam_ops embeds a struct pci_ops.  Explicitly request the
definition for struct pci_ops, otherwise gcc might complain:

  include/linux/pci-ecam.h:29:19: error: field 'pci_ops' has incomplete type

Signed-off-by: Marc Gonzalez &lt;marc_gonzalez@sigmadesigns.com&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
struct pci_ecam_ops embeds a struct pci_ops.  Explicitly request the
definition for struct pci_ops, otherwise gcc might complain:

  include/linux/pci-ecam.h:29:19: error: field 'pci_ops' has incomplete type

Signed-off-by: Marc Gonzalez &lt;marc_gonzalez@sigmadesigns.com&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;</pre>
</div>
</content>
</entry>
<entry>
<title>PCI: Add MCFG quirks for X-Gene host controller</title>
<updated>2016-12-06T19:45:50+00:00</updated>
<author>
<name>Duc Dang</name>
<email>dhdang@apm.com</email>
</author>
<published>2016-12-02T02:27:07+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=c5d4603961009c39de94725213d8b5420f110f9e'/>
<id>c5d4603961009c39de94725213d8b5420f110f9e</id>
<content type='text'>
PCIe controllers in X-Gene SoCs are not ECAM compliant: software needs to
configure additional controller's register to address device at
bus:dev:function.

Add a quirk to discover controller MMIO register space and configure
controller registers to select and address the target secondary device.

The quirk will only be applied for X-Gene PCIe MCFG table with
OEM revison 1, 2, 3 or 4 (PCIe controller v1 and v2 on X-Gene SoCs).

Tested-by: Jon Masters &lt;jcm@redhat.com&gt;
Signed-off-by: Duc Dang &lt;dhdang@apm.com&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
PCIe controllers in X-Gene SoCs are not ECAM compliant: software needs to
configure additional controller's register to address device at
bus:dev:function.

Add a quirk to discover controller MMIO register space and configure
controller registers to select and address the target secondary device.

The quirk will only be applied for X-Gene PCIe MCFG table with
OEM revison 1, 2, 3 or 4 (PCIe controller v1 and v2 on X-Gene SoCs).

Tested-by: Jon Masters &lt;jcm@redhat.com&gt;
Signed-off-by: Duc Dang &lt;dhdang@apm.com&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;</pre>
</div>
</content>
</entry>
</feed>
