linux-toradex.git/include/linux/pci_regs.h, branch v3.2.50

PCI: Fix PCI_EXP_TYPE_RC_EC value

2012-01-26T00:13:17+00:00

commit 1830ea91c20b06608f7cdb2455ce05ba834b3214 upstream.

Spec shows this as 1010b = 0xa

Signed-off-by: Alex Williamson 
Signed-off-by: Jesse Barnes 
Signed-off-by: Greg Kroah-Hartman

PCI: Add support for PASID capability

2011-10-14T16:05:35+00:00

Devices supporting Process Address Space Identifiers
(PASIDs) can use an IOMMU to access multiple IO address
spaces at the same time. A PCIe device indicates support for
this feature by implementing the PASID capability. This
patch adds support for the capability to the Linux kernel.

Reviewed-by: Bjorn Helgaas 
Signed-off-by: Joerg Roedel 
Signed-off-by: Jesse Barnes

PCI: Add implementation for PRI capability

2011-10-14T16:05:34+00:00

Implement the necessary functions to handle PRI capabilities
on PCIe devices. With PRI devices behind an IOMMU can signal
page fault conditions to software and recover from such
faults.

Reviewed-by: Bjorn Helgaas 
Signed-off-by: Joerg Roedel 
Signed-off-by: Jesse Barnes

PCI: add latency tolerance reporting enable/disable support

2011-05-11T22:18:53+00:00

Latency tolerance reporting allows devices to send messages to the root
complex indicating their latency tolerance for snooped & unsnooped
memory transactions.  Add support for enabling & disabling this
feature, along with a routine to set the max latencies a device should
send upstream.

Signed-off-by: Jesse Barnes

PCI: add OBFF enable/disable support

2011-05-11T22:18:48+00:00

OBFF (optimized buffer flush/fill), where supported, can help improve
energy efficiency by giving devices information about when interrupts
and other activity will have a reduced power impact.  It requires
support from both the device and system (i.e. not only does the device
need to respond to OBFF messages, but the platform must be capable of
generating and routing them to the end point).

Signed-off-by: Jesse Barnes

PCI: add ID-based ordering enable/disable support

2011-05-11T22:18:40+00:00

Add support to allow drivers to enable/disable ID-based ordering.  Where
supported, ID-based ordering can significantly improve the latency of
individual requests by preventing them from queueing up behind unrelated
traffic.

Signed-off-by: Jesse Barnes

Fix common misspellings

2011-03-31T14:26:23+00:00

Fixes generated by 'codespell' and manually reviewed.

Signed-off-by: Lucas De Marchi

PCI/PCIe: Clear Root PME Status bits early during system resume

2010-12-23T20:54:03+00:00

I noticed that PCI Express PMEs don't work on my Toshiba Portege R500
after the system has been woken up from a sleep state by a PME
(through Wake-on-LAN).  After some investigation it turned out that
the BIOS didn't clear the Root PME Status bit in the root port that
received the wakeup PME and since the Requester ID was also set in
the port's Root Status register, any subsequent PMEs didn't trigger
interrupts.

This problem can be avoided by clearing the Root PME Status bits in
all PCI Express root ports during early resume.  For this purpose,
add an early resume routine to the PCIe port driver and make this
driver be always registered, even if pci_ports_disable is set (in
which case the driver's only function is to provide the early
resume callback).

Signed-off-by: Rafael J. Wysocki 
Signed-off-by: Jesse Barnes

PCI: Add mask bit definition for MSI-X table

2010-12-23T20:53:08+00:00

Then we can use it instead of magic number 1.

Reviewed-by: Hidetoshi Seto 
Cc: Matthew Wilcox 
Signed-off-by: Sheng Yang 
Signed-off-by: Jesse Barnes

PCI: MSI: Move MSI-X entry definition to pci_regs.h

2010-12-23T20:53:07+00:00

Then it can be used by others.

Reviewed-by: Hidetoshi Seto 
Reviewed-by: Matthew Wilcox 
Signed-off-by: Sheng Yang 
Signed-off-by: Jesse Barnes