linux-toradex.git/include/linux/platform_data/x86/clk-pmc-atom.h, branch v5.0 Linux kernel for Apalis and Colibri modules clk: x86: Add Atom PMC platform clocks 2017-01-27T00:20:46+00:00 Irina Tirdea irina.tirdea@intel.com 2017-01-23T18:07:42+00:00 1141d9d08184565b71a943a50ffe712b2dfc697f The BayTrail and CherryTrail platforms provide platform clocks through their Power Management Controller (PMC). The SoC supports up to 6 clocks (PMC_PLT_CLK[0..5]) with a frequency of either 19.2 MHz (PLL) or 25 MHz (XTAL) for BayTrail and a frequency of 19.2 MHz (XTAL) for CherryTrail. These clocks are available for general system use, where appropriate, and each have Control & Frequency register fields associated with them. Port from legacy by Pierre Bossart, integration in clock framework by Irina Tirdea Signed-off-by: Irina Tirdea <irina.tirdea@intel.com> Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> 
The BayTrail and CherryTrail platforms provide platform clocks
through their Power Management Controller (PMC).

The SoC supports up to 6 clocks (PMC_PLT_CLK[0..5]) with a
frequency of either 19.2 MHz (PLL) or 25 MHz (XTAL) for BayTrail
and a frequency of 19.2 MHz (XTAL) for CherryTrail. These clocks
are available for general system use, where appropriate, and each
have Control & Frequency register fields associated with them.

Port from legacy by Pierre Bossart, integration in clock framework
by Irina Tirdea

Signed-off-by: Irina Tirdea <irina.tirdea@intel.com>
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>