<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-toradex.git/include/linux/serial_core.h, branch v3.3-rc4</title>
<subtitle>Linux kernel for Apalis and Colibri modules</subtitle>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/'/>
<entry>
<title>Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus</title>
<updated>2012-01-14T21:05:21+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2012-01-14T21:05:21+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=4964e0664c80680fa6b28ef91381c076a5b25c2c'/>
<id>4964e0664c80680fa6b28ef91381c076a5b25c2c</id>
<content type='text'>
* 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (119 commits)
  MIPS: Delete unused function add_temporary_entry.
  MIPS: Set default pci cache line size.
  MIPS: Flush huge TLB
  MIPS: Octeon: Remove SYS_SUPPORTS_HIGHMEM.
  MIPS: Octeon: Add support for OCTEON II PCIe
  MIPS: Octeon: Update PCI Latency timer and enable more error reporting.
  MIPS: Alchemy: Update cpu-feature-overrides
  MIPS: Alchemy: db1200: Improve PB1200 detection.
  MIPS: Alchemy: merge Au1000 and Au1300-style IRQ controller code.
  MIPS: Alchemy: chain IRQ controllers to MIPS IRQ controller
  MIPS: Alchemy: irq: register pm at irq init time
  MIPS: Alchemy: Touchscreen support on DB1100
  MIPS: Alchemy: Hook up IrDA on DB1000/DB1100
  net/irda: convert au1k_ir to platform driver.
  MIPS: Alchemy: remove unused board headers
  MTD: nand: make au1550nd.c a platform_driver
  MIPS: Netlogic: Mark Netlogic chips as SMT capable
  MIPS: Netlogic: Add support for XLP 3XX cores
  MIPS: Netlogic: Merge some of XLR/XLP wakup code
  MIPS: Netlogic: Add default XLP config.
  ...

Fix up trivial conflicts in arch/mips/kernel/{perf_event_mipsxx.c,
traps.c} and drivers/tty/serial/Makefile
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
* 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (119 commits)
  MIPS: Delete unused function add_temporary_entry.
  MIPS: Set default pci cache line size.
  MIPS: Flush huge TLB
  MIPS: Octeon: Remove SYS_SUPPORTS_HIGHMEM.
  MIPS: Octeon: Add support for OCTEON II PCIe
  MIPS: Octeon: Update PCI Latency timer and enable more error reporting.
  MIPS: Alchemy: Update cpu-feature-overrides
  MIPS: Alchemy: db1200: Improve PB1200 detection.
  MIPS: Alchemy: merge Au1000 and Au1300-style IRQ controller code.
  MIPS: Alchemy: chain IRQ controllers to MIPS IRQ controller
  MIPS: Alchemy: irq: register pm at irq init time
  MIPS: Alchemy: Touchscreen support on DB1100
  MIPS: Alchemy: Hook up IrDA on DB1000/DB1100
  net/irda: convert au1k_ir to platform driver.
  MIPS: Alchemy: remove unused board headers
  MTD: nand: make au1550nd.c a platform_driver
  MIPS: Netlogic: Mark Netlogic chips as SMT capable
  MIPS: Netlogic: Add support for XLP 3XX cores
  MIPS: Netlogic: Merge some of XLR/XLP wakup code
  MIPS: Netlogic: Add default XLP config.
  ...

Fix up trivial conflicts in arch/mips/kernel/{perf_event_mipsxx.c,
traps.c} and drivers/tty/serial/Makefile
</pre>
</div>
</content>
</entry>
<entry>
<title>SERIAL: AR933X: Add driver for the built-in UART of the SoC</title>
<updated>2011-12-07T22:02:46+00:00</updated>
<author>
<name>Gabor Juhos</name>
<email>juhosg@openwrt.org</email>
</author>
<published>2011-06-20T17:26:11+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=d57f341ba08c9f34ccd45a89729e73174d4a3325'/>
<id>d57f341ba08c9f34ccd45a89729e73174d4a3325</id>
<content type='text'>
This patch adds the driver for the built-in UART of the
Atheros AR933X SoCs.

Signed-off-by: Gabor Juhos &lt;juhosg@openwrt.org&gt;
Cc: linux-mips@linux-mips.org
Cc: Kathy Giori &lt;kgiori@qca.qualcomm.com&gt;
Cc: "Luis R.  Rodriguez" &lt;rodrigue@qca.qualcomm.com&gt;
Cc: Alan Cox &lt;alan@lxorguk.ukuu.org.uk&gt;
Cc: linux-serial@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/2526/
Signed-off-by: Alan Cox &lt;alan@linux.intel.com&gt;
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This patch adds the driver for the built-in UART of the
Atheros AR933X SoCs.

Signed-off-by: Gabor Juhos &lt;juhosg@openwrt.org&gt;
Cc: linux-mips@linux-mips.org
Cc: Kathy Giori &lt;kgiori@qca.qualcomm.com&gt;
Cc: "Luis R.  Rodriguez" &lt;rodrigue@qca.qualcomm.com&gt;
Cc: Alan Cox &lt;alan@lxorguk.ukuu.org.uk&gt;
Cc: linux-serial@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/2526/
Signed-off-by: Alan Cox &lt;alan@linux.intel.com&gt;
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>serial/8250_pci: setup-quirk workaround for the kt serial controller</title>
<updated>2011-11-27T04:11:20+00:00</updated>
<author>
<name>Dan Williams</name>
<email>dan.j.williams@intel.com</email>
</author>
<published>2011-11-22T21:41:24+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=448ac154c957c4580531fa0c8f2045816fe2f0e7'/>
<id>448ac154c957c4580531fa0c8f2045816fe2f0e7</id>
<content type='text'>
Workaround dropped notifications in the iir register.  Prevent reads
coincident with new interrupt notifications by reading the iir at most
once per interrupt.

Reported-by: Nhan H Mai &lt;nhan.h.mai@intel.com&gt;
Signed-off-by: Dan Williams &lt;dan.j.williams@intel.com&gt;
Acked-by: Alan Cox &lt;alan@linux.intel.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@suse.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Workaround dropped notifications in the iir register.  Prevent reads
coincident with new interrupt notifications by reading the iir at most
once per interrupt.

Reported-by: Nhan H Mai &lt;nhan.h.mai@intel.com&gt;
Signed-off-by: Dan Williams &lt;dan.j.williams@intel.com&gt;
Acked-by: Alan Cox &lt;alan@linux.intel.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@suse.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>TTY: serial, cleanup include file</title>
<updated>2011-11-15T23:58:56+00:00</updated>
<author>
<name>Jiri Slaby</name>
<email>jslaby@suse.cz</email>
</author>
<published>2011-11-09T20:33:43+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=027d7dacf73273dbe07a75b2ef5579616f17272c'/>
<id>027d7dacf73273dbe07a75b2ef5579616f17272c</id>
<content type='text'>
There are some functions (uart_handle_dcd_change, _handle_cts_change,
_insert_char) which are big enough to not be inlined. So move them
from .h to .c. We need to export them so that modules can actually use
them.

They will be even bigger when we introduce tty refcounting to them.

While at it, cleanup the "Proud member of Uglyhacks'R'US". It means,
define uart_handle_sysrq_char only when SUPPORT_SYSRQ is set.
Otherwise define it as a macro. This is needed for some arm driver
where the second parameter is undefined if expanded.

Signed-off-by: Jiri Slaby &lt;jslaby@suse.cz&gt;
Cc: Alan Cox &lt;alan@linux.intel.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@suse.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
There are some functions (uart_handle_dcd_change, _handle_cts_change,
_insert_char) which are big enough to not be inlined. So move them
from .h to .c. We need to export them so that modules can actually use
them.

They will be even bigger when we introduce tty refcounting to them.

While at it, cleanup the "Proud member of Uglyhacks'R'US". It means,
define uart_handle_sysrq_char only when SUPPORT_SYSRQ is set.
Otherwise define it as a macro. This is needed for some arm driver
where the second parameter is undefined if expanded.

Signed-off-by: Jiri Slaby &lt;jslaby@suse.cz&gt;
Cc: Alan Cox &lt;alan@linux.intel.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@suse.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>serial: Support the EFR-register of XR1715x uarts.</title>
<updated>2011-09-22T22:50:38+00:00</updated>
<author>
<name>Søren Holm</name>
<email>sgh@sgh.dk</email>
</author>
<published>2011-09-02T20:55:37+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=06315348b16178e4c006e7892ef8e5e65f49c66a'/>
<id>06315348b16178e4c006e7892ef8e5e65f49c66a</id>
<content type='text'>
The EFR (Enhenced-Features-Register) is located at a different offset
than the other devices supporting UART_CAP_EFR. This change add a special
setup quick to set UPF_EXAR_EFR on the port. UPF_EXAR_EFR is then used to
the port type to PORT_XR17D15X since it is for sure a XR17D15X uart.

Signed-off-by: Søren Holm &lt;sgh@sgh.dk&gt;
Acked-by: Alan Cox &lt;alan@linux.intel.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@suse.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The EFR (Enhenced-Features-Register) is located at a different offset
than the other devices supporting UART_CAP_EFR. This change add a special
setup quick to set UPF_EXAR_EFR on the port. UPF_EXAR_EFR is then used to
the port type to PORT_XR17D15X since it is for sure a XR17D15X uart.

Signed-off-by: Søren Holm &lt;sgh@sgh.dk&gt;
Acked-by: Alan Cox &lt;alan@linux.intel.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@suse.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>tty: serial8250: remove UPIO_DWAPB{,32}</title>
<updated>2011-08-23T17:53:00+00:00</updated>
<author>
<name>Jamie Iles</name>
<email>jamie@jamieiles.com</email>
</author>
<published>2011-08-15T09:17:55+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=4834d028978583dfe8e1fc19f1180ceb03d8dfb7'/>
<id>4834d028978583dfe8e1fc19f1180ceb03d8dfb7</id>
<content type='text'>
Now that platforms can override the port IRQ handler and the only user
of these UPIO modes has been converted over, kill off UPIO_DWAPB and
UPIO_DWAPB32.

Acked-by: Alan Cox &lt;alan@linux.intel.com&gt;
Signed-off-by: Jamie Iles &lt;jamie@jamieiles.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@suse.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Now that platforms can override the port IRQ handler and the only user
of these UPIO modes has been converted over, kill off UPIO_DWAPB and
UPIO_DWAPB32.

Acked-by: Alan Cox &lt;alan@linux.intel.com&gt;
Signed-off-by: Jamie Iles &lt;jamie@jamieiles.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@suse.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>tty: serial: allow ports to override the irq handler</title>
<updated>2011-08-23T17:52:58+00:00</updated>
<author>
<name>Jamie Iles</name>
<email>jamie@jamieiles.com</email>
</author>
<published>2011-08-15T09:17:51+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=a74036f51272975e9538e80cd1bb64dce164b208'/>
<id>a74036f51272975e9538e80cd1bb64dce164b208</id>
<content type='text'>
Some serial ports may have unusal requirements for interrupt handling
(e.g. the Synopsys DesignWare 8250-alike port and it's busy detect
interrupt).  Add a .handle_irq callback that can be used for platforms
to override the interrupt behaviour in a similar fashion to the
.serial_out and .serial_in callbacks.

Signed-off-by: Jamie Iles &lt;jamie@jamieiles.com&gt;
Acked-by: Alan Cox &lt;alan@linux.intel.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@suse.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Some serial ports may have unusal requirements for interrupt handling
(e.g. the Synopsys DesignWare 8250-alike port and it's busy detect
interrupt).  Add a .handle_irq callback that can be used for platforms
to override the interrupt behaviour in a similar fashion to the
.serial_out and .serial_in callbacks.

Signed-off-by: Jamie Iles &lt;jamie@jamieiles.com&gt;
Acked-by: Alan Cox &lt;alan@linux.intel.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@suse.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>TTY: serial, remove tasklet for tty_wakeup</title>
<updated>2011-08-23T17:34:06+00:00</updated>
<author>
<name>Jiri Slaby</name>
<email>jslaby@suse.cz</email>
</author>
<published>2011-07-14T12:35:12+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=6a3e492b6daaf7ec4dc41e51d87d2aae8ff886f2'/>
<id>6a3e492b6daaf7ec4dc41e51d87d2aae8ff886f2</id>
<content type='text'>
tty_wakeup can be called from any context. So there is no need to have
an extra tasklet for calling that. Hence save some space and remove
the tasklet completely.

Signed-off-by: Jiri Slaby &lt;jslaby@suse.cz&gt;
Cc: Alan Cox &lt;alan@linux.intel.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@suse.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
tty_wakeup can be called from any context. So there is no need to have
an extra tasklet for calling that. Hence save some space and remove
the tasklet completely.

Signed-off-by: Jiri Slaby &lt;jslaby@suse.cz&gt;
Cc: Alan Cox &lt;alan@linux.intel.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@suse.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>tty/serial: Add explicit PORT_TEGRA type</title>
<updated>2011-05-19T23:51:01+00:00</updated>
<author>
<name>Stephen Warren</name>
<email>swarren@nvidia.com</email>
</author>
<published>2011-05-17T22:12:36+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=4539c24fe4f92c09ee668ef959d3e8180df619b9'/>
<id>4539c24fe4f92c09ee668ef959d3e8180df619b9</id>
<content type='text'>
Tegra's UART is currently auto-detected as PORT_XSCALE due to register
bit UART_IER.UUE being writable. However, the Tegra documentation states
that this register bit is reserved. Hence, we should not program it.

Instead, the documentation specifies that the UART is 16550 compatible.
However, Tegra does need register bit UART_IER.RTOIE set, which is not
enabled by any 16550 port type. This was not noticed before, since
PORT_XSCALE enables CAP_UUE, which conflates both UUE and RTOIE bit
programming.

This change defines PORT_TEGRA that doesn't set UART_CAP_UUE, but does
set UART_CAP_RTOIE, which is a new capability indicating that the RTOIE
bit needs to be enabled.

Based-on-code-by: Laxman Dewangan &lt;ldewangan@nvidia.com&gt;
Cc: Laxman Dewangan &lt;ldewangan@nvidia.com&gt;
Signed-off-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Acked-by: Alan Cox &lt;alan@linux.intel.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@suse.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Tegra's UART is currently auto-detected as PORT_XSCALE due to register
bit UART_IER.UUE being writable. However, the Tegra documentation states
that this register bit is reserved. Hence, we should not program it.

Instead, the documentation specifies that the UART is 16550 compatible.
However, Tegra does need register bit UART_IER.RTOIE set, which is not
enabled by any 16550 port type. This was not noticed before, since
PORT_XSCALE enables CAP_UUE, which conflates both UUE and RTOIE bit
programming.

This change defines PORT_TEGRA that doesn't set UART_CAP_UUE, but does
set UART_CAP_RTOIE, which is a new capability indicating that the RTOIE
bit needs to be enabled.

Based-on-code-by: Laxman Dewangan &lt;ldewangan@nvidia.com&gt;
Cc: Laxman Dewangan &lt;ldewangan@nvidia.com&gt;
Signed-off-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Acked-by: Alan Cox &lt;alan@linux.intel.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@suse.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>tty/serial: add support for Xilinx PS UART</title>
<updated>2011-05-03T17:26:39+00:00</updated>
<author>
<name>John Linn</name>
<email>john.linn@xilinx.com</email>
</author>
<published>2011-04-30T04:07:43+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=61ec9016988f5c030e96e3c8a42ee9e11b8517aa'/>
<id>61ec9016988f5c030e96e3c8a42ee9e11b8517aa</id>
<content type='text'>
The Xilinx PS Uart is used on the new ARM based SoC. This
UART is not compatible with others such that a seperate
driver is required.

Signed-off-by: John Linn &lt;john.linn@xilinx.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@suse.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The Xilinx PS Uart is used on the new ARM based SoC. This
UART is not compatible with others such that a seperate
driver is required.

Signed-off-by: John Linn &lt;john.linn@xilinx.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@suse.de&gt;
</pre>
</div>
</content>
</entry>
</feed>
