linux-toradex.git/include/linux/soc/qcom/llcc-qcom.h, branch v6.3

soc: qcom: llcc: Add configuration data for SM8550

2022-12-05T21:12:52+00:00

Add LLCC configuration data for SM8550 SoC.

Signed-off-by: Abel Vesa 
Signed-off-by: Bjorn Andersson 
Link: https://lore.kernel.org/r/20221116113005.2653284-4-abel.vesa@linaro.org

soc: qcom: llcc: Pass LLCC version based register offsets to EDAC driver

2022-08-30T02:20:20+00:00

The LLCC EDAC register offsets varies between each SoCs. Until now, the
EDAC driver used the hardcoded register offsets. But this caused crash
on SM8450 SoC where the register offsets has been changed.

So to avoid this crash and also to make it easy to accommodate changes for
new SoCs, let's pass the LLCC version specific register offsets to the
EDAC driver.

Currently, two set of offsets are used. One is starting from LLCC version
v1.0.0 used by all SoCs other than SM8450. For SM8450, LLCC version
starting from v2.1.0 is used.

Signed-off-by: Manivannan Sadhasivam 
Reviewed-by: Sai Prakash Ranjan 
Signed-off-by: Bjorn Andersson 
Link: https://lore.kernel.org/r/20220825043859.30066-3-manivannan.sadhasivam@linaro.org

soc: qcom: llcc: Add sc8180x and sc8280xp configurations

2022-05-04T16:39:40+00:00

Add LLCC configuration data for the SC8180X and SC8280XP platforms,
based on the downstream tables.

Signed-off-by: Bjorn Andersson 
Reviewed-by: Sai Prakash Ranjan 
Link: https://lore.kernel.org/r/20220502215406.612967-3-bjorn.andersson@linaro.org

soc: qcom: llcc: Add configuration data for SM8450 SoC

2022-02-11T00:29:33+00:00

Add LLCC configuration data for SM8450 SoC.

Signed-off-by: Sai Prakash Ranjan 
Tested-by: Vinod Koul 
Signed-off-by: Bjorn Andersson 
Link: https://lore.kernel.org/r/fec944cb8f2a4a70785903c6bfec629c6f31b6a4.1643355594.git.quic_saipraka@quicinc.com

soc: qcom: llcc: Update the logic for version info extraction

2022-02-11T00:29:33+00:00

LLCC HW version info is made up of major, branch, minor and echo
version bits each of which are 8bits. Several features in newer
LLCC HW are based on the full version rather than just major or
minor versions such as write-subcache enable which is applicable
for versions v2.0.0.0 and later, also upcoming write-subcache
cacheable for SM8450 SoC which is only present in versions v2.1.0.0
and later, so it makes it easier and cleaner to just directly
compare with the full version than adding additional major/branch/
minor/echo version checks. So remove the earlier major version check
and add full version check for those features.

Signed-off-by: Sai Prakash Ranjan 
Tested-by: Vinod Koul 
Signed-off-by: Bjorn Andersson 
Link: https://lore.kernel.org/r/a82d7c32348c51fcc2b63e220d91b318bf706c83.1643355594.git.quic_saipraka@quicinc.com

soc: qcom: llcc: Add configuration data for SM8350

2021-12-21T01:10:09+00:00

Add LLCC configuration data for SM8350 SoC.

Signed-off-by: Konrad Dybcio 
Signed-off-by: Bjorn Andersson 
Link: https://lore.kernel.org/r/20211121002050.36977-2-konrad.dybcio@somainline.org

soc: qcom: address kernel-doc warnings

2021-03-30T03:49:54+00:00

The command:

  find ./include/linux/soc/qcom/ | xargs ./scripts/kernel-doc -none

reports:

  ./include/linux/soc/qcom/qmi.h:26: warning: cannot understand function prototype: 'struct qmi_header '
  ./include/linux/soc/qcom/qmi.h:101: warning: cannot understand function prototype: 'struct qmi_response_type_v01 '
  ./include/linux/soc/qcom/irq.h:19: warning: expecting prototype for QCOM specific IRQ domain flags that distinguishes the handling of wakeup(). Prototype was for IRQ_DOMAIN_FLAG_QCOM_PDC_WAKEUP() instead
  ./include/linux/soc/qcom/apr.h:126: warning: Function parameter or member '__apr_driver' not described in 'module_apr_driver'
  ./include/linux/soc/qcom/apr.h:126: warning: Excess function parameter '__aprbus_driver' description in 'module_apr_driver'
  ./include/linux/soc/qcom/llcc-qcom.h:43: warning: cannot understand function prototype: 'struct llcc_slice_desc '
  ./include/linux/soc/qcom/llcc-qcom.h:60: warning: cannot understand function prototype: 'struct llcc_edac_reg_data '
  ./include/linux/soc/qcom/llcc-qcom.h:86: warning: cannot understand function prototype: 'struct llcc_drv_data '

Address all those warnings by:
  - prefixing kernel-doc descriptions for structs with the keyword 'struct',
  - turning a kernel-doc comment that does not follow the kernel-doc syntax
  into a normal comment, and
  - correcting a parameter name in a kernel-doc comment.

Signed-off-by: Lukas Bulwahn 
Link: https://lore.kernel.org/r/20210327065642.11969-3-lukas.bulwahn@gmail.com
Signed-off-by: Bjorn Andersson

soc: qcom: llcc-qcom: Add support for SM8250 SoC

2020-12-28T18:15:14+00:00

SM8250 SoC uses LLCC IP version 2. In this version, the WRSC_EN register
needs to be written to enable the Write Sub Cache for each SCID. Hence,
use a dedicated "write_scid_en" member with predefined values and write
them for LLCC IP version 2.

Reviewed-by: Sai Prakash Ranjan 
Signed-off-by: Manivannan Sadhasivam 
Link: https://lore.kernel.org/r/20201130093924.45057-5-manivannan.sadhasivam@linaro.org
Signed-off-by: Bjorn Andersson

soc: qcom: llcc-qcom: Extract major hardware version

2020-12-28T18:15:13+00:00

The major hardware version of the LLCC IP is encoded in its
LLCC_COMMON_HW_INFO register. Extract the version and cache it in the
driver data so that it can be used to implement version specific
functionality like enabling Write sub cache for given SCID.

Signed-off-by: Sai Prakash Ranjan 
[mani: splitted the version extract as a single patch and few cleanups]
Signed-off-by: Manivannan Sadhasivam 
Link: https://lore.kernel.org/r/20201130093924.45057-4-manivannan.sadhasivam@linaro.org
Signed-off-by: Bjorn Andersson

soc: qcom: llcc: Add configuration data for SM8150

2020-11-20T04:22:25+00:00

Add LLCC configuration data for SM8150 SoC which controls
LLCC behaviour.

Signed-off-by: Souradeep Chowdhury 
Link: https://lore.kernel.org/r/957e3ae50c75720ef6227529d5ce3d4b457802e9.1601452132.git.schowdhu@codeaurora.org
Signed-off-by: Bjorn Andersson