linux-toradex.git/include/linux/soc/qcom, branch v6.9-rc5 Linux kernel for Apalis and Colibri modules Merge tag 'tty-6.9-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty 2024-03-21T19:44:10+00:00 Linus Torvalds torvalds@linux-foundation.org 2024-03-21T19:44:10+00:00 3bcb0bf65c2b8d67dbe7509da8d1461ee4445db7 Pull tty / serial driver updates from Greg KH: "Here is the big set of TTY/Serial driver updates and cleanups for 6.9-rc1. Included in here are: - more tty cleanups from Jiri - loads of 8250 driver cleanups from Andy - max310x driver updates - samsung serial driver updates - uart_prepare_sysrq_char() updates for many drivers - platform driver remove callback void cleanups - stm32 driver updates - other small tty/serial driver updates All of these have been in linux-next for a long time with no reported issues" * tag 'tty-6.9-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty: (199 commits) dt-bindings: serial: stm32: add power-domains property serial: 8250_dw: Replace ACPI device check by a quirk serial: Lock console when calling into driver before registration serial: 8250_uniphier: Switch to use uart_read_port_properties() serial: 8250_tegra: Switch to use uart_read_port_properties() serial: 8250_pxa: Switch to use uart_read_port_properties() serial: 8250_omap: Switch to use uart_read_port_properties() serial: 8250_of: Switch to use uart_read_port_properties() serial: 8250_lpc18xx: Switch to use uart_read_port_properties() serial: 8250_ingenic: Switch to use uart_read_port_properties() serial: 8250_dw: Switch to use uart_read_port_properties() serial: 8250_bcm7271: Switch to use uart_read_port_properties() serial: 8250_bcm2835aux: Switch to use uart_read_port_properties() serial: 8250_aspeed_vuart: Switch to use uart_read_port_properties() serial: port: Introduce a common helper to read properties serial: core: Add UPIO_UNKNOWN constant for unknown port type serial: core: Move struct uart_port::quirks closer to possible values serial: sh-sci: Call sci_serial_{in,out}() directly serial: core: only stop transmit when HW fifo is empty serial: pch: Use uart_prepare_sysrq_char(). ... 
Pull tty / serial driver updates from Greg KH:
 "Here is the big set of TTY/Serial driver updates and cleanups for
  6.9-rc1. Included in here are:

   - more tty cleanups from Jiri

   - loads of 8250 driver cleanups from Andy

   - max310x driver updates

   - samsung serial driver updates

   - uart_prepare_sysrq_char() updates for many drivers

   - platform driver remove callback void cleanups

   - stm32 driver updates

   - other small tty/serial driver updates

  All of these have been in linux-next for a long time with no reported
  issues"

* tag 'tty-6.9-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty: (199 commits)
  dt-bindings: serial: stm32: add power-domains property
  serial: 8250_dw: Replace ACPI device check by a quirk
  serial: Lock console when calling into driver before registration
  serial: 8250_uniphier: Switch to use uart_read_port_properties()
  serial: 8250_tegra: Switch to use uart_read_port_properties()
  serial: 8250_pxa: Switch to use uart_read_port_properties()
  serial: 8250_omap: Switch to use uart_read_port_properties()
  serial: 8250_of: Switch to use uart_read_port_properties()
  serial: 8250_lpc18xx: Switch to use uart_read_port_properties()
  serial: 8250_ingenic: Switch to use uart_read_port_properties()
  serial: 8250_dw: Switch to use uart_read_port_properties()
  serial: 8250_bcm7271: Switch to use uart_read_port_properties()
  serial: 8250_bcm2835aux: Switch to use uart_read_port_properties()
  serial: 8250_aspeed_vuart: Switch to use uart_read_port_properties()
  serial: port: Introduce a common helper to read properties
  serial: core: Add UPIO_UNKNOWN constant for unknown port type
  serial: core: Move struct uart_port::quirks closer to possible values
  serial: sh-sci: Call sci_serial_{in,out}() directly
  serial: core: only stop transmit when HW fifo is empty
  serial: pch: Use uart_prepare_sysrq_char().
  ...
soc: qcom: apr: make aprbus const 2024-02-14T05:38:03+00:00 Ricardo B. Marliere ricardo@marliere.net 2024-02-13T14:44:01+00:00 d2e8899de71cd0a3c22a0eadfb9d54604d34eb96 Since commit d492cc2573a0 ("driver core: device.h: make struct bus_type a const *"), the driver core can properly handle constant struct bus_type, move the aprbus variable to be a constant structure as well, placing it into read-only memory which can not be modified at runtime. Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Suggested-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: "Ricardo B. Marliere" <ricardo@marliere.net> Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Link: https://lore.kernel.org/r/20240213-bus_cleanup-apr-v1-1-50c824eec06d@marliere.net Signed-off-by: Bjorn Andersson <andersson@kernel.org> 
Since commit d492cc2573a0 ("driver core: device.h: make struct
bus_type a const *"), the driver core can properly handle constant
struct bus_type, move the aprbus variable to be a constant
structure as well, placing it into read-only memory which can not be
modified at runtime.

Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Suggested-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: "Ricardo B. Marliere" <ricardo@marliere.net>
Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Link: https://lore.kernel.org/r/20240213-bus_cleanup-apr-v1-1-50c824eec06d@marliere.net
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
soc: qcom: add QCOM PBS driver 2024-02-01T22:26:55+00:00 Anjelique Melendez quic_amelende@quicinc.com 2024-02-01T20:44:24+00:00 5b2dd77be1d85ac3a8be3749f5605bf0830e2998 Add the Qualcomm PBS (Programmable Boot Sequencer) driver. The QCOM PBS driver supports configuring software PBS trigger events through PBS RAM on Qualcomm Technologies, Inc (QTI) PMICs. Signed-off-by: Anjelique Melendez <quic_amelende@quicinc.com> Link: https://lore.kernel.org/r/20240201204421.16992-6-quic_amelende@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org> 
Add the Qualcomm PBS (Programmable Boot Sequencer) driver. The QCOM PBS
driver supports configuring software PBS trigger events through PBS RAM
on Qualcomm Technologies, Inc (QTI) PMICs.

Signed-off-by: Anjelique Melendez <quic_amelende@quicinc.com>
Link: https://lore.kernel.org/r/20240201204421.16992-6-quic_amelende@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
soc: qcom: geni-se: Add M_TX_FIFO_NOT_EMPTY bit definition 2024-01-28T03:01:51+00:00 Douglas Anderson dianders@chromium.org 2024-01-12T23:03:07+00:00 486676116f4852d4198690c2c98af060cd96ab83 According to the docs I have, bit 21 of the status register is asserted when the FIFO is _not_ empty. Add the definition. Signed-off-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20240112150307.1.I7dc0993c1e758a1efedd651e7e1670deb1b430fb@changeid Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> 
According to the docs I have, bit 21 of the status register is
asserted when the FIFO is _not_ empty. Add the definition.

Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20240112150307.1.I7dc0993c1e758a1efedd651e7e1670deb1b430fb@changeid
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
soc: qcom: llcc: Updating the macro name 2023-09-20T02:57:53+00:00 Komal Bajaj quic_kbajaj@quicinc.com 2023-08-30T10:56:53+00:00 0bc76be64e80b15b975345b6957a87a1893c34f2 Update macro name for LLCC_DRE to LLCC_ECC as per the latest specification. Signed-off-by: Komal Bajaj <quic_kbajaj@quicinc.com> Reviewed-by: Mukesh Ojha <quic_mojha@quicinc.com> Acked-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230830105654.28057-6-quic_kbajaj@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org> 
Update macro name for LLCC_DRE to LLCC_ECC as per the latest specification.

Signed-off-by: Komal Bajaj <quic_kbajaj@quicinc.com>
Reviewed-by: Mukesh Ojha <quic_mojha@quicinc.com>
Acked-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230830105654.28057-6-quic_kbajaj@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux 2023-08-31T02:53:39+00:00 Linus Torvalds torvalds@linux-foundation.org 2023-08-31T02:53:39+00:00 f8fd5c24830fbc259ba7d5e72817c9867c01b8e8 Pull clk subsystem updates from Stephen Boyd: "This pull request is full of clk driver changes. In fact, there aren't any changes to the clk framework this time around. That's probably because everyone was on vacation (yours truly included). We did lose a couple clk drivers this time around because nobody was using those devices. That skews the diffstat a bit, but either way, nothing looks out of the ordinary here. The usual suspects are chugging along adding support for more SoCs and fixing bugs. If I had to choose, I'd say the theme for the past few months has been "polish". There's quite a few patches that migrate to devm_platform_ioremap_resource() in here. And there's more than a handful of patches that move the NR_CLKS define from the DT binding header to the driver. There's even patches that migrate drivers to use clk_parent_data and clk_hw to describe clk tree topology. It seems that the spring (summer?) cleaning bug got some folks, or the semiconductor shortage finally hit the software side. New Drivers: - StarFive JH7110 SoC clock drivers - Qualcomm IPQ5018 Global Clock Controller driver - Versa3 clk generator to support 48KHz playback/record with audio codec on RZ/G2L SMARC EVK Removed Drivers: - Remove non-OF mmp clk drivers - Remove OXNAS clk driver Updates: - Add __counted_by to struct clk_hw_onecell_data and struct spmi_pmic_div_clk_cc - Move defines for numbers of clks (NR_CLKS) from DT headers to drivers - Introduce kstrdup_and_replace() and use it - Add PLL rates for Rockchip rk3568 - Add the display clock tree for Rockchip rv1126 - Add Audio Clock Generator (ADG) clocks on Renesas R-Car Gen3 and RZ/G2 SoCs - Convert sun9i-mmc clock to use devm_platform_get_and_ioremap_resource() - Fix function name in a comment in ccu_mmc_timing.c - Parameter name correction for ccu_nkm_round_rate() - Implement CLK_SET_RATE_PARENT for Allwinner NKM clocks, i.e. consider alternative parent rates when determining clock rates - Set CLK_SET_RATE_PARENT for Allwinner A64 pll-mipi - Support finding closest (as opposed to closest but not higher) clock rate for NM, NKM, mux and div type clocks, as use it for Allwinner A64 pll-video0 - Prefer current parent rate if able to generate ideal clock rate for Allwinner NKM clocks - Clean up Qualcomm SMD RPM driver, with interconnect bus clocks moved out to the interconnect drivers - Fix various PM runtime bugs across many Qualcomm clk drivers - Migrate Qualcomm MDM9615 is to parent_hw and parent_data - Add network related resets on Qualcomm IPQ4019 - Add a couple missing USB related clocks to Qualcomm IPQ9574 - Add missing gpll0_sleep_clk_src to Qualcomm MSM8917 global clock controller - In the Qualcomm QDU1000 global clock controller, GDSCs, clkrefs, and GPLL1 are added, while PCIe pipe clock, SDCC rcg ops are corrected - Add missing GDSCs to and correct GDSCs for the SC8280XP global clock controller driver - Support retention for the Qualcomm SC8280XP display clock controller GDSCs. - Qualcommm's SDCC apps_clk_src is marked with CLK_OPS_PARENT_ENABLE to fix issues with missing parent clocks across sc7180, sm7150, sm6350 and sm8250, while sm8450 is corrected to use floor ops - Correct Qualcomm SM6350 GPU clock controller's clock supplies - Drop unwanted clocks from the Qualcomm IPQ5332 GCC driver - Add missing OXILICX GDSC to Qualcomm MSM8226 GCC - Change the delay in the Qualcomm reset controller to fsleep() for correctness - Extend the Qualcomm SM83550 Video clock controller to support SC8280XP - Add graphics clock support on Renesas RZ/G2M, RZ/G2N, RZ/G2E, and R-Car H3, M3-W, and M3-N SoCs - Add Clocked Serial Interface (CSI) clocks on Renesas RZ/V2M - Add PWM (MTU3) clock and reset on Renesas RZ/G2UL and RZ/Five - Add the PDM IPC clock for i.MX93 - Add 519.75MHz frequency support for i.MX9 PLL - Simplify the .determine_rate() implementation for i.MX GPR mux - Make the i.MX8QXP LPCG clock use devm_platform_ioremap_resource() - Add the audio mux clock to i.MX8 - Fix the SPLL2 MULT range for PLLv4 - Update the SPLL2 type in i.MX8ULP - Fix the SAI4 clock on i.MX8MP - Add silicon revision print for i.MX25 on clocks init - Drop the return value from __mx25_clocks_init() - Fix the clock pauses on no-op set_rate for i.MX8M composite clock - Drop restrictions for i.MX PLL14xx and fix its max prediv value - Drop the 393216000 and 361267200 from i.MX PLL14xx rate table to allow glitch free switching" * tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (207 commits) clk: qcom: Fix SM_GPUCC_8450 dependencies clk: lmk04832: Support using PLL1_LD as SPI readback pin clk: lmk04832: Don't disable vco clock on probe fail clk: lmk04832: Set missing parent_names for output clocks clk: mvebu: Convert to devm_platform_ioremap_resource() clk: nuvoton: Convert to devm_platform_ioremap_resource() clk: socfpga: agilex: Convert to devm_platform_ioremap_resource() clk: ti: Use devm_platform_get_and_ioremap_resource() clk: mediatek: Convert to devm_platform_ioremap_resource() clk: hsdk-pll: Convert to devm_platform_ioremap_resource() clk: gemini: Convert to devm_platform_ioremap_resource() clk: fsl-sai: Convert to devm_platform_ioremap_resource() clk: bm1880: Convert to devm_platform_ioremap_resource() clk: axm5516: Convert to devm_platform_ioremap_resource() clk: actions: Convert to devm_platform_ioremap_resource() clk: cdce925: Remove redundant of_match_ptr() clk: pxa910: Move number of clocks to driver source clk: pxa1928: Move number of clocks to driver source clk: pxa168: Move number of clocks to driver source clk: mmp2: Move number of clocks to driver source ... 
Pull clk subsystem updates from Stephen Boyd:
 "This pull request is full of clk driver changes. In fact, there aren't
  any changes to the clk framework this time around. That's probably
  because everyone was on vacation (yours truly included). We did lose a
  couple clk drivers this time around because nobody was using those
  devices. That skews the diffstat a bit, but either way, nothing looks
  out of the ordinary here. The usual suspects are chugging along adding
  support for more SoCs and fixing bugs.

  If I had to choose, I'd say the theme for the past few months has been
  "polish". There's quite a few patches that migrate to
  devm_platform_ioremap_resource() in here. And there's more than a
  handful of patches that move the NR_CLKS define from the DT binding
  header to the driver. There's even patches that migrate drivers to use
  clk_parent_data and clk_hw to describe clk tree topology. It seems
  that the spring (summer?) cleaning bug got some folks, or the
  semiconductor shortage finally hit the software side.

  New Drivers:
   - StarFive JH7110 SoC clock drivers
   - Qualcomm IPQ5018 Global Clock Controller driver
   - Versa3 clk generator to support 48KHz playback/record with audio
     codec on RZ/G2L SMARC EVK

  Removed Drivers:
   - Remove non-OF mmp clk drivers
   - Remove OXNAS clk driver

  Updates:
   - Add __counted_by to struct clk_hw_onecell_data and struct
     spmi_pmic_div_clk_cc
   - Move defines for numbers of clks (NR_CLKS) from DT headers to
     drivers
   - Introduce kstrdup_and_replace() and use it
   - Add PLL rates for Rockchip rk3568
   - Add the display clock tree for Rockchip rv1126
   - Add Audio Clock Generator (ADG) clocks on Renesas R-Car Gen3 and
     RZ/G2 SoCs
   - Convert sun9i-mmc clock to use
     devm_platform_get_and_ioremap_resource()
   - Fix function name in a comment in ccu_mmc_timing.c
   - Parameter name correction for ccu_nkm_round_rate()
   - Implement CLK_SET_RATE_PARENT for Allwinner NKM clocks, i.e.
     consider alternative parent rates when determining clock rates
   - Set CLK_SET_RATE_PARENT for Allwinner A64 pll-mipi
   - Support finding closest (as opposed to closest but not higher)
     clock rate for NM, NKM, mux and div type clocks, as use it for
     Allwinner A64 pll-video0
   - Prefer current parent rate if able to generate ideal clock rate for
     Allwinner NKM clocks
   - Clean up Qualcomm SMD RPM driver, with interconnect bus clocks
     moved out to the interconnect drivers
   - Fix various PM runtime bugs across many Qualcomm clk drivers
   - Migrate Qualcomm MDM9615 is to parent_hw and parent_data
   - Add network related resets on Qualcomm IPQ4019
   - Add a couple missing USB related clocks to Qualcomm IPQ9574
   - Add missing gpll0_sleep_clk_src to Qualcomm MSM8917 global clock
     controller
   - In the Qualcomm QDU1000 global clock controller, GDSCs, clkrefs,
     and GPLL1 are added, while PCIe pipe clock, SDCC rcg ops are
     corrected
   - Add missing GDSCs to and correct GDSCs for the SC8280XP global
     clock controller driver
   - Support retention for the Qualcomm SC8280XP display clock
     controller GDSCs.
   - Qualcommm's SDCC apps_clk_src is marked with CLK_OPS_PARENT_ENABLE
     to fix issues with missing parent clocks across sc7180, sm7150,
     sm6350 and sm8250, while sm8450 is corrected to use floor ops
   - Correct Qualcomm SM6350 GPU clock controller's clock supplies
   - Drop unwanted clocks from the Qualcomm IPQ5332 GCC driver
   - Add missing OXILICX GDSC to Qualcomm MSM8226 GCC
   - Change the delay in the Qualcomm reset controller to fsleep() for
     correctness
   - Extend the Qualcomm SM83550 Video clock controller to support
     SC8280XP
   - Add graphics clock support on Renesas RZ/G2M, RZ/G2N, RZ/G2E, and
     R-Car H3, M3-W, and M3-N SoCs
   - Add Clocked Serial Interface (CSI) clocks on Renesas RZ/V2M
   - Add PWM (MTU3) clock and reset on Renesas RZ/G2UL and RZ/Five
   - Add the PDM IPC clock for i.MX93
   - Add 519.75MHz frequency support for i.MX9 PLL
   - Simplify the .determine_rate() implementation for i.MX GPR mux
   - Make the i.MX8QXP LPCG clock use devm_platform_ioremap_resource()
   - Add the audio mux clock to i.MX8
   - Fix the SPLL2 MULT range for PLLv4
   - Update the SPLL2 type in i.MX8ULP
   - Fix the SAI4 clock on i.MX8MP
   - Add silicon revision print for i.MX25 on clocks init
   - Drop the return value from __mx25_clocks_init()
   - Fix the clock pauses on no-op set_rate for i.MX8M composite clock
   - Drop restrictions for i.MX PLL14xx and fix its max prediv value
   - Drop the 393216000 and 361267200 from i.MX PLL14xx rate table to
     allow glitch free switching"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (207 commits)
  clk: qcom: Fix SM_GPUCC_8450 dependencies
  clk: lmk04832: Support using PLL1_LD as SPI readback pin
  clk: lmk04832: Don't disable vco clock on probe fail
  clk: lmk04832: Set missing parent_names for output clocks
  clk: mvebu: Convert to devm_platform_ioremap_resource()
  clk: nuvoton: Convert to devm_platform_ioremap_resource()
  clk: socfpga: agilex: Convert to devm_platform_ioremap_resource()
  clk: ti: Use devm_platform_get_and_ioremap_resource()
  clk: mediatek: Convert to devm_platform_ioremap_resource()
  clk: hsdk-pll: Convert to devm_platform_ioremap_resource()
  clk: gemini: Convert to devm_platform_ioremap_resource()
  clk: fsl-sai: Convert to devm_platform_ioremap_resource()
  clk: bm1880: Convert to devm_platform_ioremap_resource()
  clk: axm5516: Convert to devm_platform_ioremap_resource()
  clk: actions: Convert to devm_platform_ioremap_resource()
  clk: cdce925: Remove redundant of_match_ptr()
  clk: pxa910: Move number of clocks to driver source
  clk: pxa1928: Move number of clocks to driver source
  clk: pxa168: Move number of clocks to driver source
  clk: mmp2: Move number of clocks to driver source
  ...
Merge tag 'soc-drivers-6.6' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc 2023-08-30T23:42:21+00:00 Linus Torvalds torvalds@linux-foundation.org 2023-08-30T23:42:21+00:00 1544df9ab4003f9f6b9894d48a235cd1859e7db3 Pull ARM SoC driver updates from Arnd Bergmann: "The main change this time was the introduction of the drivers/genpd subsystem that gets split out from drivers/soc to keep common functionality together. The SCMI driver subsystem gets an update to version 3.2 of the specification. There are also updates to memory, reset and other firmware drivers. On the soc driver side, the updates are mostly cleanups across a number of Arm platforms. On driver for loongarch adds power management for DT based systems, another driver is for HiSilicon's Arm server chips with their HCCS system health interface. The remaining updates for the most part add support for additional hardware in existing drivers or contain minor cleanups. Most of these are for the Qualcomm Snapdragon platform" * tag 'soc-drivers-6.6' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (136 commits) bus: fsl-mc: Use common ranges functions soc: kunpeng_hccs: fix some sparse warnings about incorrect type soc: loongson2_pm: add power management support soc: dt-bindings: add loongson-2 pm soc: rockchip: grf: Fix SDMMC not working on RK3588 with bus-width > 1 genpd: rockchip: Add PD_VO entry for rv1126 bus: ti-sysc: Fix cast to enum warning soc: kunpeng_hccs: add MAILBOX dependency MAINTAINERS: remove OXNAS entry dt-bindings: interrupt-controller: arm,versatile-fpga-irq: mark oxnas compatible as deprecated irqchip: irq-versatile-fpga: remove obsolete oxnas compatible soc: qcom: aoss: Tidy up qmp_send() callers soc: qcom: aoss: Format string in qmp_send() soc: qcom: aoss: Move length requirements from caller soc: kunpeng_hccs: fix size_t format string soc: ti: k3-socinfo.c: Add JTAG ID for AM62PX dt-bindings: firmware: qcom: scm: Updating VMID list firmware: imx: scu-irq: support identifying SCU wakeup source from sysfs firmware: imx: scu-irq: enlarge the IMX_SC_IRQ_NUM_GROUP firmware: imx: scu-irq: add imx_scu_irq_get_status ... 
Pull ARM SoC driver updates from Arnd Bergmann:
 "The main change this time was the introduction of the drivers/genpd
  subsystem that gets split out from drivers/soc to keep common
  functionality together.

  The SCMI driver subsystem gets an update to version 3.2 of the
  specification. There are also updates to memory, reset and other
  firmware drivers.

  On the soc driver side, the updates are mostly cleanups across a
  number of Arm platforms. On driver for loongarch adds power management
  for DT based systems, another driver is for HiSilicon's Arm server
  chips with their HCCS system health interface.

  The remaining updates for the most part add support for additional
  hardware in existing drivers or contain minor cleanups. Most of these
  are for the Qualcomm Snapdragon platform"

* tag 'soc-drivers-6.6' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (136 commits)
  bus: fsl-mc: Use common ranges functions
  soc: kunpeng_hccs: fix some sparse warnings about incorrect type
  soc: loongson2_pm: add power management support
  soc: dt-bindings: add loongson-2 pm
  soc: rockchip: grf: Fix SDMMC not working on RK3588 with bus-width > 1
  genpd: rockchip: Add PD_VO entry for rv1126
  bus: ti-sysc: Fix cast to enum warning
  soc: kunpeng_hccs: add MAILBOX dependency
  MAINTAINERS: remove OXNAS entry
  dt-bindings: interrupt-controller: arm,versatile-fpga-irq: mark oxnas compatible as deprecated
  irqchip: irq-versatile-fpga: remove obsolete oxnas compatible
  soc: qcom: aoss: Tidy up qmp_send() callers
  soc: qcom: aoss: Format string in qmp_send()
  soc: qcom: aoss: Move length requirements from caller
  soc: kunpeng_hccs: fix size_t format string
  soc: ti: k3-socinfo.c: Add JTAG ID for AM62PX
  dt-bindings: firmware: qcom: scm: Updating VMID list
  firmware: imx: scu-irq: support identifying SCU wakeup source from sysfs
  firmware: imx: scu-irq: enlarge the IMX_SC_IRQ_NUM_GROUP
  firmware: imx: scu-irq: add imx_scu_irq_get_status
  ...
soc: qcom: aoss: Format string in qmp_send() 2023-08-14T02:27:32+00:00 Bjorn Andersson quic_bjorande@quicinc.com 2023-08-11T20:58:38+00:00 8873d1e2f88afbe89c99d8f49f88934a2da2991f The majority of callers to qmp_send() composes the message dynamically using some form of sprintf(), resulting in unnecessary complication and stack usage. By changing the interface of qmp_send() to take a format string and arguments, the duplicated composition of the commands can be moved to a single location. Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com> Link: https://lore.kernel.org/r/20230811205839.727373-4-quic_bjorande@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org> 
The majority of callers to qmp_send() composes the message dynamically
using some form of sprintf(), resulting in unnecessary complication and
stack usage.

By changing the interface of qmp_send() to take a format string and
arguments, the duplicated composition of the commands can be moved to a
single location.

Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com>
Link: https://lore.kernel.org/r/20230811205839.727373-4-quic_bjorande@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
soc: qcom: aoss: Move length requirements from caller 2023-08-14T02:26:48+00:00 Bjorn Andersson quic_bjorande@quicinc.com 2023-08-11T20:58:36+00:00 59e09100836fdb618b107c37189d6001b5825872 The existing implementation of qmp_send() requires the caller to provide a buffer which is of word-aligned. The underlying reason for this is that message ram only supports word accesses, but pushing this requirement onto the clients results in the same boiler plate code sprinkled in every call site. By using a temporary buffer in qmp_send() we can hide the underlying hardware limitations from the clients and allow them to pass their NUL-terminates C string directly. Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230811205839.727373-2-quic_bjorande@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org> 
The existing implementation of qmp_send() requires the caller to provide
a buffer which is of word-aligned. The underlying reason for this is
that message ram only supports word accesses, but pushing this
requirement onto the clients results in the same boiler plate code
sprinkled in every call site.

By using a temporary buffer in qmp_send() we can hide the underlying
hardware limitations from the clients and allow them to pass their
NUL-terminates C string directly.

Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230811205839.727373-2-quic_bjorande@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
soc: qcom: geni-se: Add SPI Device mode support for GENI based QuPv3 2023-07-31T14:57:03+00:00 Praveen Talari quic_ptalari@quicinc.com 2023-07-14T04:22:02+00:00 59bbe86bb212b618ec2b50434f54bb4cfc704f44 Add device mode supported registers and masks. Signed-off-by: Praveen Talari <quic_ptalari@quicinc.com> Reviewed-by: Vijaya Krishna Nivarthi <quic_vnivarth@quicinc.com> Link: https://lore.kernel.org/r/20230714042203.14251-2-quic_ptalari@quicinc.com Signed-off-by: Mark Brown <broonie@kernel.org> 
Add device mode supported registers and masks.

Signed-off-by: Praveen Talari <quic_ptalari@quicinc.com>
Reviewed-by: Vijaya Krishna Nivarthi <quic_vnivarth@quicinc.com>
Link: https://lore.kernel.org/r/20230714042203.14251-2-quic_ptalari@quicinc.com
Signed-off-by: Mark Brown <broonie@kernel.org>