linux-toradex.git/include/linux/soc/samsung, branch v5.9-rc6

soc: samsung: Rename Samsung and Exynos to lowercase

2020-01-07T19:46:31+00:00

Fix up inconsistent usage of upper and lowercase letters in "Samsung"
and "Exynos" names.

"SAMSUNG" and "EXYNOS" are not abbreviations but regular trademarked
names.  Therefore they should be written with lowercase letters starting
with capital letter.

The lowercase "Exynos" name is promoted by its manufacturer Samsung
Electronics Co., Ltd., in advertisement materials and on website.

Although advertisement materials usually use uppercase "SAMSUNG", the
lowercase version is used in all legal aspects (e.g. on Wikipedia and in
privacy/legal statements on
https://www.samsung.com/semiconductor/privacy-global/).

Signed-off-by: Krzysztof Kozlowski

soc: samsung: chipid: Convert exynos-chipid driver to use the regmap API

2019-08-15T18:25:25+00:00

Convert the driver to use regmap API in order to allow other
drivers, like ASV, to access the CHIPID registers.

Add definition of selected CHIPID register offsets and register bit
fields for Exynos5422 SoC.

Signed-off-by: Sylwester Nawrocki 
Signed-off-by: Krzysztof Kozlowski

pinctrl: samsung: Write external wakeup interrupt mask

2018-07-24T19:56:41+00:00

The pinctrl driver defines an IRQ chip which handles external wakeup
interrupts, therefore from logical point of view, it is the owner of
external interrupt mask.  The register controlling the mask belongs to
Power Management Unit address space so it has to be accessed with PMU
syscon regmap handle.

This mask should be written to hardware during system suspend.  Till now
ARMv7 machine code was responsible for this which created a dependency
between pin controller driver and arch/arm/mach code.

Try to rework this dependency so the pinctrl driver will write external
wakeup interrupt mask during late suspend.

Impact on ARMv7 designs (S5Pv210 and Exynos)
============================================
This duplicates setting mask with existing machine code
arch/arm/mach-exynos/suspend.c and arch/arm/mach-s5pv210/pm.c but it is
not a problem - the wakeup mask register will be written twice.  The
machine code will be cleaned up later.

The difference between implementation here and ARMv7 machine code
(arch/arm/mach-*) is the time of writing the mask:
1. The machine code is writing the mask quite late during system suspend
   path, after offlining secondary CPUs and just before doing actual
   suspend.
2. The implementation in pinctrl driver uses late suspend ops, therefore it
   will write the mask much earlier.  Hopefully late enough, after all
   drivers will enable or disable their interrupt wakeups
   (enable_irq_wake() etc).

Impact on ARMv8 designs (Exynos5433 and Exynos7)
================================================
The Suspend to RAM was not supported and external wakeup interrupt mask
was not written to HW.  This change brings us one step closer to
supporting Suspend to RAM.

Signed-off-by: Krzysztof Kozlowski 
Cc: Tomasz Figa 
Cc: Sylwester Nawrocki 
Acked-by: Tomasz Figa 
Tested-by: Marek Szyprowski

ARM: exynos: Define EINT_WAKEUP_MASK registers for S5Pv210 and Exynos5433

2018-07-24T19:50:39+00:00

S5Pv210 and Exynos5433/Exynos7 have different address of
EINT_WAKEUP_MASK register.  Rename existing S5P_EINT_WAKEUP_MASK to
avoid confusion and add new ones.

Signed-off-by: Krzysztof Kozlowski 
Cc: Tomasz Figa 
Cc: Sylwester Nawrocki 
Acked-by: Tomasz Figa 
Tested-by: Marek Szyprowski

soc: samsung: Add SPDX license identifiers to headers

2018-02-12T18:55:42+00:00

Replace GPL license statements with SPDX GPL-2.0 license identifiers.

Signed-off-by: Krzysztof Kozlowski

phy: exynos: Use one define for enable bit

2017-04-10T11:13:18+00:00

There is no need for separate defines for Exynos4 and Exynos5 phy enable
bit and MIPI phy reset bits.  In both cases there are the same so
simplify it.

This reduces number of defines and allows removal of one header file.

Signed-off-by: Krzysztof Kozlowski 
Acked-by: Lee Jones 
Reviewed-by: Bartlomiej Zolnierkiewicz 
Signed-off-by: Kishon Vijay Abraham I

phy: exynos-mipi-video: Use consistent method to address phy registers

2017-04-10T11:13:05+00:00

Exynos4 MIPI phy registers are defined with macro calculating the offset
for given phyN.  Use the same method for Exynos5420 to be consistent.

Signed-off-by: Krzysztof Kozlowski 
Reviewed-by: Bartlomiej Zolnierkiewicz 
Signed-off-by: Kishon Vijay Abraham I

phy: exynos5: Remove duplicated defines of PHY register defines

2017-04-10T11:12:58+00:00

Phy drivers access PMU region through regmap provided by exynos-pmu
driver.   However there is no need to duplicate defines for PMU
registers.  Instead just use whatever is defined in exynos-regs-pmu.h.

This reduces number of defines.

Suggested-by: Marek Szyprowski 
Signed-off-by: Krzysztof Kozlowski 
Acked-by: Lee Jones 
Reviewed-by: Bartlomiej Zolnierkiewicz 
Signed-off-by: Kishon Vijay Abraham I

phy: exynos4: Remove duplicated defines of PHY register defines

2017-04-10T11:12:58+00:00

Phy drivers access PMU region through regmap provided by exynos-pmu
driver.   However there is no need to duplicate defines for PMU
registers.  Instead just use whatever is defined in exynos-regs-pmu.h.

Additionally MIPI PHY registers for Exynos5433 start from the same
address as Exynos4 and Exynos5250 so re-use existing defines.

This reduces number of defines and allows removal of one header file.

Suggested-by: Marek Szyprowski 
Signed-off-by: Krzysztof Kozlowski 
Acked-by: Lee Jones 
Reviewed-by: Bartlomiej Zolnierkiewicz 
Signed-off-by: Kishon Vijay Abraham I

soc: samsung: pmu: Add register defines for pad retention control

2017-02-02T18:00:28+00:00

Add PMU defines related to pad retention control. Will be later used
by the Exynos pin controller driver.

Signed-off-by: Marek Szyprowski 
Signed-off-by: Krzysztof Kozlowski