<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-toradex.git/include/linux/soc/ti, branch v6.0-rc7</title>
<subtitle>Linux kernel for Apalis and Colibri modules</subtitle>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/'/>
<entry>
<title>treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_320.RULE</title>
<updated>2022-06-10T12:51:36+00:00</updated>
<author>
<name>Thomas Gleixner</name>
<email>tglx@linutronix.de</email>
</author>
<published>2022-06-07T14:11:32+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=5a729246e57eac410e4a13f5aba66ae2dc552632'/>
<id>5a729246e57eac410e4a13f5aba66ae2dc552632</id>
<content type='text'>
Based on the normalized pattern:

    this program is free software you can redistribute it and/or modify it
    under the terms of the gnu general public license version 2 as
    published by the free software foundation  this program is distributed
    as is without any warranty of any kind whether express or implied
    without even the implied warranty of merchantability or fitness for a
    particular purpose see the gnu general public license for more details

extracted by the scancode license scanner the SPDX license identifier

    GPL-2.0-only

has been chosen to replace the boilerplate/reference.

Reviewed-by: Allison Randal &lt;allison@lohutok.net&gt;
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Based on the normalized pattern:

    this program is free software you can redistribute it and/or modify it
    under the terms of the gnu general public license version 2 as
    published by the free software foundation  this program is distributed
    as is without any warranty of any kind whether express or implied
    without even the implied warranty of merchantability or fitness for a
    particular purpose see the gnu general public license for more details

extracted by the scancode license scanner the SPDX license identifier

    GPL-2.0-only

has been chosen to replace the boilerplate/reference.

Reviewed-by: Allison Randal &lt;allison@lohutok.net&gt;
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_30.RULE (part 2)</title>
<updated>2022-06-10T12:51:35+00:00</updated>
<author>
<name>Thomas Gleixner</name>
<email>tglx@linutronix.de</email>
</author>
<published>2022-06-07T14:11:13+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=2aec85b26f39fa9e036c5872950c0ef9b479a1ec'/>
<id>2aec85b26f39fa9e036c5872950c0ef9b479a1ec</id>
<content type='text'>
Based on the normalized pattern:

    this program is free software you can redistribute it and/or modify it
    under the terms of the gnu general public license as published by the
    free software foundation version 2  this program is distributed as is
    without any warranty of any kind whether express or implied without
    even the implied warranty of merchantability or fitness for a
    particular purpose see the gnu general public license for more details

extracted by the scancode license scanner the SPDX license identifier

    GPL-2.0-only

has been chosen to replace the boilerplate/reference.

Reviewed-by: Allison Randal &lt;allison@lohutok.net&gt;
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Based on the normalized pattern:

    this program is free software you can redistribute it and/or modify it
    under the terms of the gnu general public license as published by the
    free software foundation version 2  this program is distributed as is
    without any warranty of any kind whether express or implied without
    even the implied warranty of merchantability or fitness for a
    particular purpose see the gnu general public license for more details

extracted by the scancode license scanner the SPDX license identifier

    GPL-2.0-only

has been chosen to replace the boilerplate/reference.

Reviewed-by: Allison Randal &lt;allison@lohutok.net&gt;
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: omap1: fix build with no SoC selected</title>
<updated>2022-04-22T09:08:55+00:00</updated>
<author>
<name>Arnd Bergmann</name>
<email>arnd@arndb.de</email>
</author>
<published>2019-09-12T08:11:24+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=615dce5bf7369334f8c4f19f7f8f2a5634b4f911'/>
<id>615dce5bf7369334f8c4f19f7f8f2a5634b4f911</id>
<content type='text'>
In a multiplatform randconfig kernel, one can have
CONFIG_ARCH_OMAP1 enabled, but none of the specific SoCs.
This leads to some build issues as the code is not
meant to deal with this configuration at the moment:

arch/arm/mach-omap1/io.c:86:20: error: unused function 'omap1_map_common_io' [-Werror,-Wunused-function]
arch/arm/mach-omap1/pm.h:113:2: error: "Power management for this processor not implemented yet" [-Werror,-W#warnings]

Use the same trick as on OMAP2 and guard the actual compilation
of platform code with another Makefile ifdef check based
on an option that depends on having at least one SoC enabled.

The io.c file still needs to get compiled to allow building
device drivers with a dependency on CONFIG_ARCH_OMAP1.

Acked-by: Tony Lindgren &lt;tony@atomide.com&gt;
Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
In a multiplatform randconfig kernel, one can have
CONFIG_ARCH_OMAP1 enabled, but none of the specific SoCs.
This leads to some build issues as the code is not
meant to deal with this configuration at the moment:

arch/arm/mach-omap1/io.c:86:20: error: unused function 'omap1_map_common_io' [-Werror,-Wunused-function]
arch/arm/mach-omap1/pm.h:113:2: error: "Power management for this processor not implemented yet" [-Werror,-W#warnings]

Use the same trick as on OMAP2 and guard the actual compilation
of platform code with another Makefile ifdef check based
on an option that depends on having at least one SoC enabled.

The io.c file still needs to get compiled to allow building
device drivers with a dependency on CONFIG_ARCH_OMAP1.

Acked-by: Tony Lindgren &lt;tony@atomide.com&gt;
Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: omap1: move some headers to include/linux/soc</title>
<updated>2022-04-21T13:01:02+00:00</updated>
<author>
<name>Arnd Bergmann</name>
<email>arnd@arndb.de</email>
</author>
<published>2019-08-06T13:24:58+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=1e9ca7c811f76b16c7822ad009b6b0c352227a15'/>
<id>1e9ca7c811f76b16c7822ad009b6b0c352227a15</id>
<content type='text'>
There are three remaining header files that are used by omap1
specific device drivers:

- mach/soc.h provides cpu_is_omapXXX abstractions
- mach/hardware.h provides omap_read/omap_write functions
  and physical addresses
- mach/mux.h provides an omap specific pinctrl abstraction

This is generally not how we do platform abstractions today,
and it would be good to completely get rid of these in favor
of passing information through platform devices and the pinctrl
subsystem.

However, given that nobody is working on that, just move it
one step forward by splitting out the header files that are
used by drivers today from the machine headers that are only
used internally.

Acked-by: Tony Lindgren &lt;tony@atomide.com&gt;
Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
There are three remaining header files that are used by omap1
specific device drivers:

- mach/soc.h provides cpu_is_omapXXX abstractions
- mach/hardware.h provides omap_read/omap_write functions
  and physical addresses
- mach/mux.h provides an omap specific pinctrl abstraction

This is generally not how we do platform abstractions today,
and it would be good to completely get rid of these in favor
of passing information through platform devices and the pinctrl
subsystem.

However, given that nobody is working on that, just move it
one step forward by splitting out the header files that are
used by drivers today from the machine headers that are only
used internally.

Acked-by: Tony Lindgren &lt;tony@atomide.com&gt;
Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: omap1: move mach/usb.h to include/linux/soc</title>
<updated>2022-04-21T13:00:59+00:00</updated>
<author>
<name>Arnd Bergmann</name>
<email>arnd@arndb.de</email>
</author>
<published>2019-08-06T12:34:31+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=e8e77e97507bf3ec5419b8067d242b538cf75cba'/>
<id>e8e77e97507bf3ec5419b8067d242b538cf75cba</id>
<content type='text'>
The register definitions in this header are used in at least four
different places, with little hope of completely cleaning that up.

Split up the file into a portion that becomes a linux-wide header
under include/linux/soc/ti/, and the parts that are actually only
needed by board files.

Acked-by: Felipe Balbi &lt;felipe.balbi@linux.intel.com&gt;
Acked-by: Tony Lindgren &lt;tony@atomide.com&gt;
Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The register definitions in this header are used in at least four
different places, with little hope of completely cleaning that up.

Split up the file into a portion that becomes a linux-wide header
under include/linux/soc/ti/, and the parts that are actually only
needed by board files.

Acked-by: Felipe Balbi &lt;felipe.balbi@linux.intel.com&gt;
Acked-by: Tony Lindgren &lt;tony@atomide.com&gt;
Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge tag 'mailbox-v5.18' of git://git.linaro.org/landing-teams/working/fujitsu/integration</title>
<updated>2022-03-27T21:21:57+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2022-03-27T21:21:57+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=50d602d81f35621042fa0cdae25808662caffda8'/>
<id>50d602d81f35621042fa0cdae25808662caffda8</id>
<content type='text'>
Pull mailbox updates from Jassi Brar:
 "qcom:
   - add support for MSM8976

  mtk:
   - enable mt8186
   - add ADSP controller driver

  ti:
   - use poll mode during suspend

  tegra:
   - fix tx channel flush

  imx:
   - add i.MX8 SECO MU support
   - prepare for, and add iMX93 support"

* tag 'mailbox-v5.18' of git://git.linaro.org/landing-teams/working/fujitsu/integration:
  dt-bindings: mailbox: add definition for mt8186
  mailbox: ti-msgmgr: Operate mailbox in polled mode during system suspend
  mailbox: ti-msgmgr: Refactor message read during interrupt handler
  mailbox: imx: support i.MX93 S401 MU
  mailbox: imx: support dual interrupts
  mailbox: imx: extend irq to an array
  dt-bindings: mailbox: imx-mu: add i.MX93 S4 MU support
  dt-bindings: mailbox: imx-mu: add i.MX93 MU
  mailbox: imx: add i.MX8 SECO MU support
  mailbox: imx: introduce rxdb callback
  dt-bindings: mailbox: imx-mu: add i.MX8 SECO MU support
  mailbox: imx: enlarge timeout while reading/writing messages to SCFW
  mailbox: imx: fix crash in resume on i.mx8ulp
  mailbox: imx: fix wakeup failure from freeze mode
  mailbox: mediatek: add support for adsp mailbox controller
  dt-bindings: mailbox: mtk,adsp-mbox: add mtk adsp-mbox document
  mailbox: qcom-apcs-ipc: Add compatible for MSM8976 SoC
  dt-bindings: mailbox: Add compatible for the MSM8976
  mailbox: tegra-hsp: Flush whole channel
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Pull mailbox updates from Jassi Brar:
 "qcom:
   - add support for MSM8976

  mtk:
   - enable mt8186
   - add ADSP controller driver

  ti:
   - use poll mode during suspend

  tegra:
   - fix tx channel flush

  imx:
   - add i.MX8 SECO MU support
   - prepare for, and add iMX93 support"

* tag 'mailbox-v5.18' of git://git.linaro.org/landing-teams/working/fujitsu/integration:
  dt-bindings: mailbox: add definition for mt8186
  mailbox: ti-msgmgr: Operate mailbox in polled mode during system suspend
  mailbox: ti-msgmgr: Refactor message read during interrupt handler
  mailbox: imx: support i.MX93 S401 MU
  mailbox: imx: support dual interrupts
  mailbox: imx: extend irq to an array
  dt-bindings: mailbox: imx-mu: add i.MX93 S4 MU support
  dt-bindings: mailbox: imx-mu: add i.MX93 MU
  mailbox: imx: add i.MX8 SECO MU support
  mailbox: imx: introduce rxdb callback
  dt-bindings: mailbox: imx-mu: add i.MX8 SECO MU support
  mailbox: imx: enlarge timeout while reading/writing messages to SCFW
  mailbox: imx: fix crash in resume on i.mx8ulp
  mailbox: imx: fix wakeup failure from freeze mode
  mailbox: mediatek: add support for adsp mailbox controller
  dt-bindings: mailbox: mtk,adsp-mbox: add mtk adsp-mbox document
  mailbox: qcom-apcs-ipc: Add compatible for MSM8976 SoC
  dt-bindings: mailbox: Add compatible for the MSM8976
  mailbox: tegra-hsp: Flush whole channel
</pre>
</div>
</content>
</entry>
<entry>
<title>mailbox: ti-msgmgr: Operate mailbox in polled mode during system suspend</title>
<updated>2022-03-13T01:33:30+00:00</updated>
<author>
<name>Dave Gerlach</name>
<email>d-gerlach@ti.com</email>
</author>
<published>2022-02-10T04:16:31+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=df227dc8a68d81b7fe3416eca16d1f21d0b537f0'/>
<id>df227dc8a68d81b7fe3416eca16d1f21d0b537f0</id>
<content type='text'>
During the system suspend path we must set all queues to operate in
polled mode as it is possible for any protocol built using this mailbox,
such as TISCI, to require communication during the no irq phase of suspend,
and we cannot rely on interrupts there.

Polled mode is implemented by allowing the mailbox user to define an
RX channel as part of the message that is sent which is what gets polled
for a response. If polled mode is enabled, this will immediately be
polled for a response at the end of the mailbox send_data op before
returning success for the data send or timing out if no response is
received.

Finally, to ensure polled mode is always enabled during system suspend,
iterate through all queues to set RX queues to polled mode during system
suspend and disable polled mode for all in the resume handler.

Signed-off-by: Dave Gerlach &lt;d-gerlach@ti.com&gt;
Signed-off-by: Jassi Brar &lt;jaswinder.singh@linaro.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
During the system suspend path we must set all queues to operate in
polled mode as it is possible for any protocol built using this mailbox,
such as TISCI, to require communication during the no irq phase of suspend,
and we cannot rely on interrupts there.

Polled mode is implemented by allowing the mailbox user to define an
RX channel as part of the message that is sent which is what gets polled
for a response. If polled mode is enabled, this will immediately be
polled for a response at the end of the mailbox send_data op before
returning success for the data send or timing out if no response is
received.

Finally, to ensure polled mode is always enabled during system suspend,
iterate through all queues to set RX queues to polled mode during system
suspend and disable polled mode for all in the resume handler.

Signed-off-by: Dave Gerlach &lt;d-gerlach@ti.com&gt;
Signed-off-by: Jassi Brar &lt;jaswinder.singh@linaro.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>firmware: ti_sci: Fix compilation failure when CONFIG_TI_SCI_PROTOCOL is not defined</title>
<updated>2022-02-02T19:12:37+00:00</updated>
<author>
<name>Christophe JAILLET</name>
<email>christophe.jaillet@wanadoo.fr</email>
</author>
<published>2021-12-23T16:23:00+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=043cfff99a18933fda2fb2e163daee73cc07910b'/>
<id>043cfff99a18933fda2fb2e163daee73cc07910b</id>
<content type='text'>
Remove an extra ";" which breaks compilation.

Fixes: 53bf2b0e4e4c ("firmware: ti_sci: Add support for getting resource with subtype")
Signed-off-by: Christophe JAILLET &lt;christophe.jaillet@wanadoo.fr&gt;
Signed-off-by: Nishanth Menon &lt;nm@ti.com&gt;
Link: https://lore.kernel.org/r/e6c3cb793e1a6a2a0ae2528d5a5650dfe6a4b6ff.1640276505.git.christophe.jaillet@wanadoo.fr
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Remove an extra ";" which breaks compilation.

Fixes: 53bf2b0e4e4c ("firmware: ti_sci: Add support for getting resource with subtype")
Signed-off-by: Christophe JAILLET &lt;christophe.jaillet@wanadoo.fr&gt;
Signed-off-by: Nishanth Menon &lt;nm@ti.com&gt;
Link: https://lore.kernel.org/r/e6c3cb793e1a6a2a0ae2528d5a5650dfe6a4b6ff.1640276505.git.christophe.jaillet@wanadoo.fr
</pre>
</div>
</content>
</entry>
<entry>
<title>soc: ti: ti_sci_inta_msi: Remove ti_sci_inta_msi_domain_free_irqs()</title>
<updated>2021-12-16T21:22:19+00:00</updated>
<author>
<name>Thomas Gleixner</name>
<email>tglx@linutronix.de</email>
</author>
<published>2021-12-06T22:51:37+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=7ad321a5eadb52b4af1c577dda51783e08235ea7'/>
<id>7ad321a5eadb52b4af1c577dda51783e08235ea7</id>
<content type='text'>
The function has no users and is pointless now that the core frees the MSI
descriptors, which means potential users can just use msi_domain_free_irqs().

Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Tested-by: Nishanth Menon &lt;nm@ti.com&gt;
Reviewed-by: Jason Gunthorpe &lt;jgg@nvidia.com&gt;
Link: https://lore.kernel.org/r/20211206210748.793119155@linutronix.de

</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The function has no users and is pointless now that the core frees the MSI
descriptors, which means potential users can just use msi_domain_free_irqs().

Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Tested-by: Nishanth Menon &lt;nm@ti.com&gt;
Reviewed-by: Jason Gunthorpe &lt;jgg@nvidia.com&gt;
Link: https://lore.kernel.org/r/20211206210748.793119155@linutronix.de

</pre>
</div>
</content>
</entry>
<entry>
<title>soc: ti: ti_sci_inta_msi: Get rid of ti_sci_inta_msi_get_virq()</title>
<updated>2021-12-16T21:16:41+00:00</updated>
<author>
<name>Thomas Gleixner</name>
<email>tglx@linutronix.de</email>
</author>
<published>2021-12-10T22:19:35+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=89e0032ec201f76c86d6e3e6f94574dfb8e39b71'/>
<id>89e0032ec201f76c86d6e3e6f94574dfb8e39b71</id>
<content type='text'>
Just use the core function msi_get_virq().

Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Tested-by: Nishanth Menon &lt;nm@ti.com&gt;
Reviewed-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
Reviewed-by: Jason Gunthorpe &lt;jgg@nvidia.com&gt;
Acked-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
Acked-by: Vinod Koul &lt;vkoul@kernel.org&gt;
Acked-by: Nishanth Menon &lt;nm@ti.com&gt;
Link: https://lore.kernel.org/r/20211210221815.269468319@linutronix.de

</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Just use the core function msi_get_virq().

Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Tested-by: Nishanth Menon &lt;nm@ti.com&gt;
Reviewed-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
Reviewed-by: Jason Gunthorpe &lt;jgg@nvidia.com&gt;
Acked-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
Acked-by: Vinod Koul &lt;vkoul@kernel.org&gt;
Acked-by: Nishanth Menon &lt;nm@ti.com&gt;
Link: https://lore.kernel.org/r/20211210221815.269468319@linutronix.de

</pre>
</div>
</content>
</entry>
</feed>
