linux-toradex.git/include/linux/stmmac.h, branch v3.7

net:stmmac: Remove bus_id from mdio platform data.

2012-08-31T20:11:28+00:00

This patch removes bus_id from mdio platform data, The reason to remove
bus_id is, stmmac mdio bus_id is always same as stmmac bus-id, so there
is no point in passing this in different variable.
Also stmmac ethernet driver connects to phy with bus_id passed its
platform data.
So, having single bus-id is much simpler.

Signed-off-by: Srinivas Kandagatla 
Signed-off-by: David S. Miller

stmmac: add mixed burst for DMA

2012-05-14T22:53:19+00:00

In mixed burst (MB) mode, the AHB master always initiates
the bursts with fixed-size when the DMA requests transfers
of size less than or equal to 16 beats.
This patch adds the MB support and the flag that can be
passed from the platform to select it.
MB mode can also give some benefits in terms of performances
on some platforms.

v2: fixed Coding Style

Signed-off-by: Giuseppe Cavallaro 
Signed-off-by: David S. Miller

stmmac: use custom init/exit functions in pm ops

2012-04-20T00:08:44+00:00

Freeze and restore can call the custom init/exit functions.
Also the patch adds a custom data field that can be used
for storing platform data useful on restore the embedded
setup (e.g. GPIO, SYSCFG).

Signed-off-by: Francesco Virlinzi 
Signed-off-by: Giuseppe Cavallaro 
Signed-off-by: David S. Miller

stmmac: extend CSR Clock Range programming

2012-04-04T22:39:24+00:00

The CSR Clock Range has been reworked and new macros has
been added in the platform header to allow the CSR Clock
Range selection in the GMII Address Register.
The previous work didn't add the other fields
that can be used to achieve MDC clock of frequency
higher than the IEEE 802.3 specified frequency limit
of 2.5 MHz and program a clock divider of lower value.
On such platforms, these are used indeed so this patch
adds them.

Signed-off-by: Giuseppe Cavallaro 
Signed-off-by: David S. Miller

stmmac: re-work the internal GMAC DMA platf parameters

2012-04-04T22:39:24+00:00

This patch re-works the internal GMAC DMA parameters
passed from the platform.
In the past, we only passed the pbl but, with new core,
other parameters can be passed and are mandatory on some
platforms.

New parameters are documented in stmmac.txt because this
patch has an impact for many platforms.

Signed-off-by: Shiraz Hashim 
Signed-off-by: Vikas Manocha 
Signed-off-by: Deepak Sikri 
Hacked-by: Giuseppe Cavallaro 
Signed-off-by: David S. Miller

stmmac: Define MDC clock selection macros

2012-04-04T22:39:23+00:00

The patch adds the macros to be used for MDC clock selection. The MDC clock
frequency is based on scaled system clock, and has to be confined to a range
of 1-2.5 MHz. Based on the input CSR clock, the scaling factor has to be
selected.
The platform specific code will provide the default value of this scaling
factor, based on the input CSR clock.
There is an option to set MDC clock higher than the IEEE 802.3 specified
frequency limit of 2.5 MHz. This applies for the interfacing chips that
support higher MDC clocks. The resultant higher clock of 12.5 MHz requires
additional Macros to be defined for the clock divider corresponding to the
to the following selection.
-----------------------------------------
	Selection	MDC Clock
-----------------------------------------
	1000 		clk_csr_i/4
	1001 		clk_csr_i/6
	1010 		clk_csr_i/8
	1011 		clk_csr_i/10
	1100 		clk_csr_i/12
	1101	 	clk_csr_i/14
	1110 		clk_csr_i/16
	1111 		clk_csr_i/18

This support has to be added both in the include file, as well as driver. The
driver need to program the registers based on the interfacing chips. This would
be more board specific information and needs to be passed through the platform
code to the driver. This work would be carried out in the future patch set
release.

Signed-off-by: Deepak Sikri 
Acked-by: Giuseppe Cavallaro 
Signed-off-by: David S. Miller

stmmac: Define CSUM offload engine Types

2012-04-04T22:39:23+00:00

This patch explicitly defines the CSUM offload engine type which need
(not mandatory) to be passed from the platform code.
STMMAC core supports two check sum offload engine types- Type-1 & Type-2.
Also, there are STMMAC cores that do not have the check sum offload
capabilities.

The behaviour of Type-1 & Type-2 cores related to provision of checksum
increases the packet length for Type-1 cores by 2, as the checksum is appended
at the end of data packet and the same is made accountable in the DMA status.
The STMMAC cores beyond Version-3.5 provide HW interface registers which allows
the user to read the HW capabilities, while to support the previous cores the
information related to HW capabilities has to be provided from the platform
code.

The Type-1 cores which do not have the HW register interface need this
information.

This patch also updates the driver's doc.

Signed-off-by: Deepak Sikri 
Hacked-by: Giuseppe Cavallaro 
Signed-off-by: David S. Miller

stmmac: Allow stmmac to work with other PHY buses(v3).

2012-04-04T22:39:23+00:00

As stmmac mdio bus name prefix is hardcoded in the driver, this allows
only phys on stmmac mdio buses to connect, however stmmac should allow
phys on other mdio buses too.

This patch adds new variable phy_bus_name to plat_stmmacenet_data
struct to let the BSP decide which phy bus to be used by stmmac driver.
A typical use-case is to have generic MDIO buses like mdio-gpio on top
of stmmac.

Signed-off-by: Srinivas Kandagatla 
Acked-by: Florian Fainelli 
Signed-off-by: Giuseppe Cavallaro 
Signed-off-by: David S. Miller

stmmac: unify MAC and PHY configuration parameters (V2)

2011-07-21T22:29:16+00:00

Prior to this change, most PHY configuration parameters were passed
into the STMMAC device as a separate PHY device. As well as being
unusual, this made it difficult to make changes to the MAC/PHY
relationship.

This patch moves all the PHY parameters into the MAC configuration
structure, mainly as a separate structure. This allows us to completely
ignore the MDIO bus attached to a stmmac if desired, and not create
the PHY bus. It also allows the stmmac driver to use a different PHY
from the one it is connected to, for example a fixed PHY or bit banging
PHY.

Also derive the stmmac/PHY connection type (MII/RMII etc) from the
mode can be passed into _configure_ethernet.
STLinux kernel at git://git.stlinux.com/stm/linux-sh4-2.6.32.y.git
provides several examples how to use this new infrastructure (that
actually is easier to maintain and clearer).

Signed-off-by: Stuart Menefy 
Signed-off-by: Giuseppe Cavallaro 
Signed-off-by: David S. Miller

stmmac: Allow SOCs to use Store forward mode eventhough tx_coe is 0. (V2)

2011-07-18T17:47:24+00:00

This patch adds new field 'force_sf_dma_mode' to plat_stmmacenet_data
struct to allow users to specify if they want to use force store forward
eventhough tx_coe is not available in hw.
without this flag stmmac driver will use cut-thru mode not use
store-forward mode.

Signed-off-by: Srinivas Kandagatla 
Signed-off-by: Giuseppe Cavallaro 
Signed-off-by: David S. Miller