linux-toradex.git/include/media, branch colibri Linux kernel for Apalis and Colibri modules media: added camera settings per decoder 2014-04-22T06:43:29+00:00 Wojciech Bieganski wbieganski@antmicro.com 2014-04-14T13:56:00+00:00 adc6a443b7df188545c99cea1c3ebd5c965763b7 This commit adds settings such as: - values of horizontal/vertical active start, - enabling/disabling internal sync, to the private data of decoders: MAX9526, ADV7180, TVP5150, OV7670 and AS0260. The feature is available through *_tegra_camera_platform_data struct initialised in board-*.c files. 
This commit adds settings such as:
 - values of horizontal/vertical active start,
 - enabling/disabling internal sync,
to the private data of decoders: MAX9526, ADV7180, TVP5150,
OV7670 and AS0260.
The feature is available through *_tegra_camera_platform_data
struct initialised in board-*.c files.
media: soc_camera: add OV5650 SoC camera I2C device driver 2013-03-05T17:42:45+00:00 Bryan Wu pengw@nvidia.com 2013-01-17T01:27:29+00:00 58d8e724d2241b63870ff771dd6962ce9dc5e10c OV5650 is a RAW sensor outputing Bayer RAW 8 or RAW 10 data. This driver uses SoC camera interface and supports several different resolution. Change-Id: I8075b63b42f7949a264bdef446f5ed8bdc0a9eee Signed-off-by: Bryan Wu <pengw@nvidia.com> Reviewed-on: http://git-master/r/200223 GVS: Gerrit_Virtual_Submit Reviewed-by: Matthew Pedro <mapedro@nvidia.com> 
OV5650 is a RAW sensor outputing Bayer RAW 8 or RAW 10 data.
This driver uses SoC camera interface and supports several
different resolution.

Change-Id: I8075b63b42f7949a264bdef446f5ed8bdc0a9eee
Signed-off-by: Bryan Wu <pengw@nvidia.com>
Reviewed-on: http://git-master/r/200223
GVS: Gerrit_Virtual_Submit
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
media: ov5640: Add Omnivision OV5640 support 2012-12-17T19:32:42+00:00 Andrew Chew achew@nvidia.com 2012-08-08T20:35:33+00:00 8410f55a21b22ea2dee38bb46e918edd6e99c167 Based on ov5642 driver. There seem to be some register differences, so forking the driver to make those changes. Change-Id: Idb4a79757cbbcd15d5456ce82a708f433faaff7a Signed-off-by: Andrew Chew <achew@nvidia.com> Signed-off-by: Bryan Wu <pengw@nvidia.com> Reviewed-on: http://git-master/r/169836 Reviewed-by: Winnie Hsu <whsu@nvidia.com> 
Based on ov5642 driver. There seem to be some register differences,
so forking the driver to make those changes.

Change-Id: Idb4a79757cbbcd15d5456ce82a708f433faaff7a
Signed-off-by: Andrew Chew <achew@nvidia.com>
Signed-off-by: Bryan Wu <pengw@nvidia.com>
Reviewed-on: http://git-master/r/169836
Reviewed-by: Winnie Hsu <whsu@nvidia.com>
media: tegra: Tegra videobuf2 2012-12-17T19:30:58+00:00 Andrew Chew achew@nvidia.com 2012-08-20T20:02:04+00:00 62c2aed60372c97eebda02e8833c15b418a16fb0 This is based off of videobuf2-dma-contig, except we use Tegra's nvmap for the buffer allocations. Signed-off-by: Andrew Chew <achew@nvidia.com> Change-Id: I15e689c33ee7b4fc0aade794c78701c82483df3f Reviewed-on: http://git-master/r/145345 (cherry picked from commit 70a4f20fbdd6c2c719400d6c59ef58d845657031) Signed-off-by: Bryan Wu <pengw@nvidia.com> Change-Id: Ia0632d7fcb28415e33fbb22c48f29117d7436f1d Reviewed-on: http://git-master/r/170824 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Andrew Chew <achew@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Winnie Hsu <whsu@nvidia.com> 
This is based off of videobuf2-dma-contig, except we use Tegra's
nvmap for the buffer allocations.

Signed-off-by: Andrew Chew <achew@nvidia.com>
Change-Id: I15e689c33ee7b4fc0aade794c78701c82483df3f
Reviewed-on: http://git-master/r/145345
(cherry picked from commit 70a4f20fbdd6c2c719400d6c59ef58d845657031)

Signed-off-by: Bryan Wu <pengw@nvidia.com>
Change-Id: Ia0632d7fcb28415e33fbb22c48f29117d7436f1d
Reviewed-on: http://git-master/r/170824
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Andrew Chew <achew@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Winnie Hsu <whsu@nvidia.com>
media: tegra: Tegra V4L2 camera 2012-12-17T19:30:36+00:00 Andrew Chew achew@nvidia.com 2011-03-29T01:38:39+00:00 792af1fd4fd216852b51266ccdef8f770648e922 This is the Tegra V4L2 camera host driver, for Tegra2/Tegra3's VI/CSI controller. Signed-off-by: Andrew Chew <achew@nvidia.com> Change-Id: If2d9eefe53c2119c1a6ae518216e1a3c3ed216ef Reviewed-on: http://git-master/r/145346 (cherry picked from commit 5a9bfd588b755f354ae21471a3a2a3e559ca6fae) Signed-off-by: Bryan Wu <pengw@nvidia.com> Change-Id: I4db33b17efdb401938603cb2153d73bf3421ba61 Reviewed-on: http://git-master/r/170823 Reviewed-by: Andrew Chew <achew@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Winnie Hsu <whsu@nvidia.com> 
This is the Tegra V4L2 camera host driver, for Tegra2/Tegra3's VI/CSI
controller.

Signed-off-by: Andrew Chew <achew@nvidia.com>
Change-Id: If2d9eefe53c2119c1a6ae518216e1a3c3ed216ef
Reviewed-on: http://git-master/r/145346
(cherry picked from commit 5a9bfd588b755f354ae21471a3a2a3e559ca6fae)

Signed-off-by: Bryan Wu <pengw@nvidia.com>
Change-Id: I4db33b17efdb401938603cb2153d73bf3421ba61
Reviewed-on: http://git-master/r/170823
Reviewed-by: Andrew Chew <achew@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Winnie Hsu <whsu@nvidia.com>
tegra_camera: fix building error when disable CONFIG_TEGRA_CAMERA 2012-12-17T19:29:27+00:00 Bryan Wu pengw@nvidia.com 2012-11-30T00:01:28+00:00 4d667a6aff6ce8089973b73a5e6645e750045356 LD vmlinux.o drivers/built-in.o: In function `is_tegra_camera_on': /home/roc/Work/bug_vip/source_vibrante/kernel/include/media/ tegra_camera.h:59: multiple definition of `is_tegra_camera_on' arch/arm/mach-tegra/built-in.o:/home/roc/Work/bug_vip/source_vibrante /kernel/include/media/tegra_camera.h:59: first defined here make: *** [vmlinux.o] Error 1 Commit '678708d WAR: gr3d: limit 3d clock when camera is on' introduced a function is_tegra_camera_on(), which is dummy when CONFIG_TEGRA_CAMERA is disabled. But it will be multiple defined when includ this header file in multiple C files. So marking it as static will kill this error. Change-Id: I9dbcf1231f744c23e761d70da0bfc874fb286e4a Signed-off-by: Bryan Wu <pengw@nvidia.com> Reviewed-on: http://git-master/r/167510 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Winnie Hsu <whsu@nvidia.com> 
  LD      vmlinux.o
drivers/built-in.o: In function `is_tegra_camera_on':
/home/roc/Work/bug_vip/source_vibrante/kernel/include/media/
tegra_camera.h:59: multiple definition of `is_tegra_camera_on'
arch/arm/mach-tegra/built-in.o:/home/roc/Work/bug_vip/source_vibrante
/kernel/include/media/tegra_camera.h:59: first defined here
make: *** [vmlinux.o] Error 1

Commit '678708d WAR: gr3d: limit 3d clock when camera is on'
introduced a function is_tegra_camera_on(), which is dummy when
CONFIG_TEGRA_CAMERA is disabled. But it will be multiple defined
when includ this header file in multiple C files.

So marking it as static will kill this error.

Change-Id: I9dbcf1231f744c23e761d70da0bfc874fb286e4a
Signed-off-by: Bryan Wu <pengw@nvidia.com>
Reviewed-on: http://git-master/r/167510
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Winnie Hsu <whsu@nvidia.com>
WAR: gr3d: limit 3d clock when camera is on 2012-09-10T21:29:24+00:00 Jihoon Bang jbang@nvidia.com 2012-06-19T23:12:00+00:00 678708d95daa7d29ad5f49944f1b5385e3f27401 As WAR, limit 3d clock frequency and emc clock frequency when camera is on and chip is AP37. 3d clock is set to 361MHz and 437MHz is requested for emc clock with this change. This change allows 3d to request 1.1V in Core instead of 1.3V in AP37. Bug 1001262 Bug 1019309 Change-Id: I9f46f93d8da0fcf5afe05839177bf0d6e43a5840 Signed-off-by: Jihoon Bang <jbang@nvidia.com> Reviewed-on: http://git-master/r/130945 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> Tested-by: Bharat Nihalani <bnihalani@nvidia.com> 
As WAR, limit 3d clock frequency and emc clock frequency
when camera is on and chip is AP37. 3d clock is set to
361MHz and 437MHz is requested for emc clock with this
change. This change allows 3d to request 1.1V in Core
instead of 1.3V in AP37.

Bug 1001262
Bug 1019309

Change-Id: I9f46f93d8da0fcf5afe05839177bf0d6e43a5840
Signed-off-by: Jihoon Bang <jbang@nvidia.com>
Reviewed-on: http://git-master/r/130945
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>
media: video: tegra: ar0832: Add slew rate support 2012-08-22T02:50:23+00:00 Naren Bhat nbhat@nvidia.com 2012-08-20T19:39:16+00:00 a83be233254b0f8c85aa4c8d0aa33fd3071ec962 Add slew rate support for AR0832 focuser. bug 1028733 Change-Id: I4fd0245fad7f7c820fc30a7c4bfc970d52903da6 Signed-off-by: Naren Bhat <nbhat@nvidia.com> Reviewed-on: http://git-master/r/124695 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Jon Mayo <jmayo@nvidia.com> Reviewed-by: Frank Chen <frankc@nvidia.com> Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com> 
Add slew rate support for AR0832 focuser.

bug 1028733

Change-Id: I4fd0245fad7f7c820fc30a7c4bfc970d52903da6
Signed-off-by: Naren Bhat <nbhat@nvidia.com>
Reviewed-on: http://git-master/r/124695
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-by: Frank Chen <frankc@nvidia.com>
Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com>
media: tegra: ov9726: add group hold ioctl 2012-08-03T02:47:54+00:00 Charlie Huang chahuang@nvidia.com 2012-08-01T01:41:38+00:00 dea3cff314ed834dc5d7f3514f9ba0468c0ec133 To make AE transition smoother, the group hold enable/disable actions should be added before and after set gain/frame length/coarse time. bug 1025995 Change-Id: I578b33167e50f59d0d9a88a0e16fac0c5425b6b6 Signed-off-by: Charlie Huang <chahuang@nvidia.com> Reviewed-on: http://git-master/r/119835 Reviewed-by: Frank Chen <frankc@nvidia.com> Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Abhinav Sinha <absinha@nvidia.com> Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com> 
To make AE transition smoother, the group hold enable/disable actions
should be added before and after set gain/frame length/coarse time.

bug 1025995

Change-Id: I578b33167e50f59d0d9a88a0e16fac0c5425b6b6
Signed-off-by: Charlie Huang <chahuang@nvidia.com>
Reviewed-on: http://git-master/r/119835
Reviewed-by: Frank Chen <frankc@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Abhinav Sinha <absinha@nvidia.com>
Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com>
media: video: tegra: sh532u: Focuser range tuning support 2012-07-11T14:25:24+00:00 Naren Bhat nbhat@nvidia.com 2012-06-21T23:48:51+00:00 bcd0a2fc0a3b246556ad184af72e49779867e876 Support for get/set capabilities added. Focuser code has a way to calibrate itself that results in determination of optimal working range. This along with actual range from device ROM are returned to the caller. Focuser has the macro at lower end and infinity at farther end of the range, which are reversed to the user level to keep the inf/macro positions to be consistent. Focuser range translation is taken out. Bug 1004816 Change-Id: I1a086ff10e99940f9ad861397bf7e71e9996c68a Signed-off-by: Naren Bhat <nbhat@nvidia.com> Reviewed-on: http://git-master/r/110443 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Charlie Huang <chahuang@nvidia.com> Reviewed-by: Jon Mayo <jmayo@nvidia.com> Reviewed-by: Patrick Shehane <pshehane@nvidia.com> Tested-by: Charlie Huang <chahuang@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> 
Support for get/set capabilities added. Focuser code has a way to
calibrate itself that results in determination of optimal working
range. This along with actual range from device ROM are returned
to the caller. Focuser has the macro at lower end and infinity at
farther end of the range, which are reversed to the user level to
keep the inf/macro positions to be consistent. Focuser range
translation is taken out.

Bug 1004816

Change-Id: I1a086ff10e99940f9ad861397bf7e71e9996c68a
Signed-off-by: Naren Bhat <nbhat@nvidia.com>
Reviewed-on: http://git-master/r/110443
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Charlie Huang <chahuang@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-by: Patrick Shehane <pshehane@nvidia.com>
Tested-by: Charlie Huang <chahuang@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>