linux-toradex.git/include/soc/fsl, branch v6.9-rc4

soc: fsl: cpm1: qmc: Introduce functions to change timeslots at runtime

2023-12-12T09:29:20+00:00

Introduce qmc_chan_{get,set}_ts_info() function to allow timeslots
modification at runtime.

The modification is provided using qmc_chan_set_ts_info() and will be
applied on next qmc_chan_start().
qmc_chan_set_ts_info() must be called with the channel rx and/or tx
stopped.

Signed-off-by: Herve Codina 
Reviewed-by: Christophe Leroy 
Link: https://lore.kernel.org/r/20231205152116.122512-18-herve.codina@bootlin.com

soc: fsl: cpm1: qmc: Add support for child devices

2023-12-12T09:29:20+00:00

QMC child devices support is needed to avoid orphan DT nodes that use a
simple DT phandle to reference a QMC channel.

Allow to instantiate child devices and also extend the API to get the
qmc_chan using a child device.

Signed-off-by: Herve Codina 
Link: https://lore.kernel.org/r/20231205152116.122512-7-herve.codina@bootlin.com

soc: fsl: cpm1: qmc: Extend the API to provide Rx status

2023-12-12T09:29:20+00:00

In HDLC mode, some status flags related to the data read transfer can be
set by the hardware and need to be known by a QMC consumer for further
analysis.

Extend the API in order to provide these transfer status flags at the
read complete() call.

In TRANSPARENT mode, these flags have no meaning. Keep only one read
complete() API and update the consumers working in transparent mode.
In this case, the newly introduced flags parameter is simply unused.

Signed-off-by: Herve Codina 
Reviewed-by: Christophe Leroy 
Link: https://lore.kernel.org/r/20231205152116.122512-5-herve.codina@bootlin.com

docs: move powerpc under arch

2023-10-10T19:35:55+00:00

and fix all in-tree references.

Architecture-specific documentation is being moved into Documentation/arch/
as a way of cleaning up the top-level documentation directory and making
the docs hierarchy more closely match the source hierarchy.

Signed-off-by: Costa Shulyupin 
Acked-by: Michael Ellerman 
Signed-off-by: Jonathan Corbet 
Link: https://lore.kernel.org/r/20230826165737.2101199-1-costa.shul@redhat.com

soc: fsl: cpm1: Add support for QMC

2023-03-05T23:37:03+00:00

The QMC (QUICC Multichannel Controller) emulates up to 64
channels within one serial controller using the same TDM
physical interface routed from the TSA.

It is available in some	PowerQUICC SoC such as the
MPC885 or MPC866.

It is also available on some Quicc Engine SoCs.
This current version support CPM1 SoCs only and some
enhancement are needed to support Quicc Engine SoCs.

Signed-off-by: Herve Codina 
Acked-by: Li Yang 
Reviewed-by: Christophe Leroy 
Link: https://lore.kernel.org/r/20230217145645.1768659-7-herve.codina@bootlin.com
Signed-off-by: Mark Brown

soc: fsl: qe: request pins non-exclusively

2022-12-05T17:19:34+00:00

Commit 84582f9ed090 ("soc: fsl: qe: Avoid using gpio_to_desc()") changed
qe_pin_request() to request and hold GPIO corresponding to a given pin.
Unfortunately this does not work, as fhci-hcd requests these GPIOs
first, befor calling qe_pin_request() (see
drivers/usb/host/fhci-hcd.c::of_fhci_probe()).
To fix it change qe_pin_request() to request GPIOs non-exclusively, and
free them once the code determines GPIO controller and offset for each
GPIO/pin.

Also reaching deep into gpiolib implementation is not the best idea. We
should either export gpio_chip_hwgpio() or keep converting to the global
gpio numbers space until we fix the driver to implement proper pin
control.

Fixes: 84582f9ed090 ("soc: fsl: qe: Avoid using gpio_to_desc()")
Signed-off-by: Dmitry Torokhov 
Reviewed-by: Andy Shevchenko 
Link: https://lore.kernel.org/r/Y400YXnWBdz1e/L5@google.com
Signed-off-by: Arnd Bergmann

soc: fsl: qbman: Add CGR update function

2022-09-05T13:27:39+00:00

This adds a function to update a CGR with new parameters. qman_create_cgr
can almost be used for this (with flags=0), but it's not suitable because
it also registers the callback function. The _safe variant was modeled off
of qman_cgr_delete_safe. However, we handle multiple arguments and a return
value.

Signed-off-by: Sean Anderson 
Acked-by: Camelia Groza 
Signed-off-by: David S. Miller

crypto: caam - add in-kernel interface for blob generator

2022-05-23T15:47:50+00:00

The NXP Cryptographic Acceleration and Assurance Module (CAAM)
can be used to protect user-defined data across system reboot:

  - When the system is fused and boots into secure state, the master
    key is a unique never-disclosed device-specific key
  - random key is encrypted by key derived from master key
  - data is encrypted using the random key
  - encrypted data and its encrypted random key are stored alongside
  - This blob can now be safely stored in non-volatile memory

On next power-on:
  - blob is loaded into CAAM
  - CAAM writes decrypted data either into memory or key register

Add functions to realize encrypting and decrypting into memory alongside
the CAAM driver.

They will be used in a later commit as a source for the trusted key
seal/unseal mechanism.

Reviewed-by: David Gstir 
Reviewed-by: Pankaj Gupta 
Tested-by: Tim Harvey 
Tested-by: Matthias Schiffer 
Tested-by: Pankaj Gupta 
Tested-by: Michael Walle  # on ls1028a (non-E and E)
Tested-by: John Ernberg  # iMX8QXP
Signed-off-by: Steffen Trumtrar 
Signed-off-by: Ahmad Fatoum 
Signed-off-by: Jarkko Sakkinen

soc: fsl: Replace kernel.h with the necessary inclusions

2022-02-18T23:11:17+00:00

When kernel.h is used in the headers it adds a lot into dependency hell,
especially when there are circular dependencies are involved.

Replace kernel.h inclusion with the list of what is really being used.

Signed-off-by: Andy Shevchenko 
Signed-off-by: Li Yang

soc: fsl: dpio: add Net DIM integration

2021-10-15T13:32:41+00:00

Use the generic dynamic interrupt moderation (dim) framework to
implement adaptive interrupt coalescing on Rx. With the per-packet
interrupt scheme, a high interrupt rate has been noted for moderate
traffic flows leading to high CPU utilization.

The dpio driver exports new functions to enable/disable adaptive IRQ
coalescing on a DPIO object, to query the state or to update Net DIM
with a new set of bytes and frames dequeued.

Signed-off-by: Ioana Ciornei 
Signed-off-by: David S. Miller