<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-toradex.git/include/soc/tegra, branch v4.16-rc4</title>
<subtitle>Linux kernel for Apalis and Colibri modules</subtitle>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/'/>
<entry>
<title>Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc</title>
<updated>2018-02-02T00:35:31+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2018-02-02T00:35:31+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=fe53d1443a146326b49d57fe6336b5c2a725223f'/>
<id>fe53d1443a146326b49d57fe6336b5c2a725223f</id>
<content type='text'>
Pull ARM SoC driver updates from Arnd Bergmann:
 "A number of new drivers get added this time, along with many
  low-priority bugfixes. The most interesting changes by subsystem are:

  bus drivers:
   - Updates to the Broadcom bus interface driver to support newer SoC
     types
   - The TI OMAP sysc driver now supports updated DT bindings

  memory controllers:
   - A new driver for Tegra186 gets added
   - A new driver for the ti-emif sram, to allow relocating
     suspend/resume handlers there

  SoC specific:
   - A new driver for Qualcomm QMI, the interface to the modem on MSM
     SoCs
   - A new driver for power domains on the actions S700 SoC
   - A driver for the Xilinx Zynq VCU logicoreIP

  reset controllers:
   - A new driver for Amlogic Meson-AGX
   - various bug fixes

  tee subsystem:
   - A new user interface got added to enable asynchronous communication
     with the TEE supplicant.
   - A new method of using user space memory for communication with the
     TEE is added"

* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (84 commits)
  of: platform: fix OF node refcount leak
  soc: fsl: guts: Add a NULL check for devm_kasprintf()
  bus: ti-sysc: Fix smartreflex sysc mask
  psci: add CPU_IDLE dependency
  soc: xilinx: Fix Kconfig alignment
  soc: xilinx: xlnx_vcu: Use bitwise &amp; rather than logical &amp;&amp; on clkoutdiv
  soc: xilinx: xlnx_vcu: Depends on HAS_IOMEM for xlnx_vcu
  soc: bcm: brcmstb: Be multi-platform compatible
  soc: brcmstb: biuctrl: exit without warning on non brcmstb platforms
  Revert "soc: brcmstb: Only register SoC device on STB platforms"
  bus: omap: add MODULE_LICENSE tags
  soc: brcmstb: Only register SoC device on STB platforms
  tee: shm: Potential NULL dereference calling tee_shm_register()
  soc: xilinx: xlnx_vcu: Add Xilinx ZYNQMP VCU logicoreIP init driver
  dt-bindings: soc: xilinx: Add DT bindings to xlnx_vcu driver
  soc: xilinx: Create folder structure for soc specific drivers
  of: platform: populate /firmware/ node from of_platform_default_populate_init()
  soc: samsung: Add SPDX license identifiers
  soc: qcom: smp2p: Use common error handling code in qcom_smp2p_probe()
  tee: shm: don't put_page on null shm-&gt;pages
  ...
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Pull ARM SoC driver updates from Arnd Bergmann:
 "A number of new drivers get added this time, along with many
  low-priority bugfixes. The most interesting changes by subsystem are:

  bus drivers:
   - Updates to the Broadcom bus interface driver to support newer SoC
     types
   - The TI OMAP sysc driver now supports updated DT bindings

  memory controllers:
   - A new driver for Tegra186 gets added
   - A new driver for the ti-emif sram, to allow relocating
     suspend/resume handlers there

  SoC specific:
   - A new driver for Qualcomm QMI, the interface to the modem on MSM
     SoCs
   - A new driver for power domains on the actions S700 SoC
   - A driver for the Xilinx Zynq VCU logicoreIP

  reset controllers:
   - A new driver for Amlogic Meson-AGX
   - various bug fixes

  tee subsystem:
   - A new user interface got added to enable asynchronous communication
     with the TEE supplicant.
   - A new method of using user space memory for communication with the
     TEE is added"

* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (84 commits)
  of: platform: fix OF node refcount leak
  soc: fsl: guts: Add a NULL check for devm_kasprintf()
  bus: ti-sysc: Fix smartreflex sysc mask
  psci: add CPU_IDLE dependency
  soc: xilinx: Fix Kconfig alignment
  soc: xilinx: xlnx_vcu: Use bitwise &amp; rather than logical &amp;&amp; on clkoutdiv
  soc: xilinx: xlnx_vcu: Depends on HAS_IOMEM for xlnx_vcu
  soc: bcm: brcmstb: Be multi-platform compatible
  soc: brcmstb: biuctrl: exit without warning on non brcmstb platforms
  Revert "soc: brcmstb: Only register SoC device on STB platforms"
  bus: omap: add MODULE_LICENSE tags
  soc: brcmstb: Only register SoC device on STB platforms
  tee: shm: Potential NULL dereference calling tee_shm_register()
  soc: xilinx: xlnx_vcu: Add Xilinx ZYNQMP VCU logicoreIP init driver
  dt-bindings: soc: xilinx: Add DT bindings to xlnx_vcu driver
  soc: xilinx: Create folder structure for soc specific drivers
  of: platform: populate /firmware/ node from of_platform_default_populate_init()
  soc: samsung: Add SPDX license identifiers
  soc: qcom: smp2p: Use common error handling code in qcom_smp2p_probe()
  tee: shm: don't put_page on null shm-&gt;pages
  ...
</pre>
</div>
</content>
</entry>
<entry>
<title>memory: tegra: Create SMMU display groups</title>
<updated>2017-12-15T09:12:32+00:00</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2017-10-12T14:29:19+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=2a8102dfe0da7dbb61794e6b85dc7ac9271e5fc8'/>
<id>2a8102dfe0da7dbb61794e6b85dc7ac9271e5fc8</id>
<content type='text'>
Create SMMU display groups for Tegra30, Tegra114, Tegra124 and Tegra210.
This allows the display controllers on these devices to share the same
IOMMU domain using the standard IOMMU group mechanism.

Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Create SMMU display groups for Tegra30, Tegra114, Tegra124 and Tegra210.
This allows the display controllers on these devices to share the same
IOMMU domain using the standard IOMMU group mechanism.

Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>soc/tegra: pmc: Consolidate Tegra186 support</title>
<updated>2017-12-13T12:06:44+00:00</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2017-08-30T10:42:34+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=c641ec6eab8587a78160d37f085a5ed6e542ca88'/>
<id>c641ec6eab8587a78160d37f085a5ed6e542ca88</id>
<content type='text'>
Move Tegra186 support to the consolidated PMC driver to reduce some of
the duplication and also gain I/O pad functionality on the new SoC as a
side-effect.

Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Move Tegra186 support to the consolidated PMC driver to reduce some of
the duplication and also gain I/O pad functionality on the new SoC as a
side-effect.

Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>firmware: tegra: Add BPMP debugfs support</title>
<updated>2017-10-19T14:27:56+00:00</updated>
<author>
<name>Timo Alho</name>
<email>talho@nvidia.com</email>
</author>
<published>2017-10-03T06:12:13+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=f2381f652266fabfb7a8f5c4b2a05de36cad3a73'/>
<id>f2381f652266fabfb7a8f5c4b2a05de36cad3a73</id>
<content type='text'>
Tegra power management firmware running on the co-processor (BPMP)
implements a simple pseudo file system akin to debugfs. The file
system can be used for debugging purposes to examine and change the
status of selected resources controlled by the firmware (such as
clocks, resets, voltages, powergates, ...).

Add support to "mirror" the firmware's file system to debugfs. At
boot, query firmware for a list of all possible files and create
corresponding debugfs entries. Read/write of individual files is
implemented by sending a Message ReQuest (MRQ) that passes the full
file path name and data to firmware via DRAM.

Signed-off-by: Timo Alho &lt;talho@nvidia.com&gt;
Reviewed-by: Jon Hunter &lt;jonathanh@nvidia.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Tegra power management firmware running on the co-processor (BPMP)
implements a simple pseudo file system akin to debugfs. The file
system can be used for debugging purposes to examine and change the
status of selected resources controlled by the firmware (such as
clocks, resets, voltages, powergates, ...).

Add support to "mirror" the firmware's file system to debugfs. At
boot, query firmware for a list of all possible files and create
corresponding debugfs entries. Read/write of individual files is
implemented by sending a Message ReQuest (MRQ) that passes the full
file path name and data to firmware via DRAM.

Signed-off-by: Timo Alho &lt;talho@nvidia.com&gt;
Reviewed-by: Jon Hunter &lt;jonathanh@nvidia.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>firmware: tegra: Add stubs when BPMP not enabled</title>
<updated>2017-10-19T14:27:56+00:00</updated>
<author>
<name>Mikko Perttunen</name>
<email>mperttunen@nvidia.com</email>
</author>
<published>2017-07-24T16:29:17+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=80d47a91e5db96e5db391aaad414fb6ceb40e7c0'/>
<id>80d47a91e5db96e5db391aaad414fb6ceb40e7c0</id>
<content type='text'>
Add static inline stubs to bpmp.h when CONFIG_BPMP is not enabled.
This allows building BPMP-related drivers with COMPILE_TEST.

Signed-off-by: Mikko Perttunen &lt;mperttunen@nvidia.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add static inline stubs to bpmp.h when CONFIG_BPMP is not enabled.
This allows building BPMP-related drivers with COMPILE_TEST.

Signed-off-by: Mikko Perttunen &lt;mperttunen@nvidia.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>firmware: tegra: Expose tegra_bpmp_mrq_return()</title>
<updated>2017-10-19T14:27:55+00:00</updated>
<author>
<name>Mikko Perttunen</name>
<email>mperttunen@nvidia.com</email>
</author>
<published>2017-07-24T16:29:16+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=2e1e09ed423781d209c1fea773b1c3e614550ea5'/>
<id>2e1e09ed423781d209c1fea773b1c3e614550ea5</id>
<content type='text'>
Expose and export the tegra_bpmp_mrq_return() function for use by
drivers outside the core BPMP driver. This function is used to reply to
messages originating from the BPMP, which is required in the thermal
driver.

Signed-off-by: Mikko Perttunen &lt;mperttunen@nvidia.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Expose and export the tegra_bpmp_mrq_return() function for use by
drivers outside the core BPMP driver. This function is used to reply to
messages originating from the BPMP, which is required in the thermal
driver.

Signed-off-by: Mikko Perttunen &lt;mperttunen@nvidia.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>firmware: tegra: Propagate error code to caller</title>
<updated>2017-10-17T10:22:00+00:00</updated>
<author>
<name>Timo Alho</name>
<email>talho@nvidia.com</email>
</author>
<published>2017-09-07T09:31:01+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=370d010f0ef09db7ab157a6b5d6d9a737b148f2a'/>
<id>370d010f0ef09db7ab157a6b5d6d9a737b148f2a</id>
<content type='text'>
Response messages from Tegra BPMP firmware contain an error return code
as the first word of payload. The error code is used to indicate
incorrectly formatted request message or use of non-existing resource
(clk, reset, powergate) identifier. Current implementation of
tegra_bpmp_transfer() ignores this code and does not pass it to caller.
Fix this by adding an extra struct member to tegra_bpmp_message and
populate that with return code.

Signed-off-by: Timo Alho &lt;talho@nvidia.com&gt;
Acked-by: Jon Hunter &lt;jonathanh@nvidia.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Response messages from Tegra BPMP firmware contain an error return code
as the first word of payload. The error code is used to indicate
incorrectly formatted request message or use of non-existing resource
(clk, reset, powergate) identifier. Current implementation of
tegra_bpmp_transfer() ignores this code and does not pass it to caller.
Fix this by adding an extra struct member to tegra_bpmp_message and
populate that with return code.

Signed-off-by: Timo Alho &lt;talho@nvidia.com&gt;
Acked-by: Jon Hunter &lt;jonathanh@nvidia.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>soc/tegra: Register SoC device</title>
<updated>2017-08-17T14:43:13+00:00</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2017-08-17T14:42:17+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=27a0342ac162bf2ba30c288cfb7b72eabed38d8b'/>
<id>27a0342ac162bf2ba30c288cfb7b72eabed38d8b</id>
<content type='text'>
Move this code from arch/arm/mach-tegra and make it common among 32-bit
and 64-bit Tegra SoCs. This is slightly complicated by the fact that on
32-bit Tegra, the SoC device is used as the parent for all devices that
are instantiated from device tree.

Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Move this code from arch/arm/mach-tegra and make it common among 32-bit
and 64-bit Tegra SoCs. This is slightly complicated by the fact that on
32-bit Tegra, the SoC device is used as the parent for all devices that
are instantiated from device tree.

Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>soc/tegra: bpmp: Implement generic PM domains</title>
<updated>2017-06-13T13:23:29+00:00</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2017-03-29T16:34:52+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=e7149a7a3fc4ee6785f17961738f40ce1266d8d0'/>
<id>e7149a7a3fc4ee6785f17961738f40ce1266d8d0</id>
<content type='text'>
The BPMP firmware, found on Tegra186 and later, provides an ABI that can
be used to enable and disable power to several power partitions in Tegra
SoCs. The ABI allows for enumeration of the available power partitions,
so the driver can be reused on future generations, provided the BPMP ABI
remains stable.

Based on work by Stefan Kristiansson &lt;stefank@nvidia.com&gt; and Mikko
Perttunen &lt;mperttunen@nvidia.com&gt;.

Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
Reviewed-by: Ulf Hansson &lt;ulf.hansson@linaro.org&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The BPMP firmware, found on Tegra186 and later, provides an ABI that can
be used to enable and disable power to several power partitions in Tegra
SoCs. The ABI allows for enumeration of the available power partitions,
so the driver can be reused on future generations, provided the BPMP ABI
remains stable.

Based on work by Stefan Kristiansson &lt;stefank@nvidia.com&gt; and Mikko
Perttunen &lt;mperttunen@nvidia.com&gt;.

Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
Reviewed-by: Ulf Hansson &lt;ulf.hansson@linaro.org&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>soc/tegra: bpmp: Update ABI header</title>
<updated>2017-06-13T13:16:25+00:00</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2017-03-29T16:34:51+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=52b8b80395835c3012bf79fc9d5a1dd82a2d922a'/>
<id>52b8b80395835c3012bf79fc9d5a1dd82a2d922a</id>
<content type='text'>
Update the BPMP ABI header to a more recent version. The new version
adds support for a new powergating ABI as well as access to the ring
buffer console, which allows debug messages to be output to the BPMP
debug console.

Some of the previously undocumented fields have been documented and
missing bitmasks have been added. Furthermore the MRQ_RESET request
now has a sub-command that allows to determine the maximum ID which
in turn allows the resets to be enumerated, thereby allowing drivers
to become agnostic of the Tegra generation.

Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Update the BPMP ABI header to a more recent version. The new version
adds support for a new powergating ABI as well as access to the ring
buffer console, which allows debug messages to be output to the BPMP
debug console.

Some of the previously undocumented fields have been documented and
missing bitmasks have been added. Furthermore the MRQ_RESET request
now has a sub-command that allows to determine the maximum ID which
in turn allows the resets to be enumerated, thereby allowing drivers
to become agnostic of the Tegra generation.

Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</pre>
</div>
</content>
</entry>
</feed>
