<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-toradex.git/include/soc/tegra, branch v4.6-rc3</title>
<subtitle>Linux kernel for Apalis and Colibri modules</subtitle>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/'/>
<entry>
<title>Merge tag 'iommu-updates-v4.3' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu</title>
<updated>2015-09-09T00:22:35+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2015-09-09T00:22:35+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=9a9952bbd76a13fc2c95c28f09ba1801a3664929'/>
<id>9a9952bbd76a13fc2c95c28f09ba1801a3664929</id>
<content type='text'>
Pull iommu updates for from Joerg Roedel:
 "This time the IOMMU updates are mostly cleanups or fixes.  No big new
  features or drivers this time.  In particular the changes include:

   - Bigger cleanup of the Domain&lt;-&gt;IOMMU data structures and the code
     that manages them in the Intel VT-d driver.  This makes the code
     easier to understand and maintain, and also easier to keep the data
     structures in sync.  It is also a preparation step to make use of
     default domains from the IOMMU core in the Intel VT-d driver.

   - Fixes for a couple of DMA-API misuses in ARM IOMMU drivers, namely
     in the ARM and Tegra SMMU drivers.

   - Fix for a potential buffer overflow in the OMAP iommu driver's
     debug code

   - A couple of smaller fixes and cleanups in various drivers

   - One small new feature: Report domain-id usage in the Intel VT-d
     driver to easier detect bugs where these are leaked"

* tag 'iommu-updates-v4.3' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu: (83 commits)
  iommu/vt-d: Really use upper context table when necessary
  x86/vt-d: Fix documentation of DRHD
  iommu/fsl: Really fix init section(s) content
  iommu/io-pgtable-arm: Unmap and free table when overwriting with block
  iommu/io-pgtable-arm: Move init-fn declarations to io-pgtable.h
  iommu/msm: Use BUG_ON instead of if () BUG()
  iommu/vt-d: Access iomem correctly
  iommu/vt-d: Make two functions static
  iommu/vt-d: Use BUG_ON instead of if () BUG()
  iommu/vt-d: Return false instead of 0 in irq_remapping_cap()
  iommu/amd: Use BUG_ON instead of if () BUG()
  iommu/amd: Make a symbol static
  iommu/amd: Simplify allocation in irq_remapping_alloc()
  iommu/tegra-smmu: Parameterize number of TLB lines
  iommu/tegra-smmu: Factor out tegra_smmu_set_pde()
  iommu/tegra-smmu: Extract tegra_smmu_pte_get_use()
  iommu/tegra-smmu: Use __GFP_ZERO to allocate zeroed pages
  iommu/tegra-smmu: Remove PageReserved manipulation
  iommu/tegra-smmu: Convert to use DMA API
  iommu/tegra-smmu: smmu_flush_ptc() wants device addresses
  ...
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Pull iommu updates for from Joerg Roedel:
 "This time the IOMMU updates are mostly cleanups or fixes.  No big new
  features or drivers this time.  In particular the changes include:

   - Bigger cleanup of the Domain&lt;-&gt;IOMMU data structures and the code
     that manages them in the Intel VT-d driver.  This makes the code
     easier to understand and maintain, and also easier to keep the data
     structures in sync.  It is also a preparation step to make use of
     default domains from the IOMMU core in the Intel VT-d driver.

   - Fixes for a couple of DMA-API misuses in ARM IOMMU drivers, namely
     in the ARM and Tegra SMMU drivers.

   - Fix for a potential buffer overflow in the OMAP iommu driver's
     debug code

   - A couple of smaller fixes and cleanups in various drivers

   - One small new feature: Report domain-id usage in the Intel VT-d
     driver to easier detect bugs where these are leaked"

* tag 'iommu-updates-v4.3' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu: (83 commits)
  iommu/vt-d: Really use upper context table when necessary
  x86/vt-d: Fix documentation of DRHD
  iommu/fsl: Really fix init section(s) content
  iommu/io-pgtable-arm: Unmap and free table when overwriting with block
  iommu/io-pgtable-arm: Move init-fn declarations to io-pgtable.h
  iommu/msm: Use BUG_ON instead of if () BUG()
  iommu/vt-d: Access iomem correctly
  iommu/vt-d: Make two functions static
  iommu/vt-d: Use BUG_ON instead of if () BUG()
  iommu/vt-d: Return false instead of 0 in irq_remapping_cap()
  iommu/amd: Use BUG_ON instead of if () BUG()
  iommu/amd: Make a symbol static
  iommu/amd: Simplify allocation in irq_remapping_alloc()
  iommu/tegra-smmu: Parameterize number of TLB lines
  iommu/tegra-smmu: Factor out tegra_smmu_set_pde()
  iommu/tegra-smmu: Extract tegra_smmu_pte_get_use()
  iommu/tegra-smmu: Use __GFP_ZERO to allocate zeroed pages
  iommu/tegra-smmu: Remove PageReserved manipulation
  iommu/tegra-smmu: Convert to use DMA API
  iommu/tegra-smmu: smmu_flush_ptc() wants device addresses
  ...
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge tag 'tegra-for-4.3-memory' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/drivers</title>
<updated>2015-08-21T01:50:17+00:00</updated>
<author>
<name>Olof Johansson</name>
<email>olof@lixom.net</email>
</author>
<published>2015-08-21T01:50:17+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=21815b9a24c6e6d3488703609561bd2892d3d9f3'/>
<id>21815b9a24c6e6d3488703609561bd2892d3d9f3</id>
<content type='text'>
ARM: tegra: Memory controller updates for v4.3-rc1

Adds support for Tegra210, which allows the SMMU to be used on this new
SoC generation.

* tag 'tegra-for-4.3-memory' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  memory: tegra: Add Tegra210 support
  memory: tegra: Add support for a variable-size client ID bitfield
  memory: tegra: Expose supported rates via debugfs

Signed-off-by: Olof Johansson &lt;olof@lixom.net&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
ARM: tegra: Memory controller updates for v4.3-rc1

Adds support for Tegra210, which allows the SMMU to be used on this new
SoC generation.

* tag 'tegra-for-4.3-memory' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  memory: tegra: Add Tegra210 support
  memory: tegra: Add support for a variable-size client ID bitfield
  memory: tegra: Expose supported rates via debugfs

Signed-off-by: Olof Johansson &lt;olof@lixom.net&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>iommu/tegra-smmu: Parameterize number of TLB lines</title>
<updated>2015-08-13T15:05:28+00:00</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2015-08-06T12:20:31+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=11cec15bf3fb498206ef63b1fa26c27689e02d0e'/>
<id>11cec15bf3fb498206ef63b1fa26c27689e02d0e</id>
<content type='text'>
The number of TLB lines was increased from 16 on Tegra30 to 32 on
Tegra114 and later. Parameterize the value so that the initial default
can be set accordingly.

On Tegra30, initializing the value to 32 would effectively disable the
TLB and hence cause massive latencies for memory accesses translated
through the SMMU. This is especially noticeable for isochronuous clients
such as display, whose FIFOs would continuously underrun.

Fixes: 891846516317 ("memory: Add NVIDIA Tegra memory controller support")
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The number of TLB lines was increased from 16 on Tegra30 to 32 on
Tegra114 and later. Parameterize the value so that the initial default
can be set accordingly.

On Tegra30, initializing the value to 32 would effectively disable the
TLB and hence cause massive latencies for memory accesses translated
through the SMMU. This is especially noticeable for isochronuous clients
such as display, whose FIFOs would continuously underrun.

Fixes: 891846516317 ("memory: Add NVIDIA Tegra memory controller support")
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>memory: tegra: Add support for a variable-size client ID bitfield</title>
<updated>2015-08-13T14:07:52+00:00</updated>
<author>
<name>Paul Walmsley</name>
<email>paul@pwsan.com</email>
</author>
<published>2015-06-04T19:33:48+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=3c01cf3befa66cc21f06672685cf59a53056887a'/>
<id>3c01cf3befa66cc21f06672685cf59a53056887a</id>
<content type='text'>
Recent versions of the Tegra MC hardware extend the size of the client
ID bitfield in the MC_ERR_STATUS register by one bit.  While one could
simply extend the bitfield for older hardware, that would allow data
from reserved bits into the driver code, which is generally a bad idea
on principle.  So this patch instead passes in the client ID mask from
from the per-SoC MC data.

There's no MC support for T210 (yet), but when that support winds up
in the kernel, the appropriate soc-&gt;client_id_mask value for that chip
will be 0xff.

Based on an original patch by David Ung &lt;davidu@nvidia.com&gt;.

Signed-off-by: Paul Walmsley &lt;paul@pwsan.com&gt;
Cc: Paul Walmsley &lt;pwalmsley@nvidia.com&gt;
Cc: Thierry Reding &lt;treding@nvidia.com&gt;
Cc: David Ung &lt;davidu@nvidia.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Recent versions of the Tegra MC hardware extend the size of the client
ID bitfield in the MC_ERR_STATUS register by one bit.  While one could
simply extend the bitfield for older hardware, that would allow data
from reserved bits into the driver code, which is generally a bad idea
on principle.  So this patch instead passes in the client ID mask from
from the per-SoC MC data.

There's no MC support for T210 (yet), but when that support winds up
in the kernel, the appropriate soc-&gt;client_id_mask value for that chip
will be 0xff.

Based on an original patch by David Ung &lt;davidu@nvidia.com&gt;.

Signed-off-by: Paul Walmsley &lt;paul@pwsan.com&gt;
Cc: Paul Walmsley &lt;pwalmsley@nvidia.com&gt;
Cc: Thierry Reding &lt;treding@nvidia.com&gt;
Cc: David Ung &lt;davidu@nvidia.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>iommu/tegra-smmu: Move flush_dcache to tegra-smmu.c</title>
<updated>2015-08-13T14:06:40+00:00</updated>
<author>
<name>Russell King</name>
<email>rmk+kernel@arm.linux.org.uk</email>
</author>
<published>2015-07-27T12:29:36+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=4b3c7d10765403ab19628fb7d530b8ce1c50b81d'/>
<id>4b3c7d10765403ab19628fb7d530b8ce1c50b81d</id>
<content type='text'>
Drivers should not be using __cpuc_* functions nor outer_cache_flush()
directly.  This change partly cleans up tegra-smmu.c.

The only difference between cache handling of the tegra variants is
Denver, which omits the call to outer_cache_flush().  This is due to
Denver being an ARM64 CPU, and the ARM64 architecture does not provide
this function.  (This, in itself, is a good reason why these should not
be used.)

Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
[treding@nvidia.com: fix build failure on 64-bit ARM]
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Drivers should not be using __cpuc_* functions nor outer_cache_flush()
directly.  This change partly cleans up tegra-smmu.c.

The only difference between cache handling of the tegra variants is
Denver, which omits the call to outer_cache_flush().  This is due to
Denver being an ARM64 CPU, and the ARM64 architecture does not provide
this function.  (This, in itself, is a good reason why these should not
be used.)

Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
[treding@nvidia.com: fix build failure on 64-bit ARM]
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>soc/tegra: fuse: Rename core_* to soc_*</title>
<updated>2015-07-16T08:38:29+00:00</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2015-03-23T13:44:08+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=03b3f4c8b76180ba5bd800c57a7efdb142c2341d'/>
<id>03b3f4c8b76180ba5bd800c57a7efdb142c2341d</id>
<content type='text'>
There's a mixture of core_* and soc_* prefixes for variables storing
information related to the VDD_CORE rail. Choose one (soc_*) and use it
more consistently.

Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
There's a mixture of core_* and soc_* prefixes for variables storing
information related to the VDD_CORE rail. Choose one (soc_*) and use it
more consistently.

Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>soc/tegra: fuse: Add Tegra210 support</title>
<updated>2015-07-16T08:38:29+00:00</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2015-04-29T14:55:57+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=0dc5a0d836751099f2e08deec28f56ec881925dd'/>
<id>0dc5a0d836751099f2e08deec28f56ec881925dd</id>
<content type='text'>
Add Tegra210 support to the fuses driver and add Tegra210-specific
speedo definitions.

Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add Tegra210 support to the fuses driver and add Tegra210-specific
speedo definitions.

Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>soc/tegra: pmc: Add Tegra210 support</title>
<updated>2015-07-16T08:38:27+00:00</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2015-03-23T10:31:29+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=c2fe4694d8ac0f997f6d7088437b710fc4e4a185'/>
<id>c2fe4694d8ac0f997f6d7088437b710fc4e4a185</id>
<content type='text'>
Tegra210 uses a power management controller that is compatible with
earlier SoC generations but adds a couple of power partitions for new
hardware blocks.

Reviewed-by: Paul Walmsley &lt;paul@pwsan.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Tegra210 uses a power management controller that is compatible with
earlier SoC generations but adds a couple of power partitions for new
hardware blocks.

Reviewed-by: Paul Walmsley &lt;paul@pwsan.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc</title>
<updated>2015-06-26T18:54:29+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2015-06-26T18:54:29+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=f5dcb68086ba2e033b2af32b0da0c7a7c7872a09'/>
<id>f5dcb68086ba2e033b2af32b0da0c7a7c7872a09</id>
<content type='text'>
Pull ARM SoC driver updates from Kevin Hilman:
 "Some of these are for drivers/soc, where we're now putting
  SoC-specific drivers these days.  Some are for other driver subsystems
  where we have received acks from the appropriate maintainers.

  Some highlights:

   - simple-mfd: document DT bindings and misc updates
   - migrate mach-berlin to simple-mfd for clock, pinctrl and reset
   - memory: support for Tegra132 SoC
   - memory: introduce tegra EMC driver for scaling memory frequency
   - misc. updates for ARM CCI and CCN busses"

* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (48 commits)
  drivers: soc: sunxi: Introduce SoC driver to map SRAMs
  arm-cci: Add aliases for PMU events
  arm-cci: Add CCI-500 PMU support
  arm-cci: Sanitise CCI400 PMU driver specific code
  arm-cci: Abstract handling for CCI events
  arm-cci: Abstract out the PMU counter details
  arm-cci: Cleanup PMU driver code
  arm-cci: Do not enable CCI-400 PMU by default
  firmware: qcom: scm: Add HDCP Support
  ARM: berlin: add an ADC node for the BG2Q
  ARM: berlin: remove useless chip and system ctrl compatibles
  clk: berlin: drop direct of_iomap of nodes reg property
  ARM: berlin: move BG2Q clock node
  ARM: berlin: move BG2CD clock node
  ARM: berlin: move BG2 clock node
  clk: berlin: prepare simple-mfd conversion
  pinctrl: berlin: drop SoC stub provided regmap
  ARM: berlin: move pinctrl to simple-mfd nodes
  pinctrl: berlin: prepare to use regmap provided by syscon
  reset: berlin: drop arch_initcall initialization
  ...
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Pull ARM SoC driver updates from Kevin Hilman:
 "Some of these are for drivers/soc, where we're now putting
  SoC-specific drivers these days.  Some are for other driver subsystems
  where we have received acks from the appropriate maintainers.

  Some highlights:

   - simple-mfd: document DT bindings and misc updates
   - migrate mach-berlin to simple-mfd for clock, pinctrl and reset
   - memory: support for Tegra132 SoC
   - memory: introduce tegra EMC driver for scaling memory frequency
   - misc. updates for ARM CCI and CCN busses"

* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (48 commits)
  drivers: soc: sunxi: Introduce SoC driver to map SRAMs
  arm-cci: Add aliases for PMU events
  arm-cci: Add CCI-500 PMU support
  arm-cci: Sanitise CCI400 PMU driver specific code
  arm-cci: Abstract handling for CCI events
  arm-cci: Abstract out the PMU counter details
  arm-cci: Cleanup PMU driver code
  arm-cci: Do not enable CCI-400 PMU by default
  firmware: qcom: scm: Add HDCP Support
  ARM: berlin: add an ADC node for the BG2Q
  ARM: berlin: remove useless chip and system ctrl compatibles
  clk: berlin: drop direct of_iomap of nodes reg property
  ARM: berlin: move BG2Q clock node
  ARM: berlin: move BG2CD clock node
  ARM: berlin: move BG2 clock node
  clk: berlin: prepare simple-mfd conversion
  pinctrl: berlin: drop SoC stub provided regmap
  ARM: berlin: move pinctrl to simple-mfd nodes
  pinctrl: berlin: prepare to use regmap provided by syscon
  reset: berlin: drop arch_initcall initialization
  ...
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge tag 'tegra-for-4.2-emc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/drivers</title>
<updated>2015-05-13T15:59:35+00:00</updated>
<author>
<name>Arnd Bergmann</name>
<email>arnd@arndb.de</email>
</author>
<published>2015-05-13T15:59:35+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=44fb3026ad28d2a2b935dc9c47ec2dffadca3f35'/>
<id>44fb3026ad28d2a2b935dc9c47ec2dffadca3f35</id>
<content type='text'>
Merge "ARM: tegra: Add EMC driver for v4.2-rc1" from Thierry Reding:

This introduces the EMC driver that's required to scale the external
memory frequency.

* tag 'tegra-for-4.2-emc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  memory: tegra: Add EMC frequency debugfs entry
  memory: tegra: Add EMC (external memory controller) driver
  memory: tegra: Add API needed by the EMC driver
  of: Add Tegra124 EMC bindings
  of: Document timings subnode of nvidia,tegra-mc
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Merge "ARM: tegra: Add EMC driver for v4.2-rc1" from Thierry Reding:

This introduces the EMC driver that's required to scale the external
memory frequency.

* tag 'tegra-for-4.2-emc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  memory: tegra: Add EMC frequency debugfs entry
  memory: tegra: Add EMC (external memory controller) driver
  memory: tegra: Add API needed by the EMC driver
  of: Add Tegra124 EMC bindings
  of: Document timings subnode of nvidia,tegra-mc
</pre>
</div>
</content>
</entry>
</feed>
