linux-toradex.git/include/uapi/drm, branch v3.17-rc4 Linux kernel for Apalis and Colibri modules drm/radeon: properly document reloc priority mask 2014-08-18T21:09:43+00:00 Christian König christian.koenig@amd.com 2014-08-15T09:52:53+00:00 701e1e789142042144c8cc10b8f6d1554e960144 Instead of hard coding the value properly document that this is an userspace interface. No intended functional change. Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org 
Instead of hard coding the value properly document
that this is an userspace interface.

No intended functional change.

Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
drm/nouveau: expose the full object/event interfaces to userspace 2014-08-09T19:28:18+00:00 Ben Skeggs bskeggs@redhat.com 2014-08-09T18:10:31+00:00 27111a23d01c1dba3180c998629004ab4c9ac985 Signed-off-by: Ben Skeggs <bskeggs@redhat.com> 
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
drm/nouveau: use ioctl interface for abi16 grobj alloc 2014-08-09T19:13:17+00:00 Ben Skeggs bskeggs@redhat.com 2014-08-09T18:10:23+00:00 a4e610b5e655186f81f18f027d2b7a15e010cbef Signed-off-by: Ben Skeggs <bskeggs@redhat.com> 
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Merge tag 'drm/tegra/for-3.17-rc1' of git://anongit.freedesktop.org/tegra/linux into drm-next 2014-08-07T09:53:22+00:00 Dave Airlie airlied@gmail.com 2014-08-07T09:53:22+00:00 fa1d0ee69ca8c123dd791d52830a2e146985ce85 drm/tegra: Changes for v3.17-rc1 Mostly some cleanup all over the place. Pitch alignment limitations of the display controller are now honored and job submission is 64-bit safe. The SOR output (used for eDP) properly configures sync signal polarities according to the display mode rather than hard-coding them to some value and the number of bits per color is now taken from the panel rather than hard-coded to properly support 24-bit vs. 18-bit panels. The DSI controller now properly supports non-continuous clock mode. GEM objects can now have their flags and tiling mode modified via IOCTLs to allow buffers imported from Nouveau to be properly displayed. Newer generations of the Tegra display controller can also detile block linear buffers at scan-out time. Finally the driver now properly exports MODULE_DEVICE_TABLEs to allow it to be automatically loaded when built as a module. * tag 'drm/tegra/for-3.17-rc1' of git://anongit.freedesktop.org/tegra/linux: drm/tegra: add MODULE_DEVICE_TABLEs drm/tegra: dc - Reset controller on driver remove drm/tegra: Properly align stride for framebuffers drm/tegra: sor - Configure proper sync polarities drm/tegra: sor - Use bits-per-color from panel drm/tegra: Make job submission 64-bit safe drm/tegra: Allow non-authenticated processes to create buffer objects drm/tegra: Add SET/GET_FLAGS IOCTLs drm/tegra: Add SET/GET_TILING IOCTLs drm/tegra: Implement more tiling modes drm/tegra: dsi - Handle non-continuous clock flag drm/tegra: sor - missing unlock on error 
drm/tegra: Changes for v3.17-rc1

Mostly some cleanup all over the place. Pitch alignment limitations of
the display controller are now honored and job submission is 64-bit
safe.

The SOR output (used for eDP) properly configures sync signal polarities
according to the display mode rather than hard-coding them to some value
and the number of bits per color is now taken from the panel rather than
hard-coded to properly support 24-bit vs. 18-bit panels.

The DSI controller now properly supports non-continuous clock mode.

GEM objects can now have their flags and tiling mode modified via IOCTLs
to allow buffers imported from Nouveau to be properly displayed. Newer
generations of the Tegra display controller can also detile block linear
buffers at scan-out time.

Finally the driver now properly exports MODULE_DEVICE_TABLEs to allow it
to be automatically loaded when built as a module.

* tag 'drm/tegra/for-3.17-rc1' of git://anongit.freedesktop.org/tegra/linux:
  drm/tegra: add MODULE_DEVICE_TABLEs
  drm/tegra: dc - Reset controller on driver remove
  drm/tegra: Properly align stride for framebuffers
  drm/tegra: sor - Configure proper sync polarities
  drm/tegra: sor - Use bits-per-color from panel
  drm/tegra: Make job submission 64-bit safe
  drm/tegra: Allow non-authenticated processes to create buffer objects
  drm/tegra: Add SET/GET_FLAGS IOCTLs
  drm/tegra: Add SET/GET_TILING IOCTLs
  drm/tegra: Implement more tiling modes
  drm/tegra: dsi - Handle non-continuous clock flag
  drm/tegra: sor - missing unlock on error
drm/radeon: Pass GART page flags to radeon_gart_set_page() explicitly 2014-08-05T12:53:32+00:00 Michel Dänzer michel.daenzer@amd.com 2014-07-17T10:01:07+00:00 77497f2735ad6e29c55475e15e9790dbfa2c2ef8 Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/tegra: Add SET/GET_FLAGS IOCTLs 2014-08-04T08:07:35+00:00 Thierry Reding treding@nvidia.com 2014-06-10T10:04:03+00:00 7b129087874b925901def7ae507f7d9fac406211 The DRM_TEGRA_GEM_SET_FLAGS IOCTL can be used to set the flags of a buffer object after it has been allocated or imported. Flags associated with a buffer object can be queried using the DRM_TEGRA_GEM_GET_FLAGS IOCTL. Reviewed-by: Stéphane Marchesin <marcheu@chromium.org> Tested-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> 
The DRM_TEGRA_GEM_SET_FLAGS IOCTL can be used to set the flags of a
buffer object after it has been allocated or imported. Flags associated
with a buffer object can be queried using the DRM_TEGRA_GEM_GET_FLAGS
IOCTL.

Reviewed-by: Stéphane Marchesin <marcheu@chromium.org>
Tested-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
drm/tegra: Add SET/GET_TILING IOCTLs 2014-08-04T08:07:34+00:00 Thierry Reding treding@nvidia.com 2014-06-03T12:56:57+00:00 7678d71fb4bd6abe6ccb46afe7d90b3ed01ee936 Currently the tiling parameters of buffer objects can only be set at allocation time, and only a single tiled mode is supported. This new DRM_TEGRA_GEM_SET_TILING IOCTL allows more modes to be set and also allows the tiling mode to be changed after the allocation. This will enable the Tegra DRM driver to import buffers from a GPU and directly scan them out by configuring the display controller appropriately. To complement this, the DRM_TEGRA_GEM_GET_TILING IOCTL can query the current tiling mode of a buffer object. This is necessary when importing buffers via handle (as is done in Mesa for example) so that userspace can determine the proper parameters for the 2D or 3D engines. Reviewed-by: Stéphane Marchesin <marcheu@chromium.org> Tested-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> 
Currently the tiling parameters of buffer objects can only be set at
allocation time, and only a single tiled mode is supported. This new
DRM_TEGRA_GEM_SET_TILING IOCTL allows more modes to be set and also
allows the tiling mode to be changed after the allocation. This will
enable the Tegra DRM driver to import buffers from a GPU and directly
scan them out by configuring the display controller appropriately.

To complement this, the DRM_TEGRA_GEM_GET_TILING IOCTL can query the
current tiling mode of a buffer object. This is necessary when importing
buffers via handle (as is done in Mesa for example) so that userspace
can determine the proper parameters for the 2D or 3D engines.

Reviewed-by: Stéphane Marchesin <marcheu@chromium.org>
Tested-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Merge remote-tracking branch 'airlied/drm-next' into drm-intel-next 2014-07-29T18:49:36+00:00 Daniel Vetter daniel.vetter@ffwll.ch 2014-07-29T18:49:36+00:00 4dac3edfe68e5e1b3c2216b84ba160572420fa40 Pull in drm-next with Dave's DP MST support so that I can merge some conflicting patches which also touch the driver load sequencing around interrupt handling. Conflicts: drivers/gpu/drm/i915/intel_display.c drivers/gpu/drm/i915/intel_dp.c Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> 
Pull in drm-next with Dave's DP MST support so that I can merge some
conflicting patches which also touch the driver load sequencing around
interrupt handling.

Conflicts:
	drivers/gpu/drm/i915/intel_display.c
	drivers/gpu/drm/i915/intel_dp.c

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drm/crtc: Add property for aspect ratio 2014-07-23T05:05:24+00:00 Vandana Kannan vandana.kannan@intel.com 2014-06-11T05:16:48+00:00 ff587e45a1a1690f5cd713a2782672c579460365 Added a property to enable user space to set aspect ratio. This patch contains declaration of the property and code to create the property. v2: Thierry's review comments. - Made aspect ratio enum generic instead of HDMI/CEA specfic - Removed usage of temporary aspect_ratio variable v3: Thierry's review comments. - Fixed indentation v4: Thierry's review comments. - Return ENOMEM when property creation fails Signed-off-by: Vandana Kannan <vandana.kannan@intel.com> Cc: Thierry Reding <thierry.reding@gmail.com> Reviewed-by: Thierry Reding <treding@nvidia.com> Acked-by: Dave Airlie <airlied@gmail.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> 
Added a property to enable user space to set aspect ratio.
This patch contains declaration of the property and code to create the
property.

v2: Thierry's review comments.
	- Made aspect ratio enum generic instead of HDMI/CEA specfic
	- Removed usage of temporary aspect_ratio variable

v3: Thierry's review comments.
	- Fixed indentation

v4: Thierry's review comments.
	- Return ENOMEM when property creation fails

Signed-off-by: Vandana Kannan <vandana.kannan@intel.com>
Cc: Thierry Reding <thierry.reding@gmail.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
Acked-by: Dave Airlie <airlied@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drm: Driver-specific ioctls range from 0x40 to 0x9f 2014-06-18T11:50:16+00:00 Damien Lespiau damien.lespiau@intel.com 2014-06-09T13:39:50+00:00 735b9ffada0563afa52d0879cf6d630819ee68ad DRM_COMMAND_END is 0xa0, so the last driver ioctl is 0x9f, not 0x99. Signed-off-by: Damien Lespiau <damien.lespiau@intel.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> 
DRM_COMMAND_END is 0xa0, so the last driver ioctl is 0x9f, not 0x99.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>