<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-toradex.git/include/uapi/misc, branch v5.19-rc4</title>
<subtitle>Linux kernel for Apalis and Colibri modules</subtitle>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/'/>
<entry>
<title>habanalabs: add support for notification via eventfd</title>
<updated>2022-05-22T19:01:20+00:00</updated>
<author>
<name>Tal Cohen</name>
<email>talcohen@habana.ai</email>
</author>
<published>2022-04-28T10:45:18+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=422ef171038d4855ffe938137039a8f3b3e84293'/>
<id>422ef171038d4855ffe938137039a8f3b3e84293</id>
<content type='text'>
The driver will be able to send notification events towards
a user process, using user's registered event file descriptor.
The driver uses the notification mechanism to inform the
user about an occurred event.
A user thread can wait until a notification is received from
the driver.

The driver stores the occurred event until the user reads it,
using HL_INFO_GET_EVENTS - new ioctl opcode in the INFO ioctl.

Gaudi specific implementation includes sending a notification
on a TPC assertion event that is received from f/w.

Signed-off-by: Tal Cohen &lt;talcohen@habana.ai&gt;
Reviewed-by: Oded Gabbay &lt;ogabbay@kernel.org&gt;
Signed-off-by: Oded Gabbay &lt;ogabbay@kernel.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The driver will be able to send notification events towards
a user process, using user's registered event file descriptor.
The driver uses the notification mechanism to inform the
user about an occurred event.
A user thread can wait until a notification is received from
the driver.

The driver stores the occurred event until the user reads it,
using HL_INFO_GET_EVENTS - new ioctl opcode in the INFO ioctl.

Gaudi specific implementation includes sending a notification
on a TPC assertion event that is received from f/w.

Signed-off-by: Tal Cohen &lt;talcohen@habana.ai&gt;
Reviewed-by: Oded Gabbay &lt;ogabbay@kernel.org&gt;
Signed-off-by: Oded Gabbay &lt;ogabbay@kernel.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>habanalabs: add prefetch flag to the MAP operation</title>
<updated>2022-05-22T19:01:18+00:00</updated>
<author>
<name>Ohad Sharabi</name>
<email>osharabi@habana.ai</email>
</author>
<published>2022-04-10T08:19:42+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=5d1a0de2c778f369970dd50f6713e95068926a8b'/>
<id>5d1a0de2c778f369970dd50f6713e95068926a8b</id>
<content type='text'>
This patch let the user decide whether the translations done in the
page tables will be fetched directly to the STLB right after the map.

We want to let the user control whether to perform prefetch upon map
operation.

To do so a memory flag was added, to be used in the MAP ioctl, called
HL_MEM_PREFETCH and if set- the mappings will be fetched directly to
the STLB after map operation.

Signed-off-by: Ohad Sharabi &lt;osharabi@habana.ai&gt;
Reviewed-by: Oded Gabbay &lt;ogabbay@kernel.org&gt;
Signed-off-by: Oded Gabbay &lt;ogabbay@kernel.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This patch let the user decide whether the translations done in the
page tables will be fetched directly to the STLB right after the map.

We want to let the user control whether to perform prefetch upon map
operation.

To do so a memory flag was added, to be used in the MAP ioctl, called
HL_MEM_PREFETCH and if set- the mappings will be fetched directly to
the STLB after map operation.

Signed-off-by: Ohad Sharabi &lt;osharabi@habana.ai&gt;
Reviewed-by: Oded Gabbay &lt;ogabbay@kernel.org&gt;
Signed-off-by: Oded Gabbay &lt;ogabbay@kernel.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>habanalabs: expose compute ctx status through info ioctl</title>
<updated>2022-05-22T18:57:34+00:00</updated>
<author>
<name>Ofir Bitton</name>
<email>obitton@habana.ai</email>
</author>
<published>2022-03-03T07:43:10+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=fdec56c1a416c6947b1db22617da15cb89f46c6c'/>
<id>fdec56c1a416c6947b1db22617da15cb89f46c6c</id>
<content type='text'>
In order for the user to know if he can try and open device, we
expose the compute ctx state. The user can now know if the context
is used by another process or whether the device is still ongoing
through cleanup or reset and will be available soon.

Signed-off-by: Ofir Bitton &lt;obitton@habana.ai&gt;
Reviewed-by: Oded Gabbay &lt;ogabbay@kernel.org&gt;
Signed-off-by: Oded Gabbay &lt;ogabbay@kernel.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
In order for the user to know if he can try and open device, we
expose the compute ctx state. The user can now know if the context
is used by another process or whether the device is still ongoing
through cleanup or reset and will be available soon.

Signed-off-by: Ofir Bitton &lt;obitton@habana.ai&gt;
Reviewed-by: Oded Gabbay &lt;ogabbay@kernel.org&gt;
Signed-off-by: Oded Gabbay &lt;ogabbay@kernel.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>habanalabs: add user API to get valid DRAM page sizes</title>
<updated>2022-05-22T18:57:34+00:00</updated>
<author>
<name>Ohad Sharabi</name>
<email>osharabi@habana.ai</email>
</author>
<published>2022-02-23T11:37:08+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=050a6f349a09d3cefb14f4114bfa047b2c5b2a65'/>
<id>050a6f349a09d3cefb14f4114bfa047b2c5b2a65</id>
<content type='text'>
Future devices will support multiple device memory page sizes.
In addition, an API for the user was added for it to be able to control
the device memory allocation page size.

This patch is a complementary patch to inform the user of the available
page size supported by the device.

Signed-off-by: Ohad Sharabi &lt;osharabi@habana.ai&gt;
Reviewed-by: Oded Gabbay &lt;ogabbay@kernel.org&gt;
Signed-off-by: Oded Gabbay &lt;ogabbay@kernel.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Future devices will support multiple device memory page sizes.
In addition, an API for the user was added for it to be able to control
the device memory allocation page size.

This patch is a complementary patch to inform the user of the available
page size supported by the device.

Signed-off-by: Ohad Sharabi &lt;osharabi@habana.ai&gt;
Reviewed-by: Oded Gabbay &lt;ogabbay@kernel.org&gt;
Signed-off-by: Oded Gabbay &lt;ogabbay@kernel.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>habanalabs: add DRAM default page size to HW info</title>
<updated>2022-05-22T18:57:33+00:00</updated>
<author>
<name>Ohad Sharabi</name>
<email>osharabi@habana.ai</email>
</author>
<published>2022-02-23T09:47:05+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=1359fcbe0f4aa2cd6ea684727a5a111eebeeed3a'/>
<id>1359fcbe0f4aa2cd6ea684727a5a111eebeeed3a</id>
<content type='text'>
When using the device memory allocation API the user ought to know what
is the default allocation page size.

Signed-off-by: Ohad Sharabi &lt;osharabi@habana.ai&gt;
Reviewed-by: Oded Gabbay &lt;ogabbay@kernel.org&gt;
Signed-off-by: Oded Gabbay &lt;ogabbay@kernel.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
When using the device memory allocation API the user ought to know what
is the default allocation page size.

Signed-off-by: Ohad Sharabi &lt;osharabi@habana.ai&gt;
Reviewed-by: Oded Gabbay &lt;ogabbay@kernel.org&gt;
Signed-off-by: Oded Gabbay &lt;ogabbay@kernel.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>misc: fastrpc: Add support to secure memory map</title>
<updated>2022-03-18T13:11:00+00:00</updated>
<author>
<name>Vamsi Krishna Gattupalli</name>
<email>quic_vgattupa@quicinc.com</email>
</author>
<published>2022-02-14T16:09:58+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=e90d911906196bf987492c94e38f10ca611dfd7b'/>
<id>e90d911906196bf987492c94e38f10ca611dfd7b</id>
<content type='text'>
This patch adds support to secure memory allocations for DSP.
It repurposes the reserved field in struct fastrpc_invoke_args
to add attributes to invoke request, for example to setup a secure memory
map for dsp. Secure memory is assigned to DSP Virtual Machine IDs using
Qualcomm SCM calls.

Signed-off-by: Vamsi Krishna Gattupalli &lt;quic_vgattupa@quicinc.com&gt;
Signed-off-by: Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;
Link: https://lore.kernel.org/r/20220214161002.6831-9-srinivas.kandagatla@linaro.org
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This patch adds support to secure memory allocations for DSP.
It repurposes the reserved field in struct fastrpc_invoke_args
to add attributes to invoke request, for example to setup a secure memory
map for dsp. Secure memory is assigned to DSP Virtual Machine IDs using
Qualcomm SCM calls.

Signed-off-by: Vamsi Krishna Gattupalli &lt;quic_vgattupa@quicinc.com&gt;
Signed-off-by: Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;
Link: https://lore.kernel.org/r/20220214161002.6831-9-srinivas.kandagatla@linaro.org
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>misc: fastrpc: check before loading process to the DSP</title>
<updated>2022-03-18T13:11:00+00:00</updated>
<author>
<name>Jeya R</name>
<email>jeyr@codeaurora.org</email>
</author>
<published>2022-02-14T16:09:56+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=7f1f481263c3ce5387d4fd5ad63ddaa8a295aab2'/>
<id>7f1f481263c3ce5387d4fd5ad63ddaa8a295aab2</id>
<content type='text'>
Reject session if DSP domain is secure, device node is non-secure and signed
PD is requested. Secure device node can access DSP without any restriction.

Unsigned PD offload is only allowed for the DSP domain that can support
unsigned offloading.

Signed-off-by: Jeya R &lt;jeyr@codeaurora.org&gt;
Signed-off-by: Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;
Link: https://lore.kernel.org/r/20220214161002.6831-7-srinivas.kandagatla@linaro.org
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Reject session if DSP domain is secure, device node is non-secure and signed
PD is requested. Secure device node can access DSP without any restriction.

Unsigned PD offload is only allowed for the DSP domain that can support
unsigned offloading.

Signed-off-by: Jeya R &lt;jeyr@codeaurora.org&gt;
Signed-off-by: Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;
Link: https://lore.kernel.org/r/20220214161002.6831-7-srinivas.kandagatla@linaro.org
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>misc: fastrpc: Add support to get DSP capabilities</title>
<updated>2022-03-18T13:11:00+00:00</updated>
<author>
<name>Jeya R</name>
<email>jeyr@codeaurora.org</email>
</author>
<published>2022-02-14T16:09:53+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=6c16fd8bdd4058d4a6aaca9d5a7b40e4cb281d5a'/>
<id>6c16fd8bdd4058d4a6aaca9d5a7b40e4cb281d5a</id>
<content type='text'>
Add support to get DSP capabilities. The capability information is cached
on driver.

Signed-off-by: Jeya R &lt;jeyr@codeaurora.org&gt;
Signed-off-by: Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;
Link: https://lore.kernel.org/r/20220214161002.6831-4-srinivas.kandagatla@linaro.org
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add support to get DSP capabilities. The capability information is cached
on driver.

Signed-off-by: Jeya R &lt;jeyr@codeaurora.org&gt;
Signed-off-by: Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;
Link: https://lore.kernel.org/r/20220214161002.6831-4-srinivas.kandagatla@linaro.org
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>misc: fastrpc: add support for FASTRPC_IOCTL_MEM_MAP/UNMAP</title>
<updated>2022-03-18T13:11:00+00:00</updated>
<author>
<name>Jeya R</name>
<email>jeyr@codeaurora.org</email>
</author>
<published>2022-02-14T16:09:52+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=5c1b97c7d7b736e6439af4f43a65837bc72f56c1'/>
<id>5c1b97c7d7b736e6439af4f43a65837bc72f56c1</id>
<content type='text'>
Add support for IOCTL requests to map and unmap on DSP based on map
flags.

Signed-off-by: Jeya R &lt;jeyr@codeaurora.org&gt;
Signed-off-by: Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;
Link: https://lore.kernel.org/r/20220214161002.6831-3-srinivas.kandagatla@linaro.org
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add support for IOCTL requests to map and unmap on DSP based on map
flags.

Signed-off-by: Jeya R &lt;jeyr@codeaurora.org&gt;
Signed-off-by: Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;
Link: https://lore.kernel.org/r/20220214161002.6831-3-srinivas.kandagatla@linaro.org
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>habanalabs: allow user to set allocation page size</title>
<updated>2022-02-28T12:22:05+00:00</updated>
<author>
<name>Ohad Sharabi</name>
<email>osharabi@habana.ai</email>
</author>
<published>2022-02-14T13:22:00+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=f23f280277d5a701de99c6652623b6bf8801c534'/>
<id>f23f280277d5a701de99c6652623b6bf8801c534</id>
<content type='text'>
In future ASICs the MMU will be able to work with multiple page sizes,
thus a new flag is added to allow the user to set the requested page
size.

This flag is added since the whole DRAM is allocated for the user and
the user also should be familiar with the memory usage use case.

As such, the user may choose to "over allocate" memory in favor of
performance (for instance- large page allocations covers more memory
in less TLB entries).

For example: say available page sizes are of 1MB and 32MB. If user
wants to allocate 40MB the user can either set page size to 1MB and
allocate the exact amount of memory (but will result in 40 TLB entries)
or the user can use 32MB pages, "waste" 8MB of physical memory but
occupy only 2 TLB entries.

Note that this feature will be available only to ASIC that supports
multiple DRAM page sizes.

Signed-off-by: Ohad Sharabi &lt;osharabi@habana.ai&gt;
Reviewed-by: Oded Gabbay &lt;ogabbay@kernel.org&gt;
Signed-off-by: Oded Gabbay &lt;ogabbay@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
In future ASICs the MMU will be able to work with multiple page sizes,
thus a new flag is added to allow the user to set the requested page
size.

This flag is added since the whole DRAM is allocated for the user and
the user also should be familiar with the memory usage use case.

As such, the user may choose to "over allocate" memory in favor of
performance (for instance- large page allocations covers more memory
in less TLB entries).

For example: say available page sizes are of 1MB and 32MB. If user
wants to allocate 40MB the user can either set page size to 1MB and
allocate the exact amount of memory (but will result in 40 TLB entries)
or the user can use 32MB pages, "waste" 8MB of physical memory but
occupy only 2 TLB entries.

Note that this feature will be available only to ASIC that supports
multiple DRAM page sizes.

Signed-off-by: Ohad Sharabi &lt;osharabi@habana.ai&gt;
Reviewed-by: Oded Gabbay &lt;ogabbay@kernel.org&gt;
Signed-off-by: Oded Gabbay &lt;ogabbay@kernel.org&gt;
</pre>
</div>
</content>
</entry>
</feed>
