linux-toradex.git/tools/perf/arch/powerpc/annotate, branch master

perf disasm: Don't include C files from the arch directory

2026-01-23T19:58:38+00:00

Move the arch instructions.c files into appropriately named files in
annotate-arch in the util directory.

Don't #include to compile the code, switch to building the files and fix
up the #includes accordingly.

Move powerpc specific disasm code out of disasm.c and into
annotate-powerpc.c.

Declarations and static removed as appropriate for the code to compile
as separate compilation units.

The e_machine and e_flags set up is moved to the disasm.c architectures
array so that later patches can sort by them.

Reviewed-by: James Clark 
Signed-off-by: Ian Rogers 
Cc: Aditya Bodkhe 
Cc: Adrian Hunter 
Cc: Albert Ou 
Cc: Alexander Shishkin 
Cc: Alexandre Ghiti 
Cc: Athira Rajeev 
Cc: Bill Wendling 
Cc: Dr. David Alan Gilbert 
Cc: Guo Ren 
Cc: Howard Chu 
Cc: Ingo Molnar 
Cc: Jiri Olsa 
Cc: John Garry 
Cc: Julia Lawall 
Cc: Justin Stitt 
Cc: Krzysztof Łopatowski 
Cc: Leo Yan 
Cc: Namhyung Kim 
Cc: Nathan Chancellor 
Cc: Nick Desaulniers 
Cc: Palmer Dabbelt 
Cc: Paul Walmsley 
Cc: Peter Zijlstra 
Cc: Sergei Trofimovich 
Cc: Shimin Guo 
Cc: Suchit Karunakaran 
Cc: Thomas Falcon 
Cc: Tianyou Li 
Cc: Will Deacon 
Cc: Zecheng Li 
Signed-off-by: Arnaldo Carvalho de Melo

perf disasm: Constify use of 'struct ins_op'

2026-01-23T19:58:38+00:00

The 'struct ins_op' holds variables to function pointers that are read
but not written. Change uses to be for a "const struct ins_op *"
version to capture this immutability.

Reviewed-by: James Clark 
Signed-off-by: Ian Rogers 
Cc: Aditya Bodkhe 
Cc: Adrian Hunter 
Cc: Albert Ou 
Cc: Alexander Shishkin 
Cc: Alexandre Ghiti 
Cc: Athira Rajeev 
Cc: Bill Wendling 
Cc: Dr. David Alan Gilbert 
Cc: Guo Ren 
Cc: Howard Chu 
Cc: Ingo Molnar 
Cc: Jiri Olsa 
Cc: John Garry 
Cc: Julia Lawall 
Cc: Justin Stitt 
Cc: Krzysztof Łopatowski 
Cc: Leo Yan 
Cc: Namhyung Kim 
Cc: Nathan Chancellor 
Cc: Nick Desaulniers 
Cc: Palmer Dabbelt 
Cc: Paul Walmsley 
Cc: Peter Zijlstra 
Cc: Sergei Trofimovich 
Cc: Shimin Guo 
Cc: Suchit Karunakaran 
Cc: Thomas Falcon 
Cc: Tianyou Li 
Cc: Will Deacon 
Cc: Zecheng Li 
Signed-off-by: Arnaldo Carvalho de Melo

perf disasm: Add e_machine/e_flags to struct arch

2024-11-09T16:39:13+00:00

Currently functions like get_dwarf_regnum only work with the host
architecture. Carry the elf machine and flags in struct arch so that
in disassembly these can be used to allow cross platform disassembly.

Reviewed-by: Masami Hiramatsu (Google) 
Signed-off-by: Ian Rogers 
Cc: Anup Patel 
Cc: Yang Jihong 
Cc: Palmer Dabbelt 
Cc: David S. Miller 
Cc: Albert Ou 
Cc: Shenlin Liang 
Cc: Nick Terrell 
Cc: Guilherme Amadio 
Cc: Steinar H. Gunderson 
Cc: Changbin Du 
Cc: Alexander Lobakin 
Cc: Przemek Kitszel 
Cc: Huacai Chen 
Cc: Guo Ren 
Cc: Masahiro Yamada 
Cc: Will Deacon 
Cc: James Clark 
Cc: Mike Leach 
Cc: Chen Pei 
Cc: Leo Yan 
Cc: Oliver Upton 
Cc: Aditya Gupta 
Cc: Kajol Jain 
Cc: Athira Rajeev 
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-riscv@lists.infradead.org
Cc: Bibo Mao 
Cc: John Garry 
Cc: Atish Patra 
Cc: Dima Kogan 
Cc: Paul Walmsley 
Cc: Dr. David Alan Gilbert 
Cc: linux-csky@vger.kernel.org
Link: https://lore.kernel.org/r/20241108234606.429459-5-irogers@google.com
Signed-off-by: Namhyung Kim

perf build: Rename HAVE_DWARF_SUPPORT to HAVE_LIBDW_SUPPORT

2024-10-18T17:17:40+00:00

In Makefile.config for unwinding the name dwarf implies either
libunwind or libdw. Make it clearer that HAVE_DWARF_SUPPORT is really
just defined when libdw is present by renaming to HAVE_LIBDW_SUPPORT.

Signed-off-by: Ian Rogers 
Acked-by: Namhyung Kim 
Tested-by: Leo Yan 
Cc: Anup Patel 
Cc: Yang Jihong 
Cc: Palmer Dabbelt 
Cc: David S. Miller 
Cc: Albert Ou 
Cc: Shenlin Liang 
Cc: Nick Terrell 
Cc: Guilherme Amadio 
Cc: Steinar H. Gunderson 
Cc: Changbin Du 
Cc: Alexander Lobakin 
Cc: Przemek Kitszel 
Cc: Huacai Chen 
Cc: Guo Ren 
Cc: Masahiro Yamada 
Cc: Masami Hiramatsu (Google) 
Cc: Will Deacon 
Cc: James Clark 
Cc: Mike Leach 
Cc: Chen Pei 
Cc: Leo Yan 
Cc: Oliver Upton 
Cc: Aditya Gupta 
Cc: Kajol Jain 
Cc: Athira Rajeev 
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-riscv@lists.infradead.org
Cc: Bibo Mao 
Cc: John Garry 
Cc: Atish Patra 
Cc: Dima Kogan 
Cc: Paul Walmsley 
Cc: Dr. David Alan Gilbert 
Cc: linux-csky@vger.kernel.org
Link: https://lore.kernel.org/r/20241017001354.56973-11-irogers@google.com
Signed-off-by: Namhyung Kim

perf annotate: Set instruction name to be used with insn-stat when using raw instruction

2024-07-31T19:12:59+00:00

Since the "ins.name" is not set while using raw instruction,
'perf annotate' with insn-stat gives wrong data:

Result from "./perf annotate --data-type --insn-stat":

  Annotate Instruction stats
  total 615, ok 419 (68.1%), bad 196 (31.9%)

    Name      :  Good   Bad
    -----------------------------------------------------------
              :   419   196

This patch sets "dl->ins.name" in arch specific function
"check_ppc_insn" while initialising "struct disasm_line".

Also update "ins_find" function to pass "struct disasm_line" as a
parameter so as to set its name field in arch specific call.

With the patch changes:

  Annotate Instruction stats
  total 609, ok 446 (73.2%), bad 163 (26.8%)

  Name/opcode         :  Good   Bad
  -----------------------------------------------------------
  58                  :   323    80
  32                  :    49    43
  34                  :    33    11
  OP_31_XOP_LDX       :     8    20
  40                  :    23     0
  OP_31_XOP_LWARX     :     5     1
  OP_31_XOP_LWZX      :     2     3
  OP_31_XOP_LDARX     :     3     0
  33                  :     0     2
  OP_31_XOP_LBZX      :     0     1
  OP_31_XOP_LWAX      :     0     1
  OP_31_XOP_LHZX      :     0     1

Reviewed-by: Kajol Jain 
Reviewed-by: Namhyung Kim 
Signed-off-by: Athira Rajeev 
Tested-by: Kajol Jain 
Cc: Adrian Hunter 
Cc: Akanksha J N 
Cc: Christophe Leroy 
Cc: Disha Goel 
Cc: Hari Bathini 
Cc: Ian Rogers 
Cc: Jiri Olsa 
Cc: Madhavan Srinivasan 
Cc: Segher Boessenkool 
Link: https://lore.kernel.org/lkml/20240718084358.72242-16-atrajeev@linux.vnet.ibm.com
Signed-off-by: Arnaldo Carvalho de Melo

perf annotate: Update instruction tracking for powerpc

2024-07-31T19:12:59+00:00

Add instruction tracking function "update_insn_state_powerpc" for
powerpc. Example sequence in powerpc:

  ld      r10,264(r3)
  mr      r31,r3
  <
  ld      r9,312(r31)

Consider ithe sample is pointing to: "ld r9,312(r31)".

Here the memory reference is hit at "312(r31)" where 312 is the offset
and r31 is the source register.

Previous instruction sequence shows that register state of r3 is moved
to r31.

So to identify the data type for r31 access, the previous instruction
("mr") needs to be tracked and the state type entry has to be updated.

Current instruction tracking support in perf tools infrastructure is
specific to x86. Patch adds this support for powerpc as well.

Reviewed-by: Kajol Jain 
Reviewed-by: Namhyung Kim 
Signed-off-by: Athira Rajeev 
Tested-by: Kajol Jain 
Cc: Adrian Hunter 
Cc: Akanksha J N 
Cc: Christophe Leroy 
Cc: Disha Goel 
Cc: Hari Bathini 
Cc: Ian Rogers 
Cc: Jiri Olsa 
Cc: Madhavan Srinivasan 
Cc: Segher Boessenkool 
Link: https://lore.kernel.org/lkml/20240718084358.72242-12-atrajeev@linux.vnet.ibm.com
Signed-off-by: Arnaldo Carvalho de Melo

perf annotate: Add more instructions for instruction tracking

2024-07-31T19:12:59+00:00

Add few more instructions and use opcode as search key
to find if it is supported by the architecture.

The added ones are: addi, addic, addic., addis, subfic and mulli

Reviewed-by: Kajol Jain 
Reviewed-by: Namhyung Kim 
Signed-off-by: Athira Rajeev 
Tested-by: Kajol Jain 
Cc: Adrian Hunter 
Cc: Akanksha J N 
Cc: Christophe Leroy 
Cc: Disha Goel 
Cc: Hari Bathini 
Cc: Ian Rogers 
Cc: Jiri Olsa 
Cc: Madhavan Srinivasan 
Cc: Segher Boessenkool 
Link: https://lore.kernel.org/lkml/20240718084358.72242-11-atrajeev@linux.vnet.ibm.com
Signed-off-by: Arnaldo Carvalho de Melo

perf annotate: Add some of the arithmetic instructions to support instruction tracking in powerpc

2024-07-31T19:12:59+00:00

Data-type profiling has the concept of instruction tracking.

Example sequence in powerpc:

	ld      r10,264(r3)
	mr      r31,r3
	<
	ld      r9,312(r31)

or differently

	lwz	r10,264(r3)
	add	r31, r3, RB
	lwz	r9, 0(r31)

If a sample is hit at "lwz r9, 0(r31)", data type of r31 depends
on previous instruction sequence here. So to track the previous
instructions, patch adds changes to identify some of the arithmetic
instructions which are having opcode as 31.

Since memory instructions also has cases with opcode 31, use the bits
22:30 to filter the arithmetic instructions here.

Also there are instructions with just two operands like "addme", "addze".

This patch adds new instructions ops "arithmetic_ops" to handle this

Reviewed-by: Kajol Jain 
Reviewed-by: Namhyung Kim 
Signed-off-by: Athira Rajeev 
Tested-by: Kajol Jain 
Cc: Adrian Hunter 
Cc: Akanksha J N 
Cc: Christophe Leroy 
Cc: Disha Goel 
Cc: Hari Bathini 
Cc: Ian Rogers 
Cc: Jiri Olsa 
Cc: Madhavan Srinivasan 
Cc: Segher Boessenkool 
Link: https://lore.kernel.org/lkml/20240718084358.72242-10-atrajeev@linux.vnet.ibm.com
Signed-off-by: Arnaldo Carvalho de Melo

perf annotate: Add support to identify memory instructions of opcode 31 in powerpc

2024-07-31T19:12:59+00:00

There are memory instructions in powerpc with opcode as 31.
Example: "ldx RT,RA,RB" , Its X form is as below:

  ______________________________________
  | 31 |  RT  |  RA |  RB |   21     |/|
  --------------------------------------
  0    6     11    16    21         30 31

The opcode for "ldx" is 31. There are other instructions also with
opcode 31 which are memory insn like ldux, stbx, lwzx, lhaux
But all instructions with opcode 31 are not memory. Example is add
instruction: "add RT,RA,RB"

The value in bit 21-30 [ 21 for ldx ] is different for these
instructions. Patch uses this value to assign instruction ops for these
cases. The naming convention and value to identify these are picked from
defines in "arch/powerpc/include/asm/ppc-opcode.h"

Reviewed-by: Kajol Jain 
Reviewed-by: Namhyung Kim 
Signed-off-by: Athira Rajeev 
Tested-by: Kajol Jain 
Cc: Adrian Hunter 
Cc: Akanksha J N 
Cc: Christophe Leroy 
Cc: Disha Goel 
Cc: Hari Bathini 
Cc: Ian Rogers 
Cc: Jiri Olsa 
Cc: Madhavan Srinivasan 
Cc: Segher Boessenkool 
Link: https://lore.kernel.org/lkml/20240718084358.72242-9-atrajeev@linux.vnet.ibm.com
Signed-off-by: Arnaldo Carvalho de Melo

perf annotate: Add parse function for memory instructions in powerpc

2024-07-31T19:12:59+00:00

Use the raw instruction code and macros to identify memory instructions,
extract register fields and also offset.

The implementation addresses the D-form, X-form, DS-form instructions.
Two main functions are added.

New parse function "load_store__parse" as instruction ops parser for
memory instructions.

Unlike other parsers (like mov__parse), this one fills in the
"multi_regs" field for source/target and new added "mem_ref" field. No
other fields are set because, here there is no need to parse the
disassembled code and arch specific macros will take care of extracting
offset and regs which is easier and will be precise.

In powerpc, all instructions with a primary opcode from 32 to 63
are memory instructions. Update "ins__find" function to have "raw_insn"
also as a parameter.

Reviewed-by: Kajol Jain 
Reviewed-by: Namhyung Kim 
Signed-off-by: Athira Rajeev 
Tested-by: Kajol Jain 
Cc: Adrian Hunter 
Cc: Akanksha J N 
Cc: Christophe Leroy 
Cc: Disha Goel 
Cc: Hari Bathini 
Cc: Ian Rogers 
Cc: Jiri Olsa 
Cc: Madhavan Srinivasan 
Cc: Segher Boessenkool 
Link: https://lore.kernel.org/lkml/20240718084358.72242-8-atrajeev@linux.vnet.ibm.com
Signed-off-by: Arnaldo Carvalho de Melo