linux-toradex.git/tools/testing/selftests/kvm/arm64, branch master Linux kernel for Apalis and Colibri modules KVM: arm64: selftests: Test empty SMCCC filter range at base 0 2026-09-15T22:09:57+00:00 Karl Mehltretter kmehltretter@gmail.com 2026-08-29T05:48:56+00:00 0a46eb5719fa57cc9d06025dcd8ba271643dee61 test_invalid_nr_functions() only checks an empty range at PSCI_0_2_FN64_CPU_ON, which KVM's end < start check happens to catch. It never exercised base 0, where the inclusive end wraps to U32_MAX instead. Add the base 0 case. Without the preceding fix it fails with EEXIST. Assisted-by: LLM Signed-off-by: Karl Mehltretter <kmehltretter@gmail.com> Reviewed-by: Steffen Eiden <seiden@linux.ibm.com> Reviewed-by: Fuad Tabba <fuad.tabba@linux.dev> Tested-by: Fuad Tabba <fuad.tabba@linux.dev> Link: https://patch.msgid.link/20260829054856.70549-3-kmehltretter@gmail.com Signed-off-by: Oliver Upton <oupton@kernel.org> 
test_invalid_nr_functions() only checks an empty range at
PSCI_0_2_FN64_CPU_ON, which KVM's end < start check happens to catch.
It never exercised base 0, where the inclusive end wraps to U32_MAX
instead.

Add the base 0 case. Without the preceding fix it fails with EEXIST.

Assisted-by: LLM
Signed-off-by: Karl Mehltretter <kmehltretter@gmail.com>
Reviewed-by: Steffen Eiden <seiden@linux.ibm.com>
Reviewed-by: Fuad Tabba <fuad.tabba@linux.dev>
Tested-by: Fuad Tabba <fuad.tabba@linux.dev>
Link: https://patch.msgid.link/20260829054856.70549-3-kmehltretter@gmail.com
Signed-off-by: Oliver Upton <oupton@kernel.org>
KVM: arm64: selftests: Add ITS table save tests 2026-09-15T22:09:56+00:00 Fuad Tabba fuad.tabba@linux.dev 2026-08-21T06:44:45+00:00 6f182db39fb00548c26d689163ceb2fe4a802793 Cover the two ways a guest can leave a table that KVM_DEV_ARM_ITS_SAVE_TABLES has to cope with: a GITS_BASER<coll> write that changes the table, which drops the collections it described, and a device whose L2 block the guest invalidated, which the save skips. Each case then resets and restores, which is what the save exists for. Both fail without the preceding patches. The first save returns -EINVAL, and the second saves a DTE pointing 8192 entries ahead, at an entry the save never wrote. Assisted-by: Antigravity:gemini-3.1-pro Signed-off-by: Fuad Tabba <fuad.tabba@linux.dev> Reviewed-by: Marc Zyngier <maz@kernel.org> Link: https://patch.msgid.link/20260821064445.615838-5-fuad.tabba@linux.dev Signed-off-by: Oliver Upton <oupton@kernel.org> 
Cover the two ways a guest can leave a table that
KVM_DEV_ARM_ITS_SAVE_TABLES has to cope with: a GITS_BASER<coll> write
that changes the table, which drops the collections it described, and a
device whose L2 block the guest invalidated, which the save skips. Each
case then resets and restores, which is what the save exists for.

Both fail without the preceding patches. The first save returns -EINVAL,
and the second saves a DTE pointing 8192 entries ahead, at an entry the
save never wrote.

Assisted-by: Antigravity:gemini-3.1-pro
Signed-off-by: Fuad Tabba <fuad.tabba@linux.dev>
Reviewed-by: Marc Zyngier <maz@kernel.org>
Link: https://patch.msgid.link/20260821064445.615838-5-fuad.tabba@linux.dev
Signed-off-by: Oliver Upton <oupton@kernel.org>
Merge tag 'kvmarm-7.3' of https://git.kernel.org/pub/scm/linux/kernel/git/kvmarm/kvmarm into HEAD 2026-08-24T16:42:07+00:00 Paolo Bonzini pbonzini@redhat.com 2026-08-24T16:42:07+00:00 76671054f9a1ff6abb976583cd8da37650acdc97 KVM/arm64 changes for 7.3 - Add support for 'slot' based PMU events, paired with new UAPI that compels the user to select a specific PMU implementation - Lazy save/restore of vCPU state for pKVM, along with various fixes and cleanups to the management of vCPU state between the untrusted host and pKVM hypervisor - Disable traps of EL1 registers for nested hypervisors when FEAT_NV2p1 is present, guaranteeing that EL2-specific register bits are stateful in the EL1 counterpart - Leverage FEAT_NV3 to avoid unnecessary ERET/TLBI traps when the scope of those instructions remains 'in host' (i.e. L1 kernel/userspace) - Pile of fixes for the management of the VNCR pseudo-TLB, such as under-invalidations and races with concurrent TLBIs on other vCPUs - Consolidate the non-protected and pKVM view of ICH_VTR_EL2 to a runtime-patched constant, allowing the same data to be shared with pKVM prior to dropping host privileges - Considerable pile of LLM-assisted fixes around the shop but mostly in the VGIC, our in-kernel generator of bugs (and sometimes interrupts) 
KVM/arm64 changes for 7.3

 - Add support for 'slot' based PMU events, paired with new UAPI that
   compels the user to select a specific PMU implementation

 - Lazy save/restore of vCPU state for pKVM, along with various fixes
   and cleanups to the management of vCPU state between the untrusted
   host and pKVM hypervisor

 - Disable traps of EL1 registers for nested hypervisors when FEAT_NV2p1
   is present, guaranteeing that EL2-specific register bits are stateful
   in the EL1 counterpart

 - Leverage FEAT_NV3 to avoid unnecessary ERET/TLBI traps when the scope
   of those instructions remains 'in host' (i.e. L1 kernel/userspace)

 - Pile of fixes for the management of the VNCR pseudo-TLB, such as
   under-invalidations and races with concurrent TLBIs on other vCPUs

 - Consolidate the non-protected and pKVM view of ICH_VTR_EL2 to a
   runtime-patched constant, allowing the same data to be shared with
   pKVM prior to dropping host privileges

 - Considerable pile of LLM-assisted fixes around the shop but mostly in
   the VGIC, our in-kernel generator of bugs (and sometimes interrupts)
Merge branch 'kvm-arm64/feat-nv3' into next 2026-08-19T19:27:53+00:00 Oliver Upton oupton@kernel.org 2026-08-19T19:27:53+00:00 5f44f603b0daeda535b6d307cd02ef9a24b3b8c5 * kvm-arm64/feat-nv3: (29 commits) : Support for FEAT_NV2p1 and FEAT_NV3, courtesy of Marc Zyngier : : Couple of accelerations for nested virtualization: : : - Elide traps for EL1 alias registers when hardware guarantees that : EL2-only bits are stateful (NV2p1) : : - Use TGE-aware hardware to avoid unnecesary ERET/TLBI traps that : remain 'in-context' (i.e. L1 kernel/userspace) arm64: Add override for ID_AA64MMFR4_EL1.NV_frac KVM: arm64: selftest: Add NVHCR_EL2 to get-reg-list KVM: arm64: Expose FEAT_NV3 to guests KVM: arm64: Add FEAT_NV3 detection KVM: arm64: Engage NV3 TLBI trap elision KVM: arm64: Engage NV3 ERET trap elision KVM: arm64: Add NVHCR_EL2 context switching KVM: arm64: Add routing for NVHCR_EL2 trap KVM: arm64: Add NVHCR_EL2 handling to the sysreg array KVM: arm64: Add sanitisation for NVHCR_EL2 KVM: arm64: Make HCR_EL2 a non-VNCR register KVM: arm64: Add kvm_has_nv{2,3}() predicates KVM: arm64: Add NV3 control bits to HCRX_EL2 sanitisation KVM: arm64: Split NV-specific exit fixups from the non-NV handling arm64: Add ARM64_HAS_NV3 capability arm64: sysreg: Add HCRX_EL2 bits related to FEAT_NV3 arm64: sysreg: Add NVHCR_EL2 description as a mirror of HCR_EL2 arm64: Add FEAT_NV2p1 detection KVM: arm64: Expose FEAT_NV2p1 to NV guests KVM: arm64: Relax CNTHCTL_EL2 handling when FEAT_NV2p1 is present ... Signed-off-by: Oliver Upton <oupton@kernel.org> 
* kvm-arm64/feat-nv3: (29 commits)
  : Support for FEAT_NV2p1 and FEAT_NV3, courtesy of Marc Zyngier
  :
  : Couple of accelerations for nested virtualization:
  :
  :  - Elide traps for EL1 alias registers when hardware guarantees that
  :    EL2-only bits are stateful (NV2p1)
  :
  :  - Use TGE-aware hardware to avoid unnecesary ERET/TLBI traps that
  :    remain 'in-context' (i.e. L1 kernel/userspace)
  arm64: Add override for ID_AA64MMFR4_EL1.NV_frac
  KVM: arm64: selftest: Add NVHCR_EL2 to get-reg-list
  KVM: arm64: Expose FEAT_NV3 to guests
  KVM: arm64: Add FEAT_NV3 detection
  KVM: arm64: Engage NV3 TLBI trap elision
  KVM: arm64: Engage NV3 ERET trap elision
  KVM: arm64: Add NVHCR_EL2 context switching
  KVM: arm64: Add routing for NVHCR_EL2 trap
  KVM: arm64: Add NVHCR_EL2 handling to the sysreg array
  KVM: arm64: Add sanitisation for NVHCR_EL2
  KVM: arm64: Make HCR_EL2 a non-VNCR register
  KVM: arm64: Add kvm_has_nv{2,3}() predicates
  KVM: arm64: Add NV3 control bits to HCRX_EL2 sanitisation
  KVM: arm64: Split NV-specific exit fixups from the non-NV handling
  arm64: Add ARM64_HAS_NV3 capability
  arm64: sysreg: Add HCRX_EL2 bits related to FEAT_NV3
  arm64: sysreg: Add NVHCR_EL2 description as a mirror of HCR_EL2
  arm64: Add FEAT_NV2p1 detection
  KVM: arm64: Expose FEAT_NV2p1 to NV guests
  KVM: arm64: Relax CNTHCTL_EL2 handling when FEAT_NV2p1 is present
  ...

Signed-off-by: Oliver Upton <oupton@kernel.org>
Merge branch 'kvm-arm64/pkvm-7.3' into next 2026-08-19T19:27:35+00:00 Oliver Upton oupton@kernel.org 2026-08-19T19:27:35+00:00 5279b2f42286a610fb991a0ae45b0661c63a9799 * kvm-arm64/pkvm-7.3: (26 commits) : pKVM updates for 7.3 : : - Avoid name collision on trace_clock() when CONFIG_NVHE_EL2_TRACING is : disabled (Mostafa Saleh) : : - Clean up state tracking for whether the EL2 shadow VM has been : created (Fuad Tabba) : : - Synchronize SCTLR_EL1 when injecting an exception to use current : PAN/SSBS state (Fuad Tabba) : : - Avoid unnecessary cache maintenance when I/D-cache are known to be : coherent in pKVM (Mostafa Saleh) : : - Lazy vCPU context save/restore for pKVM (Fuad Tabba) : : - Various fixes to the stage-2 MMU for pKVM (Fuad Tabba) : : - Allow counter offsetting of non-protected guests in protected mode : (Mostafa Saleh) : : - Condition the 'broken CNTVOFF' mitigation on a VM actually having a : nonzero offset, fixing boot failures of pVMs on affected hardware : (Mostafa Saleh) KVM: arm64: Fix hvhe and broken CNTVOFF_EL2 KVM: arm64: Fix timer offsets for non-protected VMs KVM: arm64: Make timer_get_offset() work in all contexts KVM: arm64: selftests: Add stage-2 block transition test KVM: arm64: Don't advertise eager page splitting under pKVM KVM: arm64: Don't WARN on pKVM stage-2 map failures KVM: arm64: Skip pKVM stage-2 flush when FWB is enabled KVM: arm64: Top up stage-2 memcache for dirty logging faults KVM: arm64: Top up the memcache for pKVM permission faults KVM: arm64: Skip cache maintenance for non-cacheable pKVM mappings KVM: arm64: Implement lazy vCPU state sync for non-protected guests KVM: arm64: Add primitives to flush/sync the VGIC state at EL2 KVM: arm64: Minimise EL2's exposure of host VGIC state during world switch KVM: arm64: Add host and hypervisor vCPU lookup primitives KVM: arm64: Move PSCI helper functions to a shared header KVM: arm64: Factor out reusable vCPU reset helpers KVM: arm64: Make vcpu_{read,write}_sys_reg available to HYP code KVM: arm64: Extract MPIDR computation into a shared header KVM: arm64: selftests: Add a userspace watchpoint test KVM: arm64: Flush external_mdscr_el1 to the pKVM hyp vCPU ... Signed-off-by: Oliver Upton <oupton@kernel.org> 
* kvm-arm64/pkvm-7.3: (26 commits)
  : pKVM updates for 7.3
  :
  :  - Avoid name collision on trace_clock() when CONFIG_NVHE_EL2_TRACING is
  :    disabled (Mostafa Saleh)
  :
  :  - Clean up state tracking for whether the EL2 shadow VM has been
  :    created (Fuad Tabba)
  :
  :  - Synchronize SCTLR_EL1 when injecting an exception to use current
  :    PAN/SSBS state (Fuad Tabba)
  :
  :  - Avoid unnecessary cache maintenance when I/D-cache are known to be
  :    coherent in pKVM (Mostafa Saleh)
  :
  :  - Lazy vCPU context save/restore for pKVM (Fuad Tabba)
  :
  :  - Various fixes to the stage-2 MMU for pKVM (Fuad Tabba)
  :
  :  - Allow counter offsetting of non-protected guests in protected mode
  :    (Mostafa Saleh)
  :
  :  - Condition the 'broken CNTVOFF' mitigation on a VM actually having a
  :    nonzero offset, fixing boot failures of pVMs on affected hardware
  :    (Mostafa Saleh)
  KVM: arm64: Fix hvhe and broken CNTVOFF_EL2
  KVM: arm64: Fix timer offsets for non-protected VMs
  KVM: arm64: Make timer_get_offset() work in all contexts
  KVM: arm64: selftests: Add stage-2 block transition test
  KVM: arm64: Don't advertise eager page splitting under pKVM
  KVM: arm64: Don't WARN on pKVM stage-2 map failures
  KVM: arm64: Skip pKVM stage-2 flush when FWB is enabled
  KVM: arm64: Top up stage-2 memcache for dirty logging faults
  KVM: arm64: Top up the memcache for pKVM permission faults
  KVM: arm64: Skip cache maintenance for non-cacheable pKVM mappings
  KVM: arm64: Implement lazy vCPU state sync for non-protected guests
  KVM: arm64: Add primitives to flush/sync the VGIC state at EL2
  KVM: arm64: Minimise EL2's exposure of host VGIC state during world switch
  KVM: arm64: Add host and hypervisor vCPU lookup primitives
  KVM: arm64: Move PSCI helper functions to a shared header
  KVM: arm64: Factor out reusable vCPU reset helpers
  KVM: arm64: Make vcpu_{read,write}_sys_reg available to HYP code
  KVM: arm64: Extract MPIDR computation into a shared header
  KVM: arm64: selftests: Add a userspace watchpoint test
  KVM: arm64: Flush external_mdscr_el1 to the pKVM hyp vCPU
  ...

Signed-off-by: Oliver Upton <oupton@kernel.org>
Merge branch 'kvm-arm64/pmu-7.3' into next 2026-08-19T19:27:30+00:00 Oliver Upton oupton@kernel.org 2026-08-19T19:27:30+00:00 f18145128354f565f9f7518a2ed816e90099fc40 * kvm-arm64/pmu-7.3: : vPMU updates for 7.3 : : - Support for slot-based PMU events, relying on new UAPI that makes : selection of a vPMU implementation mandatory (Congkai Tan) KVM: arm64: Add KVM_ARM_VCPU_PMU_V3_STRICT vCPU feature KVM: arm64: Ignore writes to PMCR_EL0.N when using strict UAPI KVM: arm64: Advertise STALL_SLOT* in PMCEID1 under strict PMUv3 UAPI KVM: arm64: Expose PMMIR_EL1.SLOTS under strict PMUv3 UAPI Signed-off-by: Oliver Upton <oupton@kernel.org> 
* kvm-arm64/pmu-7.3:
  : vPMU updates for 7.3
  :
  :  - Support for slot-based PMU events, relying on new UAPI that makes
  :    selection of a vPMU implementation mandatory (Congkai Tan)
  KVM: arm64: Add KVM_ARM_VCPU_PMU_V3_STRICT vCPU feature
  KVM: arm64: Ignore writes to PMCR_EL0.N when using strict UAPI
  KVM: arm64: Advertise STALL_SLOT* in PMCEID1 under strict PMUv3 UAPI
  KVM: arm64: Expose PMMIR_EL1.SLOTS under strict PMUv3 UAPI

Signed-off-by: Oliver Upton <oupton@kernel.org>
Merge tag 'kvm-x86-selftests2-7.3' of https://github.com/kvm-x86/linux into HEAD 2026-08-18T11:24:04+00:00 Paolo Bonzini pbonzini@redhat.com 2026-08-18T11:19:01+00:00 15a9a2ba0c546fb576085f36c6d39fbae6a32dd4 KVM selftests changes for 7.3, part 2 - Fix several issues with seeding KVM's pRNG, and rework the pRNG APIs to that the pRNG can be sanely used in host code, not just guest code. - Add an IRQ test to validate virtual IRQ deliverty for IRQs wired up via KVM_IRQFD + KVM_SET_GSI_ROUTING, with optional support for triggering IRQs via writes to an assigned VFIO device. - Add syscall wrappers to assert success on a variety of pthreads and CPU affinity APIs. - Set vCPU pthread affinity as early as possible to reduce contention issues that were surfaced by PREEMPT_LAZY, which result in runtimes of over a minute on large hosts, versus the expected ~5 seconds. - Rework the PMU counters test to run each testcase using a single VM with many vCPUs for each sub-testcase, instead of using a unique VM for each sub-testcase. This cuts the runtime by ~20x. 
KVM selftests changes for 7.3, part 2

 - Fix several issues with seeding KVM's pRNG, and rework the pRNG APIs to that
   the pRNG can be sanely used in host code, not just guest code.

 - Add an IRQ test to validate virtual IRQ deliverty for IRQs wired up via
   KVM_IRQFD + KVM_SET_GSI_ROUTING, with optional support for triggering IRQs
   via writes to an assigned VFIO device.

 - Add syscall wrappers to assert success on a variety of pthreads and CPU
   affinity APIs.

 - Set vCPU pthread affinity as early as possible to reduce contention issues
   that were surfaced by PREEMPT_LAZY, which result in runtimes of over a
   minute on large hosts, versus the expected ~5 seconds.

 - Rework the PMU counters test to run each testcase using a single VM with
   many vCPUs for each sub-testcase, instead of using a unique VM for each
   sub-testcase.  This cuts the runtime by ~20x.
KVM: selftests: Add KVM syscall wrappers for pthread_{cancel,join}() 2026-07-31T20:54:47+00:00 Sean Christopherson seanjc@google.com 2026-07-31T19:56:09+00:00 bc9143135bf328a61456c7eb60e97b5ffb15e96e Add and use KVM wrappers for pthread_{cancel,join}() so that selftests don't need to manually assert that the syscalls succeeded. Note, the vast majority tests don't actually assert success, but they all obviously rely on the syscall to succeed. Other than explicitly failing if a syscall fails, no functional change intended. Link: https://patch.msgid.link/20260731195612.2697986-10-seanjc@google.com Signed-off-by: Sean Christopherson <seanjc@google.com> 
Add and use KVM wrappers for pthread_{cancel,join}() so that selftests
don't need to manually assert that the syscalls succeeded.

Note, the vast majority tests don't actually assert success, but they all
obviously rely on the syscall to succeed.

Other than explicitly failing if a syscall fails, no functional change
intended.

Link: https://patch.msgid.link/20260731195612.2697986-10-seanjc@google.com
Signed-off-by: Sean Christopherson <seanjc@google.com>
KVM: selftests: Add KVM syscall wrapper for pthread_create() 2026-07-31T20:54:47+00:00 Sean Christopherson seanjc@google.com 2026-07-31T19:56:08+00:00 5171573ce7cbaaaa3a02879a369f5884e3906710 Add and use a KVM wrapper for pthread_create() syscall so that selftests don't need to manually assert that the syscall succeeded. Note, most tests don't actually assert success, but they all obviously rely on the syscall to succeed. Other than explicitly failing if pthread_create() fails, no functional change intended. Link: https://patch.msgid.link/20260731195612.2697986-9-seanjc@google.com Signed-off-by: Sean Christopherson <seanjc@google.com> 
Add and use a KVM wrapper for pthread_create() syscall so that selftests
don't need to manually assert that the syscall succeeded.

Note, most tests don't actually assert success, but they all obviously
rely on the syscall to succeed.

Other than explicitly failing if pthread_create() fails, no functional
change intended.

Link: https://patch.msgid.link/20260731195612.2697986-9-seanjc@google.com
Signed-off-by: Sean Christopherson <seanjc@google.com>
KVM: arm64: selftest: Add NVHCR_EL2 to get-reg-list 2026-07-31T07:17:05+00:00 Marc Zyngier maz@kernel.org 2026-07-30T07:10:21+00:00 1f4a10ff9090068cfd78f6c76e0f2871e5953461 Since we now expose a new system register on NV3-capable HW when the guest is exposed to it, add it to the existing checker. FWIW. Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://patch.msgid.link/20260730071022.296811-29-maz@kernel.org Signed-off-by: Oliver Upton <oupton@kernel.org> 
Since we now expose a new system register on NV3-capable HW when
the guest is exposed to it, add it to the existing checker.  FWIW.

Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://patch.msgid.link/20260730071022.296811-29-maz@kernel.org
Signed-off-by: Oliver Upton <oupton@kernel.org>