linux-toradex.git/virt, branch v5.7-rc2

KVM: Pass kvm_init()'s opaque param to additional arch funcs

2020-03-31T14:48:03+00:00

Pass @opaque to kvm_arch_hardware_setup() and
kvm_arch_check_processor_compat() to allow architecture specific code to
reference @opaque without having to stash it away in a temporary global
variable.  This will enable x86 to separate its vendor specific callback
ops, which are passed via @opaque, into "init" and "runtime" ops without
having to stash away the "init" ops.

No functional change intended.

Reviewed-by: Cornelia Huck 
Tested-by: Cornelia Huck  #s390
Acked-by: Marc Zyngier 
Signed-off-by: Sean Christopherson 
Message-Id: <20200321202603.19355-2-sean.j.christopherson@intel.com>
Reviewed-by: Vitaly Kuznetsov 
Signed-off-by: Paolo Bonzini

Merge tag 'kvmarm-5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/kvmarm/kvmarm into HEAD

2020-03-31T14:44:53+00:00

KVM/arm updates for Linux 5.7

- GICv4.1 support
- 32bit host removal

KVM: Fix out of range accesses to memslots

2020-03-26T09:58:27+00:00

Reset the LRU slot if it becomes invalid when deleting a memslot to fix
an out-of-bounds/use-after-free access when searching through memslots.

Explicitly check for there being no used slots in search_memslots(), and
in the caller of s390's approximation variant.

Fixes: 36947254e5f9 ("KVM: Dynamically size memslot array based on number of used slots")
Reported-by: Qian Cai 
Cc: Peter Xu 
Signed-off-by: Sean Christopherson 
Message-Id: <20200320205546.2396-2-sean.j.christopherson@intel.com>
Acked-by: Christian Borntraeger 
Signed-off-by: Paolo Bonzini

Merge branch 'kvm-arm64/gic-v4.1' into kvmarm-master/next

2020-03-24T12:45:27+00:00

Signed-off-by: Marc Zyngier

KVM: arm64: GICv4.1: Expose HW-based SGIs in debugfs

2020-03-24T12:15:52+00:00

The vgic-state debugfs file could do with showing the pending state
of the HW-backed SGIs. Plug it into the low-level code.

Signed-off-by: Marc Zyngier 
Reviewed-by: Zenghui Yu 
Reviewed-by: Eric Auger 
Link: https://lore.kernel.org/r/20200304203330.4967-24-maz@kernel.org

KVM: arm64: GICv4.1: Reload VLPI configuration on distributor enable/disable

2020-03-24T12:15:51+00:00

Each time a Group-enable bit gets flipped, the state of these bits
needs to be forwarded to the hardware. This is a pretty heavy
handed operation, requiring all vcpus to reload their GICv4
configuration. It is thus implemented as a new request type.

These enable bits are programmed into the HW by setting the VGrp{0,1}En
fields of GICR_VPENDBASER when the vPEs are made resident again.

Of course, we only support Group-1 for now...

Signed-off-by: Marc Zyngier 
Reviewed-by: Zenghui Yu 
Link: https://lore.kernel.org/r/20200304203330.4967-22-maz@kernel.org

KVM: arm64: GICv4.1: Plumb SGI implementation selection in the distributor

2020-03-24T12:15:51+00:00

The GICv4.1 architecture gives the hypervisor the option to let
the guest choose whether it wants the good old SGIs with an
active state, or the new, HW-based ones that do not have one.

For this, plumb the configuration of SGIs into the GICv3 MMIO
handling, present the GICD_TYPER2.nASSGIcap to the guest,
and handle the GICD_CTLR.nASSGIreq setting.

In order to be able to deal with the restore of a guest, also
apply the GICD_CTLR.nASSGIreq setting at first run so that we
can move the restored SGIs to the HW if that's what the guest
had selected in a previous life.

Signed-off-by: Marc Zyngier 
Reviewed-by: Zenghui Yu 
Link: https://lore.kernel.org/r/20200304203330.4967-21-maz@kernel.org

KVM: arm64: GICv4.1: Allow SGIs to switch between HW and SW interrupts

2020-03-24T12:15:51+00:00

In order to let a guest buy in the new, active-less SGIs, we
need to be able to switch between the two modes.

Handle this by stopping all guest activity, transfer the state
from one mode to the other, and resume the guest. Nothing calls
this code so far, but a later patch will plug it into the MMIO
emulation.

Signed-off-by: Marc Zyngier 
Reviewed-by: Zenghui Yu 
Link: https://lore.kernel.org/r/20200304203330.4967-20-maz@kernel.org

KVM: arm64: GICv4.1: Add direct injection capability to SGI registers

2020-03-24T12:15:51+00:00

Most of the GICv3 emulation code that deals with SGIs now has to be
aware of the v4.1 capabilities in order to benefit from it.

Add such support, keyed on the interrupt having the hw flag set and
being a SGI.

Signed-off-by: Marc Zyngier 
Reviewed-by: Zenghui Yu 
Reviewed-by: Eric Auger 
Link: https://lore.kernel.org/r/20200304203330.4967-19-maz@kernel.org

KVM: arm64: GICv4.1: Let doorbells be auto-enabled

2020-03-24T12:15:51+00:00

As GICv4.1 understands the life cycle of doorbells (instead of
just randomly firing them at the most inconvenient time), just
enable them at irq_request time, and be done with it.

Signed-off-by: Marc Zyngier 
Reviewed-by: Zenghui Yu 
Reviewed-by: Eric Auger 
Link: https://lore.kernel.org/r/20200304203330.4967-18-maz@kernel.org