diff options
| author | yagi <yagi@ke66.alps.lineo.co.jp> | 2012-06-05 17:37:01 +0900 |
|---|---|---|
| committer | Justin Waters <justin.waters@timesys.com> | 2012-07-03 17:15:06 -0400 |
| commit | 1e123c5d6c82065501b9417524af4ab56ebc0019 (patch) | |
| tree | 8f1ce02af894b339b8434aaf76a42baeec793e7e | |
| parent | 599d85ccb7f64abb539e9795999e8a082bdbdc97 (diff) | |
change: clock & iomux
| -rw-r--r-- | arch/arm/mach-mvf/board-twr_vf600.c | 27 | ||||
| -rw-r--r-- | arch/arm/mach-mvf/board-twr_vf600.h | 140 | ||||
| -rw-r--r-- | arch/arm/mach-mvf/clock.c | 163 | ||||
| -rwxr-xr-x[-rw-r--r--] | arch/arm/plat-mxc/include/mach/iomux-vf6xx.h | 571 | ||||
| -rwxr-xr-x[-rw-r--r--] | arch/arm/plat-mxc/include/mach/iomux-vmvf.h | 6 |
5 files changed, 605 insertions, 302 deletions
diff --git a/arch/arm/mach-mvf/board-twr_vf600.c b/arch/arm/mach-mvf/board-twr_vf600.c index d9c6658554c0..f5f67f79a924 100644 --- a/arch/arm/mach-mvf/board-twr_vf600.c +++ b/arch/arm/mach-mvf/board-twr_vf600.c @@ -79,6 +79,31 @@ //#include "cpu_op-mvf.h" #include "board-twr_vf600.h" +/* GPIO PIN, sort by PORT/BIT */ +#define TWR_VF600_GPIO10 IMX_GPIO_NR(1, 10) //PTA20 +#define TWR_VF600_GPIO20 IMX_GPIO_NR(1, 20) //PTA30 +#define TWR_VF600_GPIO21 IMX_GPIO_NR(1, 21) //PTA31 +#define TWR_VF600_GPIO28 IMX_GPIO_NR(1, 28) //PTB6 +#define TWR_VF600_GPIO29 IMX_GPIO_NR(1, 29) //PTB7 +#define TWR_VF600_GPIO30 IMX_GPIO_NR(1, 30) //PTB8 +#define TWR_VF600_GPIO31 IMX_GPIO_NR(1, 31) //PTB9 +#define TWR_VF600_GPIO32 IMX_GPIO_NR(2, 0) //PTB10 +#define TWR_VF600_GPIO33 IMX_GPIO_NR(2, 1) //PTB11 +#define TWR_VF600_GPIO34 IMX_GPIO_NR(2, 2) //PTB12 +#define TWR_VF600_GPIO38 IMX_GPIO_NR(2, 6) //PTB16 +#define TWR_VF600_GPIO39 IMX_GPIO_NR(2, 7) //PTB17 +#define TWR_VF600_GPIO85 IMX_GPIO_NR(3, 21) //PTD6 +#define TWR_VF600_GPIO92 IMX_GPIO_NR(3, 28) //PTD13 +#define TWR_VF600_GPIO93 IMX_GPIO_NR(3, 29) //PTB23 +#define TWR_VF600_GPIO96 IMX_GPIO_NR(4, 0) //PTB26 +#define TWR_VF600_GPIO98 IMX_GPIO_NR(4, 2) //PTB28 +#define TWR_VF600_GPIO102 IMX_GPIO_NR(4, 6) //PTC29 +#define TWR_VF600_GPIO103 IMX_GPIO_NR(4, 7) //PTC30 +#define TWR_VF600_GPIO104 IMX_GPIO_NR(4, 8) //PTC31 +#define TWR_VF600_GPIO108 IMX_GPIO_NR(4, 12) //PTE3 +#define TWR_VF600_GPIO134 IMX_GPIO_NR(5, 6) //PTA7 + + void __init early_console_setup(unsigned long base, struct clk *clk); #if 0 //FIXME @@ -204,7 +229,7 @@ static void __init mvf_timer_init(void) #endif mvf_clocks_init(128000, 24000000, 32000, 24000000); - uart_clk = clk_get_sys("imx-uart.1", NULL); + uart_clk = clk_get_sys("mvf-uart.1", NULL); early_console_setup(MVF_UART1_BASE_ADDR, uart_clk); } diff --git a/arch/arm/mach-mvf/board-twr_vf600.h b/arch/arm/mach-mvf/board-twr_vf600.h index 45188a065070..0ce5dc797246 100644 --- a/arch/arm/mach-mvf/board-twr_vf600.h +++ b/arch/arm/mach-mvf/board-twr_vf600.h @@ -1,4 +1,6 @@ /* + * based on arch/arm/mach-mx6/board-mx6q_arm2.h + * * Copyright (C) 2012 Freescale Semiconductor, Inc. All Rights Reserved. * * This program is free software; you can redistribute it and/or modify @@ -123,7 +125,7 @@ static iomux_vmvf_cfg_t twr_vf6xx_pads[] = { VF6XX_PAD_PAD_99__NFC_MLC_NF_RB_B, VF6XX_PAD_PAD_100__NFC_MLC_NF_ALE, VF6XX_PAD_PAD_101__NFC_MLC_NF_CLE, - /*FIXME VF6XX_PAD_PAD_102__XXX,*/ + VF6XX_PAD_PAD_102__RGPIOC_GPIO102, /*FIXME VF6XX_PAD_PAD_102__XXX,*/ VF6XX_PAD_PAD_103__ADC0_DA_ADC0SE5, VF6XX_PAD_PAD_104__ADC1_DA_ADC1SE5, VF6XX_PAD_PAD_105__TCON0_TCON1, @@ -156,8 +158,144 @@ static iomux_vmvf_cfg_t twr_vf6xx_pads[] = { VF6XX_PAD_PAD_132__TCON0_DATA_OUT8, VF6XX_PAD_PAD_133__TCON0_DATA_OUT9, VF6XX_PAD_PAD_134__RGPIOC_GPIO134 + #elif defined(CONFIG_IOMUX_SECONDARY) /* Secondary function */ + VF6XX_PAD_PAD_0__CCM_RMII_CLKIN, + VF6XX_PAD_PAD_1__DEBUG_TCLK, + VF6XX_PAD_PAD_2__DEBUG_TDI, + VF6XX_PAD_PAD_3__DEBUG_TDO, + VF6XX_PAD_PAD_4__DEBUG_TMS, + VF6XX_PAD_PAD_5__PLATFORM_TRACECK, + VF6XX_PAD_PAD_6__PLATFORM_TRACED0, /* secondary */ + VF6XX_PAD_PAD_7__PLATFORM_TRACED1, + VF6XX_PAD_PAD_8__PLATFORM_TRACED2, /* secondary */ + VF6XX_PAD_PAD_9__PLATFORM_TRACED3, /* secondary */ + VF6XX_PAD_PAD_10__PLATFORM_TRACED4, /* secondary */ + VF6XX_PAD_PAD_11__PLATFORM_TRACED5, /* secondary */ + VF6XX_PAD_PAD_12__PLATFORM_TRACED6, /* secondary */ + VF6XX_PAD_PAD_13__PLATFORM_TRACED7, /* secondary */ + VF6XX_PAD_PAD_14__PLATFORM_TRACED8, /* secondary */ + VF6XX_PAD_PAD_15__PLATFORM_TRACED9, /* secondary */ + VF6XX_PAD_PAD_16__PLATFORM_TRACED10, /* secondary */ + VF6XX_PAD_PAD_17__PLATFORM_TRACED11, /* secondary */ + VF6XX_PAD_PAD_18__ENET_SWIAHB_MAC1_TMR0, /* secondary */ + VF6XX_PAD_PAD_19__ENET_SWIAHB_MAC1_TMR1, /* secondary */ + VF6XX_PAD_PAD_20__ENET_SWIAHB_MAC1_TMR2, /* secondary */ + VF6XX_PAD_PAD_21__ENET_SWIAHB_MAC1_TMR3, /* secondary */ + VF6XX_PAD_PAD_22__FLEXTIMER0_CH0, + VF6XX_PAD_PAD_23__FLEXTIMER0_CH1, + VF6XX_PAD_PAD_24__FLEXTIMER0_CH2, + VF6XX_PAD_PAD_25__FLEXTIMER0_CH3, + VF6XX_PAD_PAD_26__SCI_FLX1_TX, + VF6XX_PAD_PAD_27__SCI_FLX1_RX, + VF6XX_PAD_PAD_28__RGPIOC_GPIO28, /* secondary */ + VF6XX_PAD_PAD_29__RGPIOC_GPIO29, /* secondary */ + VF6XX_PAD_PAD_30__RGPIOC_GPIO30, /* secondary */ + VF6XX_PAD_PAD_31__RGPIOC_GPIO31, /* secondary */ + VF6XX_PAD_PAD_32__CCM_CKO1, /* secondary */ + VF6XX_PAD_PAD_33__ENET_SWIAHB_MAC0_TMR0, /* secondary */ + VF6XX_PAD_PAD_34__ENET_SWIAHB_MAC0_TMR1, /* secondary */ + VF6XX_PAD_PAD_35__PLATFORM_TRACETL, + VF6XX_PAD_PAD_36__CAN0_RXD, /* secondary */ + VF6XX_PAD_PAD_37__CAN0_TXD, /* secondary */ + VF6XX_PAD_PAD_38__CAN1_RXD, /* secondary */ + VF6XX_PAD_PAD_39__CAN1_TXD, /* secondary */ + VF6XX_PAD_PAD_40__CCM_EXT_AUDIO_MCLK, + VF6XX_PAD_PAD_41__DSPI0_CS0, + VF6XX_PAD_PAD_42__DSPI0_SIN, + VF6XX_PAD_PAD_43__DSPI0_SOUT, + VF6XX_PAD_PAD_44__DSPI0_SCK, + VF6XX_PAD_PAD_45__ENET_SWIAHB_RMII0_MDC, + VF6XX_PAD_PAD_46__ENET_SWIAHB_RMII0_MDIO, + VF6XX_PAD_PAD_47__ENET_SWIAHB_RMII0_CRS_DV, + VF6XX_PAD_PAD_48__ENET_SWIAHB_RMII0_RXD1, + VF6XX_PAD_PAD_49__ENET_SWIAHB_RMII0_RXD0, + VF6XX_PAD_PAD_50__ENET_SWIAHB_RMII0_RXER, + VF6XX_PAD_PAD_51__ENET_SWIAHB_RMII0_TXD1, + VF6XX_PAD_PAD_52__ENET_SWIAHB_RMII0_TXD0, + VF6XX_PAD_PAD_53__ENET_SWIAHB_RMII0_TXEN, + VF6XX_PAD_PAD_54__ENET_SWIAHB_RMII1_MDC, + VF6XX_PAD_PAD_55__ENET_SWIAHB_RMII1_MDIO, + VF6XX_PAD_PAD_56__ENET_SWIAHB_RMII1_CRS_DV, + VF6XX_PAD_PAD_57__ENET_SWIAHB_RMII1_RXD1, + VF6XX_PAD_PAD_58__ENET_SWIAHB_RMII1_RXD0, + VF6XX_PAD_PAD_59__ENET_SWIAHB_RMII1_RXER, + VF6XX_PAD_PAD_60__ENET_SWIAHB_RMII1_TXD1, + VF6XX_PAD_PAD_61__ENET_SWIAHB_RMII1_TXD0, + VF6XX_PAD_PAD_62__ENET_SWIAHB_RMII1_TXEN, + VF6XX_PAD_PAD_63__NFC_MLC_NF_IO15, + VF6XX_PAD_PAD_64__NFC_MLC_NF_IO14, + VF6XX_PAD_PAD_65__NFC_MLC_NF_IO13, + VF6XX_PAD_PAD_66__NFC_MLC_NF_IO12, + VF6XX_PAD_PAD_67__NFC_MLC_NF_IO11, + VF6XX_PAD_PAD_68__NFC_MLC_NF_IO10, + VF6XX_PAD_PAD_69__NFC_MLC_NF_IO9, + VF6XX_PAD_PAD_70__NFC_MLC_NF_IO8, + VF6XX_PAD_PAD_71__NFC_MLC_NF_IO7, + VF6XX_PAD_PAD_72__NFC_MLC_NF_IO6, + VF6XX_PAD_PAD_73__NFC_MLC_NF_IO5, + VF6XX_PAD_PAD_74__NFC_MLC_NF_IO4, + VF6XX_PAD_PAD_75__NFC_MLC_NF_IO3, + VF6XX_PAD_PAD_76__NFC_MLC_NF_IO2, + VF6XX_PAD_PAD_77__NFC_MLC_NF_IO1, + VF6XX_PAD_PAD_78__NFC_MLC_NF_IO0, + VF6XX_PAD_PAD_79__QUADSPI0_QSCK_A, + VF6XX_PAD_PAD_80__QUADSPI0_QPCS0_A, + VF6XX_PAD_PAD_81__QUADSPI0_QSPI_IO3_A, + VF6XX_PAD_PAD_82__QUADSPI0_QSPI_IO2_A, + VF6XX_PAD_PAD_83__QUADSPI0_QSPI_IO1_A, + VF6XX_PAD_PAD_84__QUADSPI0_QSPI_IO0_A, + VF6XX_PAD_PAD_85__RGPIOC_GPIO85, + VF6XX_PAD_PAD_86__QUADSPI0_QSCK_B, + VF6XX_PAD_PAD_87__QUADSPI0_QPCS0_B, + VF6XX_PAD_PAD_88__QUADSPI0_QSPI_IO3_B, + VF6XX_PAD_PAD_89__QUADSPI0_QSPI_IO2_B, + VF6XX_PAD_PAD_90__QUADSPI0_QSPI_IO1_B, + VF6XX_PAD_PAD_91__QUADSPI0_QSPI_IO0_B, + VF6XX_PAD_PAD_92__RGPIOC_GPIO92, + VF6XX_PAD_PAD_93__RGPIOC_GPIO93, + VF6XX_PAD_PAD_94__NFC_MLC_NF_WE_B, + VF6XX_PAD_PAD_95__NFC_MLC_NF_CE0_B, + VF6XX_PAD_PAD_96__RGPIOC_GPIO96, + VF6XX_PAD_PAD_97__NFC_MLC_NF_RE_B, + VF6XX_PAD_PAD_98__RGPIOC_GPIO98, + VF6XX_PAD_PAD_99__NFC_MLC_NF_RB_B, + VF6XX_PAD_PAD_100__NFC_MLC_NF_ALE, + VF6XX_PAD_PAD_101__NFC_MLC_NF_CLE, + VF6XX_PAD_PAD_102__RGPIOC_GPIO102, /* secondary */ + VF6XX_PAD_PAD_103__RGPIOC_GPIO103, /* secondary */ + VF6XX_PAD_PAD_104__RGPIOC_GPIO104, /* secondary */ + VF6XX_PAD_PAD_105__TCON0_TCON1, + VF6XX_PAD_PAD_106__TCON0_TCON2, + VF6XX_PAD_PAD_107__TCON0_DATA_OUT1, + VF6XX_PAD_PAD_108__RGPIOC_GPIO108, + VF6XX_PAD_PAD_109__TCON0_TCON3, + VF6XX_PAD_PAD_110__TCON0_DATA_OUT18, + VF6XX_PAD_PAD_111__TCON0_DATA_OUT19, + VF6XX_PAD_PAD_112__TCON0_DATA_OUT20, + VF6XX_PAD_PAD_113__TCON0_DATA_OUT21, + VF6XX_PAD_PAD_114__TCON0_DATA_OUT22, + VF6XX_PAD_PAD_115__TCON0_DATA_OUT23, + VF6XX_PAD_PAD_116__TCON0_DATA_OUT24, + VF6XX_PAD_PAD_117__TCON0_DATA_OUT25, + VF6XX_PAD_PAD_118__TCON0_DATA_OUT10, + VF6XX_PAD_PAD_119__TCON0_DATA_OUT11, + VF6XX_PAD_PAD_120__TCON0_DATA_OUT12, + VF6XX_PAD_PAD_121__TCON0_DATA_OUT13, + VF6XX_PAD_PAD_122__TCON0_DATA_OUT14, + VF6XX_PAD_PAD_123__TCON0_DATA_OUT15, + VF6XX_PAD_PAD_124__TCON0_DATA_OUT16, + VF6XX_PAD_PAD_125__TCON0_DATA_OUT17, + VF6XX_PAD_PAD_126__TCON0_DATA_OUT2, + VF6XX_PAD_PAD_127__TCON0_DATA_OUT3, + VF6XX_PAD_PAD_128__TCON0_DATA_OUT4, + VF6XX_PAD_PAD_129__TCON0_DATA_OUT5, + VF6XX_PAD_PAD_130__TCON0_DATA_OUT6, + VF6XX_PAD_PAD_131__TCON0_DATA_OUT7, + VF6XX_PAD_PAD_132__TCON0_DATA_OUT8, + VF6XX_PAD_PAD_133__TCON0_DATA_OUT9, + VF6XX_PAD_PAD_134__RGPIOC_GPIO134 #endif }; diff --git a/arch/arm/mach-mvf/clock.c b/arch/arm/mach-mvf/clock.c index 144754c0e7e0..c9c26ea55f1c 100644 --- a/arch/arm/mach-mvf/clock.c +++ b/arch/arm/mach-mvf/clock.c @@ -2154,6 +2154,137 @@ static struct clk ftm3_clk = { .set_parent = _clk_ftm3_set_parent, }; +static int _clk_nfc_enable(struct clk *clk) +{ + u32 reg; + + reg = __raw_readl(MXC_CCM_CSCDR2) | MXC_CCM_CSCDR2_NFC_EN; + __raw_writel(reg, MXC_CCM_CSCDR2); + + return 0; +} + +static void _clk_nfc_disable(struct clk *clk) +{ + u32 reg; + + reg = __raw_readl(MXC_CCM_CSCDR2) & ~MXC_CCM_CSCDR2_NFC_EN; + __raw_writel(reg, MXC_CCM_CSCDR2); +} + +static unsigned long _clk_nfc_get_rate(struct clk *clk) +{ + u32 reg, div, prediv, fracdiv, frac_en; + + prediv = ((__raw_readl(MXC_CCM_CSCDR3) & MXC_CCM_CSCDR3_NFC_PRE_DIV_MASK) >> + MXC_CCM_CSCDR3_NFC_PRE_DIV_OFFSET) + 1; + reg = __raw_readl(MXC_CCM_CSCDR2); + frac_en = MXC_CCM_CSCDR2_NFC_FRAC_DIV_EN & MXC_CCM_CSCDR2_NFC_FRAC_DIV_EN; + fracdiv = ((reg & MXC_CCM_CSCDR2_NFC_FRAC_DIV_MASK) >> + MXC_CCM_CSCDR2_NFC_FRAC_DIV_OFFSET) + 1; + + if (!frac_en) + div = prediv * fracdiv; + else + div = prediv * fracdiv; //FIXME + + return clk_get_rate(clk->parent) / div; + +} + +static int _clk_nfc_set_rate(struct clk *clk, unsigned long rate) +{ + u32 reg, div, pre, post; + u32 parent_rate = clk_get_rate(clk->parent); + + div = parent_rate / rate; + if (div == 0) + div++; + if (((parent_rate / div) != rate) || div > 128) + return -EINVAL; + + //FIXME + __calc_pre_post_dividers(1 << 4, div, &pre, &post); + + reg = __raw_readl(MXC_CCM_CSCDR3) & ~MXC_CCM_CSCDR3_NFC_PRE_DIV_MASK; + reg |= (pre -1) << MXC_CCM_CSCDR3_NFC_PRE_DIV_OFFSET; + __raw_writel(reg, MXC_CCM_CSCDR3); + + reg = __raw_readl(MXC_CCM_CSCDR2) & ~MXC_CCM_CSCDR2_NFC_FRAC_DIV_MASK; + reg &= ~MXC_CCM_CSCDR2_NFC_FRAC_DIV_EN; + reg |= (post -1) << MXC_CCM_CSCDR2_NFC_FRAC_DIV_OFFSET; + __raw_writel(reg, MXC_CCM_CSCDR2); + + return 0; +} + +static int _clk_nfc_set_parent(struct clk *clk, struct clk *parent) +{ + u32 reg; + int mux; + + reg = __raw_readl(MXC_CCM_CSCMR1) & ~MXC_CCM_CSCMR1_NFC_CLK_SEL_MASK; + mux = _get_mux(parent, &plat_bus_clk, &pll1_pfd1, &pll3_pfd1, &pll3_pfd3); + reg |= mux << MXC_CCM_CSCMR1_NFC_CLK_SEL_OFFSET; + __raw_writel(reg, MXC_CCM_CSCMR1); + + return 0; +} + +static struct clk nfc_clk_root = { + __INIT_CLK_DEBUG(nfc_clk_root) + .parent = &plat_bus_clk, + .enable = _clk_nfc_enable, + .disable = _clk_nfc_disable, + .get_rate = _clk_nfc_get_rate, + .set_rate = _clk_nfc_set_rate, + .set_parent = _clk_nfc_set_parent, +}; + +static struct clk nfc_clk[] = { + { + __INIT_CLK_DEBUG(nfc_clk_0) + .id = 0, + .parent = &nfc_clk_root, + .enable_reg = MXC_CCM_CCGR10, + .enable_shift = MXC_CCM_CCGRx_CG0_OFFSET, + .enable = _clk_enable, + .disable = _clk_disable, + .secondary = &nfc_clk[1], + }, + { + __INIT_CLK_DEBUG(nfc_clk_1) + .id = 1, + .parent = &nfc_clk_root, + .enable_reg = MXC_CCM_CCGR10, + .enable_shift = MXC_CCM_CCGRx_CG1_OFFSET, + .enable = _clk_enable, + .disable = _clk_disable, + .secondary = &nfc_clk[2], + }, + { + __INIT_CLK_DEBUG(nfc_clk_2) + .id = 2, + .parent = &nfc_clk_root, + .enable_reg = MXC_CCM_CCGR10, + .enable_shift = MXC_CCM_CCGRx_CG2_OFFSET, + .enable = _clk_enable, + .disable = _clk_disable, + .secondary = &nfc_clk[3], + }, + { + __INIT_CLK_DEBUG(nfc_clk_3) + .id = 3, + .parent = &nfc_clk_root, + .enable_reg = MXC_CCM_CCGR10, + .enable_shift = MXC_CCM_CCGRx_CG3_OFFSET, + .enable = _clk_enable, + .disable = _clk_disable, + }, +}; +/* FIXME QSPI */ + + static int _clk_enet_rmii_enable(struct clk *clk) { u32 reg; @@ -2252,6 +2383,8 @@ static struct clk enet_ts_clk = { #endif }; +/* FIXME eSDHC */ + static struct clk dcu0_clk_root; static struct clk dcu1_clk_root; @@ -2523,6 +2656,8 @@ static struct clk dcu1_clk[] = { }, }; +/* FIXME ESAI, SPDIF, SAI */ + static int _clk_video_adc_enable(struct clk *clk) { u32 reg; @@ -2657,6 +2792,8 @@ static struct clk gpu_clk = { .set_parent = _clk_gpu_set_parent, }; +/* FIXME SWO, Trace */ + static struct clk dma_mux0_clk = { __INIT_CLK_DEBUG(dma_mux0_clk) .parent = &ips_bus_clk, @@ -2729,7 +2866,7 @@ static struct clk spi1_clk = { .disable = _clk_disable, }; -/* FIXME: SAI0 - USBC0 */ +/* FIXME: USBC0 */ static struct clk pdb_clk = { __INIT_CLK_DEBUG(pdb_clk) @@ -2787,7 +2924,7 @@ static struct clk lptmr_clk = { .disable = _clk_disable, }; -/* FIXME: RLE - QSPI0 */ +/* FIXME: RLE */ static struct clk iomux_clk = { __INIT_CLK_DEBUG(iomux_clk) @@ -2861,7 +2998,7 @@ static struct clk scsc_clk = { .disable = _clk_disable, }; -/* FIXME: ASRC - ESAI */ +/* FIXME: ASRC */ static struct clk ewm_clk = { __INIT_CLK_DEBUG(ewm_clk) @@ -2981,8 +3118,6 @@ static struct clk seg_lcd_clk = { .disable = _clk_disable, }; -/* FIXME: QSPI1 */ - static struct clk video_dec_clk = { __INIT_CLK_DEBUG(video_dec_clk) .parent = &ips_bus_clk, @@ -3001,8 +3136,6 @@ static struct clk viu3_clk = { .disable = _clk_disable, }; -/* FIXME: NFC */ - static struct clk eth_l2_sw_clk[] = { { __INIT_CLK_DEBUG(eth_l2_sw_0_clk) @@ -3149,6 +3282,8 @@ static struct clk_lookup lookups[] = { _REGISTER_CLOCK(NULL, "ftm1_clk", ftm1_clk), _REGISTER_CLOCK(NULL, "ftm2_clk", ftm2_clk), _REGISTER_CLOCK(NULL, "ftm3_clk", ftm3_clk), + _REGISTER_CLOCK(NULL, "nfc_clk_root", nfc_clk_root), + _REGISTER_CLOCK(NULL, "nfc_clk", nfc_clk[0]), #if 1 _REGISTER_CLOCK(NULL, "fec_clk", enet_clk), //FIXME #else @@ -3166,10 +3301,10 @@ static struct clk_lookup lookups[] = { _REGISTER_CLOCK(NULL, "gpu_clk", gpu_clk), _REGISTER_CLOCK(NULL, "dma_mix0_clk", dma_mux0_clk), _REGISTER_CLOCK(NULL, "dma_mix1_clk", dma_mux1_clk), - _REGISTER_CLOCK("imx-uart.0", NULL, uart0_clk), - _REGISTER_CLOCK("imx-uart.1", NULL, uart1_clk), - _REGISTER_CLOCK("imx-uart.2", NULL, uart2_clk), - _REGISTER_CLOCK("imx-uart.3", NULL, uart3_clk), + _REGISTER_CLOCK("mvf-uart.0", NULL, uart0_clk), + _REGISTER_CLOCK("mvf-uart.1", NULL, uart1_clk), + _REGISTER_CLOCK("mvf-uart.2", NULL, uart2_clk), + _REGISTER_CLOCK("mvf-uart.3", NULL, uart3_clk), _REGISTER_CLOCK(NULL, "spi0_clk", spi0_clk), _REGISTER_CLOCK(NULL, "spi1_clk", spi1_clk), _REGISTER_CLOCK(NULL, "pdb_clk", pdb_clk), @@ -3194,8 +3329,8 @@ static struct clk_lookup lookups[] = { _REGISTER_CLOCK(NULL, "dma_mix2_clk", dma_mux2_clk), _REGISTER_CLOCK(NULL, "dma_mix3_clk", dma_mux3_clk), _REGISTER_CLOCK(NULL, "ocotp_clk", ocotp_clk), - _REGISTER_CLOCK("imx-uart.4", NULL, uart4_clk), - _REGISTER_CLOCK("imx-uart.5", NULL, uart5_clk), + _REGISTER_CLOCK("mvf-uart.4", NULL, uart4_clk), + _REGISTER_CLOCK("mvf-uart.5", NULL, uart5_clk), _REGISTER_CLOCK(NULL, "tcon1_clk", tcon1_clk), _REGISTER_CLOCK(NULL, "seg_lcd_clk", seg_lcd_clk), _REGISTER_CLOCK(NULL, "video_dec_clk", video_dec_clk), @@ -3346,7 +3481,7 @@ static void clk_tree_init(void) int __init mvf_clocks_init(unsigned long ckil, unsigned long ckih, unsigned long oscl, unsigned long osch) { - __iomem void *base; + //__iomem void *base; int i; external_low_reference = ckil; diff --git a/arch/arm/plat-mxc/include/mach/iomux-vf6xx.h b/arch/arm/plat-mxc/include/mach/iomux-vf6xx.h index b0520eb6c032..f7c5c7620ae2 100644..100755 --- a/arch/arm/plat-mxc/include/mach/iomux-vf6xx.h +++ b/arch/arm/plat-mxc/include/mach/iomux-vf6xx.h @@ -1,6 +1,8 @@ /* * based on arch/arm/plat-mxc/include/mach/iomux-mx6q.h * + * Copyright (C) 2012 Freescale Semiconductor, Inc. All Rights Reserved. + * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or @@ -24,79 +26,77 @@ #include <mach/iomux-vmvf.h> -#if 0 -/* - * various IOMUX alternate output functions (1-7) - */ -typedef enum iomux_config { - IOMUX_CONFIG_ALT0, - IOMUX_CONFIG_ALT1, - IOMUX_CONFIG_ALT2, - IOMUX_CONFIG_ALT3, - IOMUX_CONFIG_ALT4, - IOMUX_CONFIG_ALT5, - IOMUX_CONFIG_ALT6, - IOMUX_CONFIG_ALT7, - IOMUX_CONFIG_GPIO, /* added to help user use GPIO mode */ - } iomux_pin_cfg_t; - -#define VF6XX_CCM_CLK0_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ - PAD_CTL_PUS_47K_UP | PAD_CTL_SPEED_LOW | \ - PAD_CTL_DSE_80ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS) - -#define VF6XX_HIGH_DRV (PAD_CTL_DSE_120ohm) - -#define VF6XX_MLB150_PAD_CTRL (PAD_CTL_SPEED_LOW | \ - PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST) \ - -#define VF6XX_UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ - PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ - PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS) - -#define VF6XX_USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ - PAD_CTL_PUS_47K_UP | PAD_CTL_SPEED_LOW | \ - PAD_CTL_DSE_80ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS) - -#define VF6XX_USDHC_PAD_CTRL_50MHZ_40OHM (PAD_CTL_PKE | PAD_CTL_PUE | \ - PAD_CTL_PUS_47K_UP | PAD_CTL_SPEED_LOW | \ - PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS) - -#define VF6XX_USDHC_PAD_CTRL_100MHZ (PAD_CTL_PKE | PAD_CTL_PUE | \ - PAD_CTL_PUS_47K_UP | PAD_CTL_SPEED_MED | \ - PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS) - -#define VF6XX_USDHC_PAD_CTRL_200MHZ (PAD_CTL_PKE | PAD_CTL_PUE | \ - PAD_CTL_PUS_47K_UP | PAD_CTL_SPEED_HIGH | \ - PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS) - -#define VF6XX_ENET_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ - PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ - PAD_CTL_DSE_40ohm | PAD_CTL_HYS) - -#define VF6XX_GPIO_16_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ - PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ - PAD_CTL_DSE_40ohm | PAD_CTL_HYS) - -#define VF6XX_DISP_PAD_CLT VF6XX_HIGH_DRV - -#define VF6XX_I2C_PAD_CTRL (PAD_CTL_SRE_FAST | PAD_CTL_ODE | \ - PAD_CTL_PKE | PAD_CTL_PUE | PAD_CTL_DSE_40ohm | \ - PAD_CTL_PUS_100K_UP | PAD_CTL_HYS | PAD_CTL_SPEED_MED) - -#define VF6XX_ESAI_PAD_CTRL (PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \ - PAD_CTL_PKE | PAD_CTL_PUE | PAD_CTL_PUS_100K_UP) - -#define VF6XX_GPMI_PAD_CTRL0 (PAD_CTL_PKE | PAD_CTL_PUE | PAD_CTL_PUS_100K_UP) -#define VF6XX_GPMI_PAD_CTRL1 (PAD_CTL_DSE_40ohm | PAD_CTL_SPEED_MED | PAD_CTL_SRE_FAST) -#define VF6XX_GPMI_PAD_CTRL2 (VF6XX_GPMI_PAD_CTRL0 | VF6XX_GPMI_PAD_CTRL1) - -#define VF6XX_SPDIF_OUT_PAD_CTRL (PAD_CTL_DSE_120ohm | PAD_CTL_SRE_FAST) -#define VF6XX_USB_HSIC_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_PKE | PAD_CTL_PUE | \ - PAD_CTL_DSE_40ohm) - -#define VF6XX_ECSPI_PAD_CTRL (PAD_CTL_SRE_FAST | PAD_CTL_SPEED_MED | \ - PAD_CTL_DSE_40ohm | PAD_CTL_HYS) -#endif + + +#define VF6XX_PAD_CTRL_IBE \ + (MUX_CTL_PAD_SPEED_MED01 | MUX_CTL_PAD_SRE_FAST | \ + MUX_CTL_PAD_DSE_25ohm | MUX_CTL_PAD_PUS_100K_UP | \ + MUX_CTL_PAD_IBE ) + +#define VF6XX_PAD_CTRL_OBE \ + (MUX_CTL_PAD_SPEED_MED01 | MUX_CTL_PAD_SRE_FAST | \ + MUX_CTL_PAD_DSE_25ohm | MUX_CTL_PAD_PUS_100K_UP | \ + MUX_CTL_PAD_OBE ) + +#define VF6XX_PAD_CTRL_IOBE \ + (MUX_CTL_PAD_SPEED_MED01 | MUX_CTL_PAD_SRE_FAST | \ + MUX_CTL_PAD_DSE_25ohm | MUX_CTL_PAD_PUS_100K_UP | \ + MUX_CTL_PAD_OBE | MUX_CTL_PAD_IBE ) + +#define VF6XX_PAD_CTRL_JTDI \ + (MUX_CTL_PAD_SPEED_MED01 | MUX_CTL_PAD_SRE_FAST | \ + MUX_CTL_PAD_DSE_25ohm | MUX_CTL_PAD_PUS_100K_UP | \ + MUX_CTL_PAD_PKE | MUX_CTL_PAD_PUE | MUX_CTL_PAD_IBE ) + +#define VF6XX_PAD_CTRL_JTMS \ + (MUX_CTL_PAD_SPEED_MED01 | MUX_CTL_PAD_SRE_FAST | \ + MUX_CTL_PAD_DSE_25ohm | MUX_CTL_PAD_PUS_100K_UP | \ + MUX_CTL_PAD_PKE | MUX_CTL_PAD_PUE | MUX_CTL_PAD_OBE | \ + MUX_CTL_PAD_IBE ) + + /* from uboot */ +#define VF6XX_UBOOT_DDR_IOMUX \ + (MUX_CTL_PAD_DDR_INPUT_CMOS | MUX_CTL_PAD_DSE_25ohm) + +#define VF6XX_UBOOT_DDR_IOMUX1 \ + (MUX_CTL_PAD_DDR_INPUT_DIFF | MUX_CTL_PAD_DSE_25ohm) + +#define VF6XX_PAD_CTRL_UBOOT_CLKIN \ + (MUX_CTL_PAD_SPEED_HIGH | MUX_CTL_PAD_SRE_SLOW | \ + MUX_CTL_PAD_DSE_25ohm | MUX_CTL_PAD_PUS_47K_UP | \ + MUX_CTL_PAD_IBE ) + +#define VF6XX_PAD_CTRL_UBOOT_SDHC \ + (MUX_CTL_PAD_SPEED_HIGH | MUX_CTL_PAD_SRE_SLOW | \ + MUX_CTL_PAD_DSE_20ohm | MUX_CTL_PAD_PUS_100K_UP | \ + MUX_CTL_PAD_PKE | MUX_CTL_PAD_PUE | MUX_CTL_PAD_OBE | \ + MUX_CTL_PAD_IBE) + +#define VF6XX_PAD_CTRL_UBOOT_SCI_OBE \ + (MUX_CTL_PAD_SPEED_MED01 | MUX_CTL_PAD_SRE_SLOW | \ + MUX_CTL_PAD_DSE_25ohm | MUX_CTL_PAD_PUS_100K_UP | \ + MUX_CTL_PAD_OBE) + +#define VF6XX_PAD_CTRL_UBOOT_SCI_IBE \ + (MUX_CTL_PAD_SPEED_MED01 | MUX_CTL_PAD_SRE_SLOW | \ + MUX_CTL_PAD_DSE_25ohm | MUX_CTL_PAD_PUS_100K_UP | \ + MUX_CTL_PAD_IBE) + +#define VF6XX_PAD_CTRL_UBOOT_RMII_IBE \ + (MUX_CTL_PAD_SPEED_HIGH | MUX_CTL_PAD_SRE_SLOW | \ + MUX_CTL_PAD_DSE_25ohm | MUX_CTL_PAD_PUS_47K_UP | \ + MUX_CTL_PAD_IBE) + +#define VF6XX_PAD_CTRL_UBOOT_RMII_OBE \ + (MUX_CTL_PAD_SPEED_HIGH | MUX_CTL_PAD_SRE_SLOW | \ + MUX_CTL_PAD_DSE_25ohm | MUX_CTL_PAD_PUS_47K_UP | \ + MUX_CTL_PAD_OBE) + +#define VF6XX_PAD_CTRL_UBOOT_RMII_IOBE \ + (MUX_CTL_PAD_SPEED_HIGH | MUX_CTL_PAD_SRE_SLOW | \ + MUX_CTL_PAD_DSE_25ohm | MUX_CTL_PAD_PUS_47K_UP | \ + MUX_CTL_PAD_OBE | MUX_CTL_PAD_IBE) + #define _VF6XX_PAD_PAD_0__RGPIOC_GPIO0 \ IOMUX_PAD(0x0000, MUX_CTL_PAD_MUX_MODE_ALT0, 0x000, 0) @@ -1859,7 +1859,7 @@ typedef enum iomux_config { #define VF6XX_PAD_PAD_0__CCM_RMII_CLKOUT \ (_VF6XX_PAD_PAD_0__CCM_RMII_CLKOUT | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_0__CCM_RMII_CLKIN \ - (_VF6XX_PAD_PAD_0__CCM_RMII_CLKIN | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_0__CCM_RMII_CLKIN | MUX_CTRL_PAD(VF6XX_PAD_CTRL_UBOOT_CLKIN)) /* from uboot */ #define VF6XX_PAD_PAD_0__TCON1_TCON11 \ (_VF6XX_PAD_PAD_0__TCON1_TCON11 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_0__TCON1_DATA_OUT20 \ @@ -1868,7 +1868,7 @@ typedef enum iomux_config { #define VF6XX_PAD_PAD_1__RGPIOC_GPIO1 \ (_VF6XX_PAD_PAD_1__RGPIOC_GPIO1 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_1__DEBUG_TCLK \ - (_VF6XX_PAD_PAD_1__DEBUG_TCLK | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_1__DEBUG_TCLK | MUX_CTRL_PAD(VF6XX_PAD_CTRL_IBE)) #define VF6XX_PAD_PAD_1__TCON_DATA_OUT18 \ (_VF6XX_PAD_PAD_1__TCON0_DATA_OUT18 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_1__MLB_TOP_MLBCLK \ @@ -1877,7 +1877,7 @@ typedef enum iomux_config { #define VF6XX_PAD_PAD_2__RGPIOC_GPIO2 \ (_VF6XX_PAD_PAD_2__RGPIOC_GPIO2 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_2__DEBUG_TDI \ - (_VF6XX_PAD_PAD_2__DEBUG_TDI | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_2__DEBUG_TDI | MUX_CTRL_PAD(VF6XX_PAD_CTRL_JTDI)) #define VF6XX_PAD_PAD_2__CCM_RMII_CLKOUT \ (_VF6XX_PAD_PAD_2__CCM_RMII_CLKOUT | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_2__CCM_RMII_CLKIN \ @@ -1890,7 +1890,7 @@ typedef enum iomux_config { #define VF6XX_PAD_PAD_3__RGPIOC_GPIO3 \ (_VF6XX_PAD_PAD_3__RGPIOC_GPIO3 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_3__DEBUG_TDO \ - (_VF6XX_PAD_PAD_3__DEBUG_TDO | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_3__DEBUG_TDO | MUX_CTRL_PAD(VF6XX_PAD_CTRL_OBE)) #define VF6XX_PAD_PAD_3__CCM_EXT_AUDIO_MCLK \ (_VF6XX_PAD_PAD_3__CCM_EXT_AUDIO_MCLK | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_3__TCON0_DATA_OUT10 \ @@ -1903,7 +1903,7 @@ typedef enum iomux_config { #define VF6XX_PAD_PAD_4__RGPIOC_GPIO4 \ (_VF6XX_PAD_PAD_4__RGPIOC_GPIO4 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_4__DEBUG_TMS \ - (_VF6XX_PAD_PAD_4__DEBUG_TMS | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_4__DEBUG_TMS | MUX_CTRL_PAD(VF6XX_PAD_CTRL_JTMS)) #define VF6XX_PAD_PAD_4__TCON0_DATA_OUT11 \ (_VF6XX_PAD_PAD_4__TCON0_DATA_OUT11 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_4__MLB_TOP_MLB_DATA \ @@ -1912,7 +1912,7 @@ typedef enum iomux_config { #define VF6XX_PAD_PAD_5__RGPIOC_GPIO5 \ (_VF6XX_PAD_PAD_5__RGPIOC_GPIO5 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_5__PLATFORM_TRACECK \ - (_VF6XX_PAD_PAD_5__PLATFORM_TRACECK | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_5__PLATFORM_TRACECK | MUX_CTRL_PAD(VF6XX_PAD_CTRL_IOBE)) #define VF6XX_PAD_PAD_5__CCM_EXT_AUDIO_MCLK \ (_VF6XX_PAD_PAD_5__CCM_EXT_AUDIO_MCLK | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_5__VIDEO_IN0_DATA13 \ @@ -1923,7 +1923,7 @@ typedef enum iomux_config { #define VF6XX_PAD_PAD_6__RGPIOC_GPIO6 \ (_VF6XX_PAD_PAD_6__RGPIOC_GPIO6 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_6__PLATFORM_TRACED0 \ - (_VF6XX_PAD_PAD_6__PLATFORM_TRACED0 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_6__PLATFORM_TRACED0 | MUX_CTRL_PAD(VF6XX_PAD_CTRL_IOBE)) #define VF6XX_PAD_PAD_6__USB_VBUS_EN_OTG \ (_VF6XX_PAD_PAD_6__USB_VBUS_EN_OTG | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_6__ADC1_DA_ADC1SE0 \ @@ -1931,7 +1931,7 @@ typedef enum iomux_config { #define VF6XX_PAD_PAD_6__LCD_64F6B_LCD29 \ (_VF6XX_PAD_PAD_6__LCD_64F6B_LCD29 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_6__SAI2_TX_BCLK \ - (_VF6XX_PAD_PAD_6__SAI2_TX_BCLK | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_6__SAI2_TX_BCLK | MUX_CTRL_PAD(VF6XX_PAD_CTRL_IOBE)) #define VF6XX_PAD_PAD_6__VIDEO_IN0_DATA14 \ (_VF6XX_PAD_PAD_6__VIDEO_IN0_DATA14 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_6__I2C0_SDA \ @@ -1940,7 +1940,7 @@ typedef enum iomux_config { #define VF6XX_PAD_PAD_7__RGPIOC_GPIO7 \ (_VF6XX_PAD_PAD_7__RGPIOC_GPIO7 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_7__PLATFORM_TRACED1 \ - (_VF6XX_PAD_PAD_7__PLATFORM_TRACED1 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_7__PLATFORM_TRACED1 | MUX_CTRL_PAD(VF6XX_PAD_CTRL_IOBE)) #define VF6XX_PAD_PAD_7__USB_VBUS_OC_OTG \ (_VF6XX_PAD_PAD_7__USB_VBUS_OC_OTG | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_7__ADC1_DA_ADC1SE1 \ @@ -1957,7 +1957,7 @@ typedef enum iomux_config { #define VF6XX_PAD_PAD_8__RGPIOC_GPIO7 \ (_VF6XX_PAD_PAD_8__RGPIOC_GPIO7 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_8__PLATFORM_TRACED2 \ - (_VF6XX_PAD_PAD_8__PLATFORM_TRACED2 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_8__PLATFORM_TRACED2 | MUX_CTRL_PAD(VF6XX_PAD_CTRL_IOBE)) #define VF6XX_PAD_PAD_8__ADC0_DA_ADC0SE0 \ (_VF6XX_PAD_PAD_8__ADC0_DA_ADC0SE0 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_8__FLEXTIMER1_QD_PHA \ @@ -1965,7 +1965,7 @@ typedef enum iomux_config { #define VF6XX_PAD_PAD_8__LCD_64F6B_LCD31 \ (_VF6XX_PAD_PAD_8__LCD_64F6B_LCD31 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_8__SAI2_TX_DATA \ - (_VF6XX_PAD_PAD_8__SAI2_TX_DATA | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_8__SAI2_TX_DATA | MUX_CTRL_PAD(VF6XX_PAD_CTRL_OBE)) #define VF6XX_PAD_PAD_8__VIDEO_IN0_DATA16 \ (_VF6XX_PAD_PAD_8__VIDEO_IN0_DATA16 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_8__I2C1_SDA \ @@ -1974,7 +1974,7 @@ typedef enum iomux_config { #define VF6XX_PAD_PAD_9__RGPIOC_GPIO9 \ (_VF6XX_PAD_PAD_9__RGPIOC_GPIO9 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_9__PLATFORM_TRACED3 \ - (_VF6XX_PAD_PAD_9__PLATFORM_TRACED3 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_9__PLATFORM_TRACED3 | MUX_CTRL_PAD(VF6XX_PAD_CTRL_IOBE)) #define VF6XX_PAD_PAD_9__ADC0_DA_ADC0SE1 \ (_VF6XX_PAD_PAD_9__ADC0_DA_ADC0SE1 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_9__FLEXTIMER1_QD_PHB \ @@ -1982,16 +1982,16 @@ typedef enum iomux_config { #define VF6XX_PAD_PAD_9__LCD_64F6B_LCD32 \ (_VF6XX_PAD_PAD_9__LCD_64F6B_LCD32 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_9__SAI2_TX_SYNC \ - (_VF6XX_PAD_PAD_9__SAI2_TX_SYNC | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_9__SAI2_TX_SYNC | MUX_CTRL_PAD(VF6XX_PAD_CTRL_IOBE)) #define VF6XX_PAD_PAD_9__VIDEO_IN0_DATA17 \ (_VF6XX_PAD_PAD_9__VIDEO_IN0_DATA17 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_9__QUADSPI1_QSCK_A \ (_VF6XX_PAD_PAD_9__QUADSPI1_QSCK_A | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_10__RGPIOC_GPIO10 \ - (_VF6XX_PAD_PAD_10__RGPIOC_GPIO10 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_10__RGPIOC_GPIO10 | MUX_CTRL_PAD(VF6XX_PAD_CTRL_IOBE)) #define VF6XX_PAD_PAD_10__PLATFORM_TRACED4 \ - (_VF6XX_PAD_PAD_10__PLATFORM_TRACED4 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_10__PLATFORM_TRACED4 | MUX_CTRL_PAD(VF6XX_PAD_CTRL_IOBE)) #define VF6XX_PAD_PAD_10__LCD_64F6B_LCD33 \ (_VF6XX_PAD_PAD_10__LCD_64F6B_LCD33 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_10__SCI_FLX3_TX \ @@ -2002,9 +2002,9 @@ typedef enum iomux_config { #define VF6XX_PAD_PAD_11__RGPIOC_GPIO11 \ (_VF6XX_PAD_PAD_11__RGPIOC_GPIO11 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_11__PLATFORM_TRACED5 \ - (_VF6XX_PAD_PAD_11__PLATFORM_TRACED5 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_11__PLATFORM_TRACED5 | MUX_CTRL_PAD(VF6XX_PAD_CTRL_IOBE)) #define VF6XX_PAD_PAD_11__SAI2_RX_BCLK \ - (_VF6XX_PAD_PAD_11__SAI2_RX_BCLK | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_11__SAI2_RX_BCLK | MUX_CTRL_PAD(VF6XX_PAD_CTRL_IOBE)) #define VF6XX_PAD_PAD_11__SCI_FLX3_RX \ (_VF6XX_PAD_PAD_11__SCI_FLX3_RX | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_11__TCON1_TCON2 \ @@ -2013,9 +2013,9 @@ typedef enum iomux_config { #define VF6XX_PAD_PAD_12__RGPIOC_GPIO12 \ (_VF6XX_PAD_PAD_12__RGPIOC_GPIO12 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_12__PLATFORM_TRACED6 \ - (_VF6XX_PAD_PAD_12__PLATFORM_TRACED6 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_12__PLATFORM_TRACED6 | MUX_CTRL_PAD(VF6XX_PAD_CTRL_IOBE)) #define VF6XX_PAD_PAD_12__SAI2_RX_DATA \ - (_VF6XX_PAD_PAD_12__SAI2_RX_DATA | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_12__SAI2_RX_DATA | MUX_CTRL_PAD(VF6XX_PAD_CTRL_IBE)) #define VF6XX_PAD_PAD_12__I2C2_SCL \ (_VF6XX_PAD_PAD_12__I2C2_SCL | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_12__TCON1_TCON0 \ @@ -2024,9 +2024,9 @@ typedef enum iomux_config { #define VF6XX_PAD_PAD_13__RGPIOC_GPIO13 \ (_VF6XX_PAD_PAD_13__RGPIOC_GPIO13 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_13__PLATFORM_TRACED7 \ - (_VF6XX_PAD_PAD_13__PLATFORM_TRACED7 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_13__PLATFORM_TRACED7 | MUX_CTRL_PAD(VF6XX_PAD_CTRL_IOBE)) #define VF6XX_PAD_PAD_13__SAI2_RX_SYNC \ - (_VF6XX_PAD_PAD_13__SAI2_RX_SYNC | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_13__SAI2_RX_SYNC | MUX_CTRL_PAD(VF6XX_PAD_CTRL_IOBE)) #define VF6XX_PAD_PAD_13__I2C2_SDA \ (_VF6XX_PAD_PAD_13__I2C2_SDA | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_13__TCON1_TCON3 \ @@ -2034,45 +2034,46 @@ typedef enum iomux_config { #define VF6XX_PAD_PAD_14__RGPIOC_GPIO14 \ (_VF6XX_PAD_PAD_14__RGPIOC_GPIO14 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_14__PLATFORM_TRACED8 \ - (_VF6XX_PAD_PAD_14__PLATFORM_TRACED8 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_14__PLATFORM_TRACED8 | MUX_CTRL_PAD(VF6XX_PAD_CTRL_IOBE)) #define VF6XX_PAD_PAD_14__USB_VBUS_EN \ (_VF6XX_PAD_PAD_14__USB_VBUS_EN | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_14__ESDHC1_CLK \ - (_VF6XX_PAD_PAD_14__ESDHC1_CLK | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_14__ESDHC1_CLK | MUX_CTRL_PAD(VF6XX_PAD_CTRL_UBOOT_SDHC)) /* from uboot */ #define VF6XX_PAD_PAD_14__TCON1_TCON4 \ (_VF6XX_PAD_PAD_14__TCON1_TCON4 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_14__DDR_TEST_LOGIC_PAD_CTRL \ - (_VF6XX_PAD_PAD_14__DDR_TEST_LOGIC_PAD_CTRL | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_14__DDR_TEST_LOGIC_PAD_CTRL | MUX_CTRL_PAD(NO_PAD_CTRL)) + #define VF6XX_PAD_PAD_15__RGPIOC_GPIO15 \ (_VF6XX_PAD_PAD_15__RGPIOC_GPIO15 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_15__PLATFORM_TRACED9 \ - (_VF6XX_PAD_PAD_15__PLATFORM_TRACED9 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_15__PLATFORM_TRACED9 | MUX_CTRL_PAD(VF6XX_PAD_CTRL_IOBE)) #define VF6XX_PAD_PAD_15__USB_VBUS_OC \ (_VF6XX_PAD_PAD_15__USB_VBUS_OC | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_15__ESDHC1_CMD \ - (_VF6XX_PAD_PAD_15__ESDHC1_CMD | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_15__ESDHC1_CMD | MUX_CTRL_PAD(VF6XX_PAD_CTRL_UBOOT_SDHC)) /* from uboot */ #define VF6XX_PAD_PAD_15__TCON1_TCON5 \ (_VF6XX_PAD_PAD_15__TCON1_TCON5 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_16__RGPIOC_GPIO16 \ (_VF6XX_PAD_PAD_16__RGPIOC_GPIO16 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_16__PLATFORM_TRACED10 \ - (_VF6XX_PAD_PAD_16__PLATFORM_TRACED10 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_16__PLATFORM_TRACED10 | MUX_CTRL_PAD(VF6XX_PAD_CTRL_IOBE)) #define VF6XX_PAD_PAD_16__SAI3_TX_BCLK \ (_VF6XX_PAD_PAD_16__SAI3_TX_BCLK | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_16__ESDHC1_DAT0 \ - (_VF6XX_PAD_PAD_16__ESDHC1_DAT0 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_16__ESDHC1_DAT0 | MUX_CTRL_PAD(VF6XX_PAD_CTRL_UBOOT_SDHC)) /* from uboot */ #define VF6XX_PAD_PAD_16__TCON1_TCON6 \ (_VF6XX_PAD_PAD_16__TCON1_TCON6 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_17__RGPIOC_GPIO17 \ (_VF6XX_PAD_PAD_17__RGPIOC_GPIO17 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_17__PLATFORM_TRACED11 \ - (_VF6XX_PAD_PAD_17__PLATFORM_TRACED11 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_17__PLATFORM_TRACED11 | MUX_CTRL_PAD(VF6XX_PAD_CTRL_IOBE)) #define VF6XX_PAD_PAD_17__SAI3_RX_BCLK \ (_VF6XX_PAD_PAD_17__SAI3_RX_BCLK | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_17__ESDHC1_DAT1 \ - (_VF6XX_PAD_PAD_17__ESDHC1_DAT1 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_17__ESDHC1_DAT1 | MUX_CTRL_PAD(VF6XX_PAD_CTRL_UBOOT_SDHC)) /* from uboot */ #define VF6XX_PAD_PAD_17__TCON1_TCON7 \ (_VF6XX_PAD_PAD_17__TCON1_TCON7 | MUX_CTRL_PAD(NO_PAD_CTRL)) @@ -2084,11 +2085,11 @@ typedef enum iomux_config { (_VF6XX_PAD_PAD_18__SAI3_RX_DATA | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_18__ENET_SWIAHB_MAC1_TMR0 \ (_VF6XX_PAD_PAD_18__ENET_SWIAHB_MAC1_TMR0 | \ - MUX_CTRL_PAD(NO_PAD_CTRL)) + MUX_CTRL_PAD(VF6XX_PAD_CTRL_IOBE)) #define VF6XX_PAD_PAD_18__SCI_FLX_TX \ (_VF6XX_PAD_PAD_18__SCI_FLX_TX | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_18__ESDHC1_DAT2 \ - (_VF6XX_PAD_PAD_18__ESDHC1_DAT2 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_18__ESDHC1_DAT2 | MUX_CTRL_PAD(VF6XX_PAD_CTRL_UBOOT_SDHC)) /* from uboot */ #define VF6XX_PAD_PAD_18__TCON1_TCON8 \ (_VF6XX_PAD_PAD_18__TCON1_TCON8 | MUX_CTRL_PAD(NO_PAD_CTRL)) @@ -2100,23 +2101,23 @@ typedef enum iomux_config { (_VF6XX_PAD_PAD_19__SAI3_TX_DATA | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_19__ENET_SWIAHB_MAC1_TMR1 \ (_VF6XX_PAD_PAD_19__ENET_SWIAHB_MAC1_TMR1 | \ - MUX_CTRL_PAD(NO_PAD_CTRL)) + MUX_CTRL_PAD(VF6XX_PAD_CTRL_IOBE)) #define VF6XX_PAD_PAD_19__SCI_FLX4_RX \ (_VF6XX_PAD_PAD_19__SCI_FLX4_RX | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_19__ESDHC1_DAT3 \ - (_VF6XX_PAD_PAD_19__ESDHC1_DAT3 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_19__ESDHC1_DAT3 | MUX_CTRL_PAD(VF6XX_PAD_CTRL_UBOOT_SDHC)) /* from uboot */ #define VF6XX_PAD_PAD_19__TCON1_TCON9 \ (_VF6XX_PAD_PAD_19__TCON1_TCON9 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_20__RGPIOC_GPIO20 \ - (_VF6XX_PAD_PAD_20__RGPIOC_GPIO20 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_20__RGPIOC_GPIO20 | MUX_CTRL_PAD(VF6XX_PAD_CTRL_IOBE)) #define VF6XX_PAD_PAD_20__PLATFORM_TRACED14 \ (_VF6XX_PAD_PAD_20__PLATFORM_TRACED14 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_20__SAI3_RX_SYNC \ (_VF6XX_PAD_PAD_20__SAI3_RX_SYNC | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_20__ENET_SWIAHB_MAC1_TMR2 \ (_VF6XX_PAD_PAD_20__ENET_SWIAHB_MAC1_TMR2 | \ - MUX_CTRL_PAD(NO_PAD_CTRL)) + MUX_CTRL_PAD(VF6XX_PAD_CTRL_IOBE)) #define VF6XX_PAD_PAD_20__SCI_FLX4_RTS \ (_VF6XX_PAD_PAD_20__SCI_FLX4_RTS | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_20__I2C3_SCL \ @@ -2125,14 +2126,14 @@ typedef enum iomux_config { (_VF6XX_PAD_PAD_20__SCI_FLX3_RTS | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_21__RGPIOC_GPIO21 \ - (_VF6XX_PAD_PAD_21__RGPIOC_GPIO21 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_21__RGPIOC_GPIO21 | MUX_CTRL_PAD(VF6XX_PAD_CTRL_IOBE)) #define VF6XX_PAD_PAD_21__PLATFORM_TRACED15 \ (_VF6XX_PAD_PAD_21__PLATFORM_TRACED15 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_21__SAI3_TX_SYNC \ (_VF6XX_PAD_PAD_21__SAI3_TX_SYNC | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_21__ENET_SWIAHB_MAC1_TMR3 \ (_VF6XX_PAD_PAD_21__ENET_SWIAHB_MAC1_TMR3 | \ - MUX_CTRL_PAD(NO_PAD_CTRL)) + MUX_CTRL_PAD(VF6XX_PAD_CTRL_IOBE)) #define VF6XX_PAD_PAD_21__SCI_FLX4_CTS \ (_VF6XX_PAD_PAD_21__SCI_FLX4_CTS | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_21__I2C3_SDA \ @@ -2143,7 +2144,7 @@ typedef enum iomux_config { #define VF6XX_PAD_PAD_22__RGPIOC_GPIO22 \ (_VF6XX_PAD_PAD_22__RGPIOC_GPIO22 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_22__FLEXTIMER0_CH0 \ - (_VF6XX_PAD_PAD_22__FLEXTIMER0_CH0 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_22__FLEXTIMER0_CH0 | MUX_CTRL_PAD(VF6XX_PAD_CTRL_IOBE)) #define VF6XX_PAD_PAD_22__ADC0_DA_ADC0SE2 \ (_VF6XX_PAD_PAD_22__ADC0_DA_ADC0SE2 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_22__PLATFORM_TRACECTL \ @@ -2160,7 +2161,7 @@ typedef enum iomux_config { #define VF6XX_PAD_PAD_23__RGPIOC_GPIO23 \ (_VF6XX_PAD_PAD_23__RGPIOC_GPIO23 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_23__FLEXTIMER0_CH1 \ - (_VF6XX_PAD_PAD_23__FLEXTIMER0_CH1 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_23__FLEXTIMER0_CH1 | MUX_CTRL_PAD(VF6XX_PAD_CTRL_IOBE)) #define VF6XX_PAD_PAD_23__ADC0_DA_ADC0SE3 \ (_VF6XX_PAD_PAD_23__ADC0_DA_ADC0SE3 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_23__SRC_RCON30 \ @@ -2177,7 +2178,7 @@ typedef enum iomux_config { #define VF6XX_PAD_PAD_24__RGPIOC_GPIO24 \ (_VF6XX_PAD_PAD_24__RGPIOC_GPIO24 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_24__FLEXTIMER0_CH2 \ - (_VF6XX_PAD_PAD_24__FLEXTIMER0_CH2 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_24__FLEXTIMER0_CH2 | MUX_CTRL_PAD(VF6XX_PAD_CTRL_IOBE)) #define VF6XX_PAD_PAD_24__ADC1_DA_ADC1SE2 \ (_VF6XX_PAD_PAD_24__ADC1_DA_ADC1SE2 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_24__SRC_RCON31 \ @@ -2194,7 +2195,7 @@ typedef enum iomux_config { #define VF6XX_PAD_PAD_25__RGPIOC_GPIO25 \ (_VF6XX_PAD_PAD_25__RGPIOC_GPIO25 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_25__FLEXTIMER0_CH3 \ - (_VF6XX_PAD_PAD_25__FLEXTIMER0_CH3 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_25__FLEXTIMER0_CH3 | MUX_CTRL_PAD(VF6XX_PAD_CTRL_IOBE)) #define VF6XX_PAD_PAD_25__ADC1_DA_ADC1SE3 \ (_VF6XX_PAD_PAD_25__ADC1_DA_ADC1SE3 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_25__PDB_EXTRING \ @@ -2211,7 +2212,7 @@ typedef enum iomux_config { #define VF6XX_PAD_PAD_26__FLEXTIMER0_CH4 \ (_VF6XX_PAD_PAD_26__FLEXTIMER0_CH4 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_26__SCI_FLX1_TX \ - (_VF6XX_PAD_PAD_26__SCI_FLX1_TX | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_26__SCI_FLX1_TX | MUX_CTRL_PAD(VF6XX_PAD_CTRL_UBOOT_SCI_OBE)) /* from uboot */ #define VF6XX_PAD_PAD_26__ADC0_DA_ADC0SE4 \ (_VF6XX_PAD_PAD_26__ADC0_DA_ADC0SE4 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_26__LCD_64F6B_LCD38 \ @@ -2229,7 +2230,7 @@ typedef enum iomux_config { #define VF6XX_PAD_PAD_27__FLEXTIMER0_CH5 \ (_VF6XX_PAD_PAD_27__FLEXTIMER0_CH5 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_27__SCI_FLX1_RX \ - (_VF6XX_PAD_PAD_27__SCI_FLX1_RX | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_27__SCI_FLX1_RX | MUX_CTRL_PAD(VF6XX_PAD_CTRL_UBOOT_SCI_IBE)) /* from uboot */ #define VF6XX_PAD_PAD_27__ADC1_DA_ADC1SE4 \ (_VF6XX_PAD_PAD_27__ADC1_DA_ADC1SE4 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_27__LCD_64F6B_LCD39 \ @@ -2242,11 +2243,11 @@ typedef enum iomux_config { (_VF6XX_PAD_PAD_27__QUADSPI1_DQS_A | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_28__RGPIOC_GPIO28 \ - (_VF6XX_PAD_PAD_28__RGPIOC_GPIO28 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_28__RGPIOC_GPIO28 | MUX_CTRL_PAD(VF6XX_PAD_CTRL_IOBE)) #define VF6XX_PAD_PAD_28__FLEXTIMER0_CH6 \ (_VF6XX_PAD_PAD_28__FLEXTIMER0_CH6 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_28__SCI_FLX1_RTS \ - (_VF6XX_PAD_PAD_28__SCI_FLX1_RTS | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_28__SCI_FLX1_RTS | MUX_CTRL_PAD(VF6XX_PAD_CTRL_UBOOT_SCI_OBE)) /* from uboot */ #define VF6XX_PAD_PAD_28__QUADSPI0_QPCS1_A \ (_VF6XX_PAD_PAD_28__QUADSPI0_QPCS1_A | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_28__LCD_64F6B_LCD40 \ @@ -2259,11 +2260,11 @@ typedef enum iomux_config { (_VF6XX_PAD_PAD_28__SCI_FLX2_TX | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_29__RGPIOC_GPIO29 \ - (_VF6XX_PAD_PAD_29__RGPIOC_GPIO29 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_29__RGPIOC_GPIO29 | MUX_CTRL_PAD(VF6XX_PAD_CTRL_IOBE)) #define VF6XX_PAD_PAD_29__FLEXTIMER0_CH7 \ (_VF6XX_PAD_PAD_29__FLEXTIMER0_CH7 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_29__SCI_FLX1_CTS \ - (_VF6XX_PAD_PAD_29__SCI_FLX1_CTS | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_29__SCI_FLX1_CTS | MUX_CTRL_PAD(VF6XX_PAD_CTRL_UBOOT_SCI_IBE)) /* from uboot */ #define VF6XX_PAD_PAD_29__QUADSPI0_QPCS1_B \ (_VF6XX_PAD_PAD_29__QUADSPI0_QPCS1_B | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_29__LCD_64F6B_LCD41 \ @@ -2274,9 +2275,9 @@ typedef enum iomux_config { (_VF6XX_PAD_PAD_29__SCI_FLX2_RX | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_30__RGPIOC_GPIO30 \ - (_VF6XX_PAD_PAD_30__RGPIOC_GPIO30 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_30__RGPIOC_GPIO30 | MUX_CTRL_PAD(VF6XX_PAD_CTRL_IOBE)) #define VF6XX_PAD_PAD_30__FLEXTIMER1_CH0 \ - (_VF6XX_PAD_PAD_30__FLEXTIMER1_CH0 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_30__FLEXTIMER1_CH0 | MUX_CTRL_PAD(VF6XX_PAD_CTRL_IOBE)) #define VF6XX_PAD_PAD_30__FLEXTIMER0_QD_PHA \ (_VF6XX_PAD_PAD_30__FLEXTIMER0_QD_PHA | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_30__VIDEO_IN0_VIU_DE \ @@ -2285,31 +2286,31 @@ typedef enum iomux_config { (_VF6XX_PAD_PAD_30__TCON1_DATA_OUT24 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_31__RGPIOC_GPIO31 \ - (_VF6XX_PAD_PAD_31__RGPIOC_GPIO31 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_31__RGPIOC_GPIO31 | MUX_CTRL_PAD(VF6XX_PAD_CTRL_IOBE)) #define VF6XX_PAD_PAD_31__FLEXTIMER1_CH1 \ - (_VF6XX_PAD_PAD_31__FLEXTIMER1_CH1 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_31__FLEXTIMER1_CH1 | MUX_CTRL_PAD(VF6XX_PAD_CTRL_IOBE)) #define VF6XX_PAD_PAD_31__FLEXTIMER1_QD_PHB \ (_VF6XX_PAD_PAD_31__FLEXTIMER1_QD_PHB | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_31__TCON1_DATA_OUT25 \ (_VF6XX_PAD_PAD_31__TCON1_DATA_OUT25 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_32__RGPIOC_GPIO32 \ - (_VF6XX_PAD_PAD_32__RGPIOC_GPIO32 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_32__RGPIOC_GPIO32 | MUX_CTRL_PAD(VF6XX_PAD_CTRL_IOBE)) #define VF6XX_PAD_PAD_32__SCI_FLX0_TX \ - (_VF6XX_PAD_PAD_32__SCI_FLX0_TX | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_32__SCI_FLX0_TX | MUX_CTRL_PAD(VF6XX_PAD_CTRL_UBOOT_SCI_OBE)) /* from uboot */ #define VF6XX_PAD_PAD_32__TCON0_TCON4 \ (_VF6XX_PAD_PAD_32__TCON0_TCON4 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_32__VIDEO_IN0_VIU_DE \ (_VF6XX_PAD_PAD_32__VIDEO_IN0_VIU_DE | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_32__CCM_CKO1 \ - (_VF6XX_PAD_PAD_32__CCM_CKO1 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_32__CCM_CKO1 | MUX_CTRL_PAD(VF6XX_PAD_CTRL_IOBE)) #define VF6XX_PAD_PAD_32__CCM_ENET_TS_CLKIN \ (_VF6XX_PAD_PAD_32__CCM_ENET_TS_CLKIN | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_33__RGPIOC_GPIO33 \ - (_VF6XX_PAD_PAD_33__RGPIOC_GPIO33 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_33__RGPIOC_GPIO33 | MUX_CTRL_PAD(VF6XX_PAD_CTRL_IOBE)) #define VF6XX_PAD_PAD_33__SCI_FLX0_RX \ - (_VF6XX_PAD_PAD_33__SCI_FLX0_RX | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_33__SCI_FLX0_RX | MUX_CTRL_PAD(VF6XX_PAD_CTRL_UBOOT_SCI_IBE)) /* from uboot */ #define VF6XX_PAD_PAD_33__TCON0_TCON5 \ (_VF6XX_PAD_PAD_33__TCON0_TCON5 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_33__SNVS_LP_WRAPPER_SNVS_ALARM_OUT \ @@ -2319,10 +2320,10 @@ typedef enum iomux_config { (_VF6XX_PAD_PAD_33__CCM_CKO2 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_33__ENET_SWIAHB_MAC0_TMR0 \ (_VF6XX_PAD_PAD_33__ENET_SWIAHB_MAC0_TMR0 | \ - MUX_CTRL_PAD(NO_PAD_CTRL)) + MUX_CTRL_PAD(VF6XX_PAD_CTRL_IOBE)) #define VF6XX_PAD_PAD_34__RGPIOC_GPIO34 \ - (_VF6XX_PAD_PAD_34__RGPIOC_GPIO34 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_34__RGPIOC_GPIO34 | MUX_CTRL_PAD(VF6XX_PAD_CTRL_IOBE)) #define VF6XX_PAD_PAD_34__SCI_FLX0_RTS \ (_VF6XX_PAD_PAD_34__SCI_FLX0_RTS | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_34__DSPI0_CS5 \ @@ -2333,7 +2334,7 @@ typedef enum iomux_config { (_VF6XX_PAD_PAD_34__PLATFORM_FB_AD1 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_34__ENET_SWIAHB_MAC0_TMR1 \ (_VF6XX_PAD_PAD_34__ENET_SWIAHB_MAC0_TMR1 | \ - MUX_CTRL_PAD(NO_PAD_CTRL)) + MUX_CTRL_PAD(VF6XX_PAD_CTRL_IOBE)) #define VF6XX_PAD_PAD_35__RGPIOC_GPIO35 \ (_VF6XX_PAD_PAD_35__RGPIOC_GPIO35 | MUX_CTRL_PAD(NO_PAD_CTRL)) @@ -2346,14 +2347,14 @@ typedef enum iomux_config { #define VF6XX_PAD_PAD_35__PLATFORM_FB_AD0 \ (_VF6XX_PAD_PAD_35__PLATFORM_FB_AD0 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_35__PLATFORM_TRACETL \ - (_VF6XX_PAD_PAD_35__PLATFORM_TRACETL | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_35__PLATFORM_TRACETL | MUX_CTRL_PAD(VF6XX_PAD_CTRL_OBE)) #define VF6XX_PAD_PAD_36__RGPIOC_GPIO36 \ (_VF6XX_PAD_PAD_36__RGPIOC_GPIO36 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_36__CAN0_RXD \ - (_VF6XX_PAD_PAD_36__CAN0_RXD | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_36__CAN0_RXD | MUX_CTRL_PAD(VF6XX_PAD_CTRL_IBE)) #define VF6XX_PAD_PAD_36__I2C0_SCL \ - (_VF6XX_PAD_PAD_36__I2C0_SCL | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_36__I2C0_SCL | MUX_CTRL_PAD(VF6XX_PAD_CTRL_IOBE)) #define VF6XX_PAD_PAD_36__TCON0_TCON8 \ (_VF6XX_PAD_PAD_36__TCON0_TCON8 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_36__TCON1_DATA_OUT1 \ @@ -2362,27 +2363,27 @@ typedef enum iomux_config { #define VF6XX_PAD_PAD_37__RGPIOC_GPIO37 \ (_VF6XX_PAD_PAD_37__RGPIOC_GPIO37 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_37__CAN0_TXD \ - (_VF6XX_PAD_PAD_37__CAN0_TXD | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_37__CAN0_TXD | MUX_CTRL_PAD(VF6XX_PAD_CTRL_OBE)) #define VF6XX_PAD_PAD_37__I2C0_SDA \ - (_VF6XX_PAD_PAD_37__I2C0_SDA | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_37__I2C0_SDA | MUX_CTRL_PAD(VF6XX_PAD_CTRL_IOBE)) #define VF6XX_PAD_PAD_37__TCON0_TCON9 \ (_VF6XX_PAD_PAD_37__TCON0_TCON9 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_37__VIDEO_IN0_PIX_CLK \ (_VF6XX_PAD_PAD_37__VIDEO_IN0_PIX_CLK | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_38__RGPIOC_GPIO38 \ - (_VF6XX_PAD_PAD_38__RGPIOC_GPIO38 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_38__RGPIOC_GPIO38 | MUX_CTRL_PAD(VF6XX_PAD_CTRL_IOBE)) #define VF6XX_PAD_PAD_38__CAN1_RXD \ - (_VF6XX_PAD_PAD_38__CAN1_RXD | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_38__CAN1_RXD | MUX_CTRL_PAD(VF6XX_PAD_CTRL_IBE)) #define VF6XX_PAD_PAD_38__I2C1_SCL \ (_VF6XX_PAD_PAD_38__I2C1_SCL | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_38__TCON0_TCON10 \ (_VF6XX_PAD_PAD_38__TCON0_TCON10 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_39__RGPIOC_GPIO39 \ - (_VF6XX_PAD_PAD_39__RGPIOC_GPIO39 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_39__RGPIOC_GPIO39 | MUX_CTRL_PAD(VF6XX_PAD_CTRL_IOBE)) #define VF6XX_PAD_PAD_39__CAN1_TXD \ - (_VF6XX_PAD_PAD_39__CAN1_TXD | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_39__CAN1_TXD | MUX_CTRL_PAD(VF6XX_PAD_CTRL_OBE)) #define VF6XX_PAD_PAD_39__I2C1_SDA \ (_VF6XX_PAD_PAD_39__I2C1_SDA | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_39__TCON0_TCON11 \ @@ -2393,7 +2394,7 @@ typedef enum iomux_config { #define VF6XX_PAD_PAD_40__DSPI0_CS1 \ (_VF6XX_PAD_PAD_40__DSPI0_CS1 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_40__CCM_EXT_AUDIO_MCLK \ - (_VF6XX_PAD_PAD_40__CCM_EXT_AUDIO_MCLK | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_40__CCM_EXT_AUDIO_MCLK | MUX_CTRL_PAD(VF6XX_PAD_CTRL_IOBE)) #define VF6XX_PAD_PAD_40__VIDEO_IN0_DATA9 \ (_VF6XX_PAD_PAD_40__VIDEO_IN0_DATA9 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_40__CCM_CCMOBS0 \ @@ -2402,7 +2403,7 @@ typedef enum iomux_config { #define VF6XX_PAD_PAD_41__RGPIOC_GPIO41 \ (_VF6XX_PAD_PAD_41__RGPIOC_GPIO41 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_41__DSPI0_CS0 \ - (_VF6XX_PAD_PAD_41__DSPI0_CS0 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_41__DSPI0_CS0 | MUX_CTRL_PAD(VF6XX_PAD_CTRL_IOBE)) #define VF6XX_PAD_PAD_41__VIDEO_IN0_DATA10 \ (_VF6XX_PAD_PAD_41__VIDEO_IN0_DATA10 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_41__CCM_CCMOBS1 \ @@ -2411,7 +2412,7 @@ typedef enum iomux_config { #define VF6XX_PAD_PAD_42__RGPIOC_GPIO42 \ (_VF6XX_PAD_PAD_42__RGPIOC_GPIO42 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_42__DSPI0_SIN \ - (_VF6XX_PAD_PAD_42__DSPI0_SIN | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_42__DSPI0_SIN | MUX_CTRL_PAD(VF6XX_PAD_CTRL_IBE)) #define VF6XX_PAD_PAD_42__LCD_64F6B_LCD42 \ (_VF6XX_PAD_PAD_42__LCD_64F6B_LCD42 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_42__VIDEO_IN0_DATA11 \ @@ -2422,7 +2423,7 @@ typedef enum iomux_config { #define VF6XX_PAD_PAD_43__RGPIOC_GPIO43 \ (_VF6XX_PAD_PAD_43__RGPIOC_GPIO43 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_43__DSPI0_SOUT \ - (_VF6XX_PAD_PAD_43__DSPI0_SOUT | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_43__DSPI0_SOUT | MUX_CTRL_PAD(VF6XX_PAD_CTRL_OBE)) #define VF6XX_PAD_PAD_43__LCD_64F6B_LCD43 \ (_VF6XX_PAD_PAD_43__LCD_64F6B_LCD43 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_43__VIDEO_IN0_DATA2 \ @@ -2433,14 +2434,14 @@ typedef enum iomux_config { #define VF6XX_PAD_PAD_44__RGPIOC_GPIO44 \ (_VF6XX_PAD_PAD_44__RGPIOC_GPIO44 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_44__DSPI0_SCK \ - (_VF6XX_PAD_PAD_44__DSPI0_SCK | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_44__DSPI0_SCK | MUX_CTRL_PAD(VF6XX_PAD_CTRL_IOBE)) #define VF6XX_PAD_PAD_44__VIDEO_IN0_VIU_FID \ (_VF6XX_PAD_PAD_44__VIDEO_IN0_VIU_FID | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_45__RGPIOC_GPIO45 \ (_VF6XX_PAD_PAD_45__RGPIOC_GPIO45 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_45__ENET_SWIAHB_RMII0_MDC \ - (_VF6XX_PAD_PAD_45__ENET_SWIAHB_RMII0_MDC | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_45__ENET_SWIAHB_RMII0_MDC | MUX_CTRL_PAD(VF6XX_PAD_CTRL_UBOOT_RMII_OBE)) /* from uboot */ #define VF6XX_PAD_PAD_45__FLEXTIMER1_CH0 \ (_VF6XX_PAD_PAD_45__FLEXTIMER1_CH0 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_45__DSPI0_CS3 \ @@ -2458,7 +2459,7 @@ typedef enum iomux_config { (_VF6XX_PAD_PAD_46__RGPIOC_GPIO46 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_46__ENET_SWIAHB_RMII0_MDIO \ (_VF6XX_PAD_PAD_46__ENET_SWIAHB_RMII0_MDIO | \ - MUX_CTRL_PAD(NO_PAD_CTRL)) + MUX_CTRL_PAD(VF6XX_PAD_CTRL_UBOOT_RMII_IOBE)) /* from uboot */ #define VF6XX_PAD_PAD_46__FLEXTIMER1_CH1 \ (_VF6XX_PAD_PAD_46__FLEXTIMER1_CH1 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_46__DSPI0_CS2 \ @@ -2476,7 +2477,7 @@ typedef enum iomux_config { (_VF6XX_PAD_PAD_47__RGPIOC_GPIO47 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_47__ENET_SWIAHB_RMII0_CRS_DV \ (_VF6XX_PAD_PAD_47__ENET_SWIAHB_RMII0_CRS_DV | \ - MUX_CTRL_PAD(NO_PAD_CTRL)) + MUX_CTRL_PAD(VF6XX_PAD_CTRL_UBOOT_RMII_IBE)) /* from uboot */ #define VF6XX_PAD_PAD_47__SCI_FLX1_TX \ (_VF6XX_PAD_PAD_47__SCI_FLX1_TX | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_47__ESAI_SDO0 \ @@ -2492,7 +2493,7 @@ typedef enum iomux_config { (_VF6XX_PAD_PAD_48__RGPIOC_GPIO48 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_48__ENET_SWIAHB_RMII0_RXD1 \ (_VF6XX_PAD_PAD_48__ENET_SWIAHB_RMII0_RXD1 | \ - MUX_CTRL_PAD(NO_PAD_CTRL)) + MUX_CTRL_PAD(VF6XX_PAD_CTRL_UBOOT_RMII_IBE)) /* from uboot */ #define VF6XX_PAD_PAD_48__SCI_FLX1_RX \ (_VF6XX_PAD_PAD_48__SCI_FLX1_RX | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_48__ESAI_SDO1 \ @@ -2508,7 +2509,7 @@ typedef enum iomux_config { (_VF6XX_PAD_PAD_49__RGPIOC_GPIO49 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_49__ENET_SWIAHB_RMII0_RXD0 \ (_VF6XX_PAD_PAD_49__ENET_SWIAHB_RMII0_RXD0 | \ - MUX_CTRL_PAD(NO_PAD_CTRL)) + MUX_CTRL_PAD(VF6XX_PAD_CTRL_UBOOT_RMII_IBE)) /* from uboot */ #define VF6XX_PAD_PAD_49__SCI_FLX1_RTS \ (_VF6XX_PAD_PAD_49__SCI_FLX1_RTS | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_49__DSPI1_CS1 \ @@ -2526,7 +2527,7 @@ typedef enum iomux_config { (_VF6XX_PAD_PAD_50__RGPIOC_GPIO50 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_50__ENET_SWIAHB_RMII0_RXER \ (_VF6XX_PAD_PAD_50__ENET_SWIAHB_RMII0_RXER | \ - MUX_CTRL_PAD(NO_PAD_CTRL)) + MUX_CTRL_PAD(VF6XX_PAD_CTRL_UBOOT_RMII_IBE)) /* from uboot */ #define VF6XX_PAD_PAD_50__SCI_FLX1_CTS \ (_VF6XX_PAD_PAD_50__SCI_FLX1_CTS | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_50__DSPI1_CS0 \ @@ -2544,7 +2545,7 @@ typedef enum iomux_config { (_VF6XX_PAD_PAD_51__RGPIOC_GPIO51 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_51__ENET_SWIAHB_RMII0_TXD1 \ (_VF6XX_PAD_PAD_51__ENET_SWIAHB_RMII0_TXD1 | \ - MUX_CTRL_PAD(NO_PAD_CTRL)) + MUX_CTRL_PAD(VF6XX_PAD_CTRL_UBOOT_RMII_OBE)) /* from uboot */ #define VF6XX_PAD_PAD_51__DSPI1_SIN \ (_VF6XX_PAD_PAD_51__DSPI1_SIN | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_51__ESAI_SDI0 \ @@ -2560,7 +2561,7 @@ typedef enum iomux_config { (_VF6XX_PAD_PAD_52__RGPIOC_GPIO52 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_52__ENET_SWIAHB_RMII0_TXD0 \ (_VF6XX_PAD_PAD_52__ENET_SWIAHB_RMII0_TXD0 | \ - MUX_CTRL_PAD(NO_PAD_CTRL)) + MUX_CTRL_PAD(VF6XX_PAD_CTRL_UBOOT_RMII_OBE)) /* from uboot */ #define VF6XX_PAD_PAD_52__DSPI1_SOUT \ (_VF6XX_PAD_PAD_52__DSPI1_SOUT | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_52__ESAI_SDI1 \ @@ -2574,7 +2575,7 @@ typedef enum iomux_config { (_VF6XX_PAD_PAD_53__RGPIOC_GPIO53 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_53__ENET_SWIAHB_RMII0_TXEN \ (_VF6XX_PAD_PAD_53__ENET_SWIAHB_RMII0_TXEN | \ - MUX_CTRL_PAD(NO_PAD_CTRL)) + MUX_CTRL_PAD(VF6XX_PAD_CTRL_UBOOT_RMII_OBE)) /* from uboot */ #define VF6XX_PAD_PAD_53__DSPI1_SCK \ (_VF6XX_PAD_PAD_53__DSPI1_SCK | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_53__VIDEO_IN0_DATA8 \ @@ -2586,7 +2587,7 @@ typedef enum iomux_config { (_VF6XX_PAD_PAD_54__RGPIOC_GPIO54 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_54__ENET_SWIAHB_RMII1_MDC \ (_VF6XX_PAD_PAD_54__ENET_SWIAHB_RMII1_MDC | \ - MUX_CTRL_PAD(NO_PAD_CTRL)) + MUX_CTRL_PAD(VF6XX_PAD_CTRL_UBOOT_RMII_OBE)) /* from uboot */ #define VF6XX_PAD_PAD_54__ESAI_SCKT \ (_VF6XX_PAD_PAD_54__ESAI_SCKT | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_54__MLB_TOP_MLBCLK \ @@ -2598,7 +2599,7 @@ typedef enum iomux_config { (_VF6XX_PAD_PAD_55__RGPIOC_GPIO55 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_55__ENET_SWIAHB_RMII1_MDIO \ (_VF6XX_PAD_PAD_55__ENET_SWIAHB_RMII1_MDIO | \ - MUX_CTRL_PAD(NO_PAD_CTRL)) + MUX_CTRL_PAD(VF6XX_PAD_CTRL_UBOOT_RMII_IOBE)) /* from uboot */ #define VF6XX_PAD_PAD_55__ESAI_FST \ (_VF6XX_PAD_PAD_55__ESAI_FST | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_55__MLB_TOP_MLBSIGNAL \ @@ -2610,7 +2611,7 @@ typedef enum iomux_config { (_VF6XX_PAD_PAD_56__RGPIOC_GPIO56 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_56__ENET_SWIAHB_RMII1_CRS_DV \ (_VF6XX_PAD_PAD_56__ENET_SWIAHB_RMII1_CRS_DV | \ - MUX_CTRL_PAD(NO_PAD_CTRL)) + MUX_CTRL_PAD(VF6XX_PAD_CTRL_UBOOT_RMII_IBE)) /* from uboot */ #define VF6XX_PAD_PAD_56__ESAI_SDO0 \ (_VF6XX_PAD_PAD_56__ESAI_SDO0 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_56__MLB_TOP_MLBDATA \ @@ -2622,7 +2623,7 @@ typedef enum iomux_config { (_VF6XX_PAD_PAD_57__RGPIOC_GPIO57 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_57__ENET_SWIAHB_RMII1_RXD1 \ (_VF6XX_PAD_PAD_57__ENET_SWIAHB_RMII1_RXD1 | \ - MUX_CTRL_PAD(NO_PAD_CTRL)) + MUX_CTRL_PAD(VF6XX_PAD_CTRL_UBOOT_RMII_IBE)) /* from uboot */ #define VF6XX_PAD_PAD_57__ESAI_SDO1 \ (_VF6XX_PAD_PAD_57__ESAI_SDO1 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_57__SAI2_TX_BCLK \ @@ -2634,7 +2635,7 @@ typedef enum iomux_config { (_VF6XX_PAD_PAD_58__RGPIOC_GPIO58 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_58__ENET_SWIAHB_RMII1_RXD0 \ (_VF6XX_PAD_PAD_58__ENET_SWIAHB_RMII1_RXD0 | \ - MUX_CTRL_PAD(NO_PAD_CTRL)) + MUX_CTRL_PAD(VF6XX_PAD_CTRL_UBOOT_RMII_IBE)) /* from uboot */ #define VF6XX_PAD_PAD_58__ESAI_SDO2 \ (_VF6XX_PAD_PAD_58__ESAI_SDO2 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_58__SAI2_RX_BCLK \ @@ -2646,7 +2647,7 @@ typedef enum iomux_config { (_VF6XX_PAD_PAD_59__RGPIOC_GPIO59 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_59__ENET_SWIAHB_RMII1_RXER \ (_VF6XX_PAD_PAD_59__ENET_SWIAHB_RMII1_RXER | \ - MUX_CTRL_PAD(NO_PAD_CTRL)) + MUX_CTRL_PAD(VF6XX_PAD_CTRL_UBOOT_RMII_IBE)) /* from uboot */ #define VF6XX_PAD_PAD_59__ESAI_SDO3 \ (_VF6XX_PAD_PAD_59__ESAI_SDO3 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_59__SCI_FLX5_TX \ @@ -2662,7 +2663,7 @@ typedef enum iomux_config { (_VF6XX_PAD_PAD_60__RGPIOC_GPIO60 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_60__ENET_SWIAHB_RMII1_TXD1 \ (_VF6XX_PAD_PAD_60__ENET_SWIAHB_RMII1_TXD1 | \ - MUX_CTRL_PAD(NO_PAD_CTRL)) + MUX_CTRL_PAD(VF6XX_PAD_CTRL_UBOOT_RMII_OBE)) /* from uboot */ #define VF6XX_PAD_PAD_60__ESAI_SDI0 \ (_VF6XX_PAD_PAD_60__ESAI_SDI0 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_60__SCI_FLX5_RX \ @@ -2678,7 +2679,7 @@ typedef enum iomux_config { (_VF6XX_PAD_PAD_61__RGPIOC_GPIO61 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_61__ENET_SWIAHB_RMII1_TXD0 \ (_VF6XX_PAD_PAD_61__ENET_SWIAHB_RMII1_TXD0 | \ - MUX_CTRL_PAD(NO_PAD_CTRL)) + MUX_CTRL_PAD(VF6XX_PAD_CTRL_UBOOT_RMII_OBE)) /* from uboot */ #define VF6XX_PAD_PAD_61__ESAI_SDI1 \ (_VF6XX_PAD_PAD_61__ESAI_SDI1 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_61__SCI_FLX5_RTS \ @@ -2694,7 +2695,7 @@ typedef enum iomux_config { (_VF6XX_PAD_PAD_62__RGPIOC_GPIO62 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_62__ENET_SWIAHB_RMII1_TXEN \ (_VF6XX_PAD_PAD_62__ENET_SWIAHB_RMII1_TXEN | \ - MUX_CTRL_PAD(NO_PAD_CTRL)) + MUX_CTRL_PAD(VF6XX_PAD_CTRL_UBOOT_RMII_OBE)) /* from uboot */ #define VF6XX_PAD_PAD_62__ADC1_DA_ADC1SE7 \ (_VF6XX_PAD_PAD_62__ADC1_DA_ADC1SE7 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_62__SCI_FLX5_CTS \ @@ -2712,7 +2713,7 @@ typedef enum iomux_config { #define VF6XX_PAD_PAD_63__PLATFORM_FB_AD3 \ (_VF6XX_PAD_PAD_63__PLATFORM_FB_AD3 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_63__NFC_MLC_NF_IO15 \ - (_VF6XX_PAD_PAD_63__NFC_MLC_NF_IO15 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_63__NFC_MLC_NF_IO15 | MUX_CTRL_PAD(VF6XX_PAD_CTRL_IOBE)) #define VF6XX_PAD_PAD_63__FLEXTIMER3_CH0 \ (_VF6XX_PAD_PAD_63__FLEXTIMER3_CH0 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_63__DSPI2_CS1 \ @@ -2725,7 +2726,7 @@ typedef enum iomux_config { #define VF6XX_PAD_PAD_64__PLATFORM_FB_AD30 \ (_VF6XX_PAD_PAD_64__PLATFORM_FB_AD30 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_64__NFC_MLC_NF_IO14 \ - (_VF6XX_PAD_PAD_64__NFC_MLC_NF_IO14 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_64__NFC_MLC_NF_IO14 | MUX_CTRL_PAD(VF6XX_PAD_CTRL_IOBE)) #define VF6XX_PAD_PAD_64__FLEXTIMER3_CH1 \ (_VF6XX_PAD_PAD_64__FLEXTIMER3_CH1 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_64__DSPI2_CS0 \ @@ -2738,7 +2739,7 @@ typedef enum iomux_config { #define VF6XX_PAD_PAD_65__PLATFORM_FB_AD29 \ (_VF6XX_PAD_PAD_65__PLATFORM_FB_AD29 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_65__NFC_MLC_NF_IO13 \ - (_VF6XX_PAD_PAD_65__NFC_MLC_NF_IO13 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_65__NFC_MLC_NF_IO13 | MUX_CTRL_PAD(VF6XX_PAD_CTRL_IOBE)) #define VF6XX_PAD_PAD_65__FLEXTIMER3_CH2 \ (_VF6XX_PAD_PAD_65__FLEXTIMER3_CH2 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_65__DSPI2_SIN \ @@ -2751,7 +2752,7 @@ typedef enum iomux_config { #define VF6XX_PAD_PAD_66__PLATFORM_FB_AD28 \ (_VF6XX_PAD_PAD_66__PLATFORM_FB_AD28 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_66__NFC_MLC_NF_IO12 \ - (_VF6XX_PAD_PAD_66__NFC_MLC_NF_IO12 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_66__NFC_MLC_NF_IO12 | MUX_CTRL_PAD(VF6XX_PAD_CTRL_IOBE)) #define VF6XX_PAD_PAD_66__I2C2_SCL \ (_VF6XX_PAD_PAD_66__I2C2_SCL | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_66__FLEXTIMER3_CH3 \ @@ -2766,7 +2767,7 @@ typedef enum iomux_config { #define VF6XX_PAD_PAD_67__PLATFORM_FB_AD27 \ (_VF6XX_PAD_PAD_67__PLATFORM_FB_AD27 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_67__NFC_MLC_NF_IO11 \ - (_VF6XX_PAD_PAD_67__NFC_MLC_NF_IO11 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_67__NFC_MLC_NF_IO11 | MUX_CTRL_PAD(VF6XX_PAD_CTRL_IOBE)) #define VF6XX_PAD_PAD_67__I2C2_SDA \ (_VF6XX_PAD_PAD_67__I2C2_SDA | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_67__FLEXTIMER3_CH4 \ @@ -2781,7 +2782,7 @@ typedef enum iomux_config { #define VF6XX_PAD_PAD_68__PLATFORM_FB_AD26 \ (_VF6XX_PAD_PAD_68__PLATFORM_FB_AD26 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_68__NFC_MLC_NF_IO10 \ - (_VF6XX_PAD_PAD_68__NFC_MLC_NF_IO10 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_68__NFC_MLC_NF_IO10 | MUX_CTRL_PAD(VF6XX_PAD_CTRL_IOBE)) #define VF6XX_PAD_PAD_68__FLEXTIMER3_CH5 \ (_VF6XX_PAD_PAD_68__FLEXTIMER3_CH5 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_68__ESDHC1_WP \ @@ -2794,7 +2795,7 @@ typedef enum iomux_config { #define VF6XX_PAD_PAD_69__PLATFORM_FB_AD25 \ (_VF6XX_PAD_PAD_69__PLATFORM_FB_AD25 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_69__NFC_MLC_NF_IO9 \ - (_VF6XX_PAD_PAD_69__NFC_MLC_NF_IO9 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_69__NFC_MLC_NF_IO9 | MUX_CTRL_PAD(VF6XX_PAD_CTRL_IOBE)) #define VF6XX_PAD_PAD_69__FLEXTIMER3_CH6 \ (_VF6XX_PAD_PAD_69__FLEXTIMER3_CH6 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_69__VIU_MUX_DEBUG_OUT15 \ @@ -2805,7 +2806,7 @@ typedef enum iomux_config { #define VF6XX_PAD_PAD_70__PLATFORM_FB_AD24 \ (_VF6XX_PAD_PAD_70__PLATFORM_FB_AD24 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_70__NFC_MLC_NF_IO8 \ - (_VF6XX_PAD_PAD_70__NFC_MLC_NF_IO8 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_70__NFC_MLC_NF_IO8 | MUX_CTRL_PAD(VF6XX_PAD_CTRL_IOBE)) #define VF6XX_PAD_PAD_70__FLEXTIMER3_CH7 \ (_VF6XX_PAD_PAD_70__FLEXTIMER3_CH7 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_70__VIU_MUX_DEBUG_OUT16 \ @@ -2816,7 +2817,7 @@ typedef enum iomux_config { #define VF6XX_PAD_PAD_71__PLATFORM_FB_AD23 \ (_VF6XX_PAD_PAD_71__PLATFORM_FB_AD23 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_71__NFC_MLC_NF_IO7 \ - (_VF6XX_PAD_PAD_71__NFC_MLC_NF_IO7 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_71__NFC_MLC_NF_IO7 | MUX_CTRL_PAD(VF6XX_PAD_CTRL_IOBE)) #define VF6XX_PAD_PAD_71__FLEXTIMER2_CH0 \ (_VF6XX_PAD_PAD_71__FLEXTIMER2_CH0 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_71__ENET_SWIAHB_MAC0_TMR0 \ @@ -2834,7 +2835,7 @@ typedef enum iomux_config { #define VF6XX_PAD_PAD_72__PLATFORM_FB_AD22 \ (_VF6XX_PAD_PAD_72__PLATFORM_FB_AD22 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_72__NFC_MLC_NF_IO6 \ - (_VF6XX_PAD_PAD_72__NFC_MLC_NF_IO6 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_72__NFC_MLC_NF_IO6 | MUX_CTRL_PAD(VF6XX_PAD_CTRL_IOBE)) #define VF6XX_PAD_PAD_72__FLEXTIMER2_CH1 \ (_VF6XX_PAD_PAD_72__FLEXTIMER2_CH1 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_72__ENET_SWIAHB_MAC0_TMR1 \ @@ -2852,7 +2853,7 @@ typedef enum iomux_config { #define VF6XX_PAD_PAD_73__PLATFORM_FB_AD21 \ (_VF6XX_PAD_PAD_73__PLATFORM_FB_AD21 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_73__NFC_MLC_NF_IO5 \ - (_VF6XX_PAD_PAD_73__NFC_MLC_NF_IO5 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_73__NFC_MLC_NF_IO5 | MUX_CTRL_PAD(VF6XX_PAD_CTRL_IOBE)) #define VF6XX_PAD_PAD_73__ENET_SWIAHB_MAC0_TMR2 \ (_VF6XX_PAD_PAD_73__ENET_SWIAHB_MAC0_TMR2 | \ MUX_CTRL_PAD(NO_PAD_CTRL)) @@ -2868,7 +2869,7 @@ typedef enum iomux_config { #define VF6XX_PAD_PAD_74__PLATFORM_FB_AD20 \ (_VF6XX_PAD_PAD_74__PLATFORM_FB_AD20 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_74__NFC_MLC_NF_IO4 \ - (_VF6XX_PAD_PAD_74__NFC_MLC_NF_IO4 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_74__NFC_MLC_NF_IO4 | MUX_CTRL_PAD(VF6XX_PAD_CTRL_IOBE)) #define VF6XX_PAD_PAD_74__ENET_SWIAHB_MAC0_TMR3 \ (_VF6XX_PAD_PAD_74__ENET_SWIAHB_MAC0_TMR3 | \ MUX_CTRL_PAD(NO_PAD_CTRL)) @@ -2884,7 +2885,7 @@ typedef enum iomux_config { #define VF6XX_PAD_PAD_75__PLATFORM_FB_AD19 \ (_VF6XX_PAD_PAD_75__PLATFORM_FB_AD19 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_75__NFC_MLC_NF_IO3 \ - (_VF6XX_PAD_PAD_75__NFC_MLC_NF_IO3 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_75__NFC_MLC_NF_IO3 | MUX_CTRL_PAD(VF6XX_PAD_CTRL_IOBE)) #define VF6XX_PAD_PAD_75__ESAI_SCKR \ (_VF6XX_PAD_PAD_75__ESAI_SCKR | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_75__I2C0_SCL \ @@ -2899,7 +2900,7 @@ typedef enum iomux_config { #define VF6XX_PAD_PAD_76__PLATFORM_FB_AD18 \ (_VF6XX_PAD_PAD_76__PLATFORM_FB_AD18 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_76__NFC_MLC_NF_IO2 \ - (_VF6XX_PAD_PAD_76__NFC_MLC_NF_IO2 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_76__NFC_MLC_NF_IO2 | MUX_CTRL_PAD(VF6XX_PAD_CTRL_IOBE)) #define VF6XX_PAD_PAD_76__ESAI_FSR \ (_VF6XX_PAD_PAD_76__ESAI_FSR | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_76__I2C0_SDA \ @@ -2914,7 +2915,7 @@ typedef enum iomux_config { #define VF6XX_PAD_PAD_77__PLATFORM_FB_AD17 \ (_VF6XX_PAD_PAD_77__PLATFORM_FB_AD17 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_77__NFC_MLC_NF_IO1 \ - (_VF6XX_PAD_PAD_77__NFC_MLC_NF_IO1 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_77__NFC_MLC_NF_IO1 | MUX_CTRL_PAD(VF6XX_PAD_CTRL_IOBE)) #define VF6XX_PAD_PAD_77__ESAI_HCKR \ (_VF6XX_PAD_PAD_77__ESAI_HCKR | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_77__I2C1_SCL \ @@ -2927,7 +2928,7 @@ typedef enum iomux_config { #define VF6XX_PAD_PAD_78__PLATFORM_FB_AD16 \ (_VF6XX_PAD_PAD_78__PLATFORM_FB_AD16 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_78__NFC_MLC_NF_IO0 \ - (_VF6XX_PAD_PAD_78__NFC_MLC_NF_IO0 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_78__NFC_MLC_NF_IO0 | MUX_CTRL_PAD(VF6XX_PAD_CTRL_IOBE)) #define VF6XX_PAD_PAD_78__ESAI_HCKT \ (_VF6XX_PAD_PAD_78__ESAI_HCKT | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_78__I2C1_SDA \ @@ -2938,7 +2939,7 @@ typedef enum iomux_config { #define VF6XX_PAD_PAD_79__RGPIOC_GPIO79 \ (_VF6XX_PAD_PAD_79__RGPIOC_GPIO79 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_79__QUADSPI0_QSCK_A \ - (_VF6XX_PAD_PAD_79__QUADSPI0_QSCK_A | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_79__QUADSPI0_QSCK_A | MUX_CTRL_PAD(VF6XX_PAD_CTRL_OBE)) #define VF6XX_PAD_PAD_79__SCI_FLX2_TX \ (_VF6XX_PAD_PAD_79__SCI_FLX2_TX | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_79__PLATFORM_FB_AD15 \ @@ -2951,7 +2952,7 @@ typedef enum iomux_config { #define VF6XX_PAD_PAD_80__RGPIOC_GPIO80 \ (_VF6XX_PAD_PAD_80__RGPIOC_GPIO80 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_80__QUADSPI0_QPCS0_A \ - (_VF6XX_PAD_PAD_80__QUADSPI0_QPCS0_A | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_80__QUADSPI0_QPCS0_A | MUX_CTRL_PAD(VF6XX_PAD_CTRL_OBE)) #define VF6XX_PAD_PAD_80__SCI_FLX2_RX \ (_VF6XX_PAD_PAD_80__SCI_FLX2_RX | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_80__PLATFORM_FB_AD14 \ @@ -2964,7 +2965,7 @@ typedef enum iomux_config { #define VF6XX_PAD_PAD_81__RGPIOC_GPIO81 \ (_VF6XX_PAD_PAD_81__RGPIOC_GPIO81 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_81__QUADSPI0_QSPI_IO3_A \ - (_VF6XX_PAD_PAD_81__QUADSPI0_QSPI_IO3_A | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_81__QUADSPI0_QSPI_IO3_A | MUX_CTRL_PAD(VF6XX_PAD_CTRL_IOBE)) #define VF6XX_PAD_PAD_81__SCI_FLX2_RTS \ (_VF6XX_PAD_PAD_81__SCI_FLX2_RTS | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_81__DSPI1_CS3 \ @@ -2979,7 +2980,7 @@ typedef enum iomux_config { #define VF6XX_PAD_PAD_82__RGPIOC_GPIO82 \ (_VF6XX_PAD_PAD_82__RGPIOC_GPIO82 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_82__QUADSPI0_QSPI_IO2_A \ - (_VF6XX_PAD_PAD_82__QUADSPI0_QSPI_IO2_A | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_82__QUADSPI0_QSPI_IO2_A | MUX_CTRL_PAD(VF6XX_PAD_CTRL_IOBE)) #define VF6XX_PAD_PAD_82__SCI_FLX2_CTS \ (_VF6XX_PAD_PAD_82__SCI_FLX2_CTS | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_82__DSPI1_CS2 \ @@ -2994,7 +2995,7 @@ typedef enum iomux_config { #define VF6XX_PAD_PAD_83__RGPIOC_GPIO83 \ (_VF6XX_PAD_PAD_83__RGPIOC_GPIO83 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_83__QUADSPI0_QSPI_IO1_A \ - (_VF6XX_PAD_PAD_83__QUADSPI0_QSPI_IO1_A | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_83__QUADSPI0_QSPI_IO1_A | MUX_CTRL_PAD(VF6XX_PAD_CTRL_IOBE)) #define VF6XX_PAD_PAD_83__DSPI1_CS1 \ (_VF6XX_PAD_PAD_83__DSPI1_CS1 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_83__PLATFORM_FB_AD11 \ @@ -3007,7 +3008,7 @@ typedef enum iomux_config { #define VF6XX_PAD_PAD_84__RGPIOC_GPIO84 \ (_VF6XX_PAD_PAD_84__RGPIOC_GPIO84 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_84__QUADSPI0_QSPI_IO0_A \ - (_VF6XX_PAD_PAD_84__QUADSPI0_QSPI_IO0_A | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_84__QUADSPI0_QSPI_IO0_A | MUX_CTRL_PAD(VF6XX_PAD_CTRL_IOBE)) #define VF6XX_PAD_PAD_84__DSPI1_CS0 \ (_VF6XX_PAD_PAD_84__DSPI1_CS0 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_84__PLATFORM_FB_AD10 \ @@ -3016,7 +3017,7 @@ typedef enum iomux_config { (_VF6XX_PAD_PAD_84__VIU_MUX_DEBUG_OUT22 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_85__RGPIOC_GPIO85 \ - (_VF6XX_PAD_PAD_85__RGPIOC_GPIO85 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_85__RGPIOC_GPIO85 | MUX_CTRL_PAD(VF6XX_PAD_CTRL_IOBE)) #define VF6XX_PAD_PAD_85__QUADSPI0_DQS_A \ (_VF6XX_PAD_PAD_85__QUADSPI0_DQS_A | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_85__DSPI1_SIN \ @@ -3029,7 +3030,7 @@ typedef enum iomux_config { #define VF6XX_PAD_PAD_86__RGPIOC_GPIO86 \ (_VF6XX_PAD_PAD_86__RGPIOC_GPIO86 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_86__QUADSPI0_QSCK_B \ - (_VF6XX_PAD_PAD_86__QUADSPI0_QSCK_B | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_86__QUADSPI0_QSCK_B | MUX_CTRL_PAD(VF6XX_PAD_CTRL_OBE)) #define VF6XX_PAD_PAD_86__DSPI1_SOUT \ (_VF6XX_PAD_PAD_86__DSPI1_SOUT | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_86__PLATFORM_FB_AD8 \ @@ -3040,7 +3041,7 @@ typedef enum iomux_config { #define VF6XX_PAD_PAD_87__RGPIOC_GPIO87 \ (_VF6XX_PAD_PAD_87__RGPIOC_GPIO87 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_87__QUADSPI0_QPCS0_B \ - (_VF6XX_PAD_PAD_87__QUADSPI0_QPCS0_B | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_87__QUADSPI0_QPCS0_B | MUX_CTRL_PAD(VF6XX_PAD_CTRL_OBE)) #define VF6XX_PAD_PAD_87__LPCG0_FB_CLKOUT \ (_VF6XX_PAD_PAD_87__LPCG0_FB_CLKOUT | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_87__DSPI1_SCK \ @@ -3053,7 +3054,7 @@ typedef enum iomux_config { #define VF6XX_PAD_PAD_88__RGPIOC_GPIO88 \ (_VF6XX_PAD_PAD_88__RGPIOC_GPIO88 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_88__QUADSPI0_QSPI_IO3_B \ - (_VF6XX_PAD_PAD_88__QUADSPI0_QSPI_IO3_B | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_88__QUADSPI0_QSPI_IO3_B | MUX_CTRL_PAD(VF6XX_PAD_CTRL_IOBE)) #define VF6XX_PAD_PAD_88__DSPI3_CS1 \ (_VF6XX_PAD_PAD_88__DSPI3_CS1 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_88__PLATFORM_FB_AD6 \ @@ -3066,7 +3067,7 @@ typedef enum iomux_config { #define VF6XX_PAD_PAD_89__RGPIOC_GPIO89 \ (_VF6XX_PAD_PAD_89__RGPIOC_GPIO89 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_89__QUADSPI0_QSPI_IO2_B \ - (_VF6XX_PAD_PAD_89__QUADSPI0_QSPI_IO2_B | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_89__QUADSPI0_QSPI_IO2_B | MUX_CTRL_PAD(VF6XX_PAD_CTRL_IOBE)) #define VF6XX_PAD_PAD_89__DSPI3_CS0 \ (_VF6XX_PAD_PAD_89__DSPI3_CS0 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_89__PLATFORM_FB_AD5 \ @@ -3077,7 +3078,7 @@ typedef enum iomux_config { #define VF6XX_PAD_PAD_90__RGPIOC_GPIO90 \ (_VF6XX_PAD_PAD_90__RGPIOC_GPIO90 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_90__QUADSPI0_QSPI_IO1_B \ - (_VF6XX_PAD_PAD_90__QUADSPI0_QSPI_IO1_B | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_90__QUADSPI0_QSPI_IO1_B | MUX_CTRL_PAD(VF6XX_PAD_CTRL_IOBE)) #define VF6XX_PAD_PAD_90__DSPI3_SIN \ (_VF6XX_PAD_PAD_90__DSPI3_SIN | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_90__PLATFORM_FB_AD4 \ @@ -3088,7 +3089,7 @@ typedef enum iomux_config { #define VF6XX_PAD_PAD_91__RGPIOC_GPIO91 \ (_VF6XX_PAD_PAD_91__RGPIOC_GPIO91 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_91__QUADSPI0_QSPI_IO0_B \ - (_VF6XX_PAD_PAD_91__QUADSPI0_QSPI_IO0_B | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_91__QUADSPI0_QSPI_IO0_B | MUX_CTRL_PAD(VF6XX_PAD_CTRL_IOBE)) #define VF6XX_PAD_PAD_91__DSPI3_SOUT \ (_VF6XX_PAD_PAD_91__DSPI3_SOUT | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_91__PLATFORM_FB_AD3 \ @@ -3097,7 +3098,7 @@ typedef enum iomux_config { (_VF6XX_PAD_PAD_91__VIU_MUX_DEBUG_OUT27 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_92__RGPIOC_GPIO92 \ - (_VF6XX_PAD_PAD_92__RGPIOC_GPIO92 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_92__RGPIOC_GPIO92 | MUX_CTRL_PAD(VF6XX_PAD_CTRL_IOBE)) #define VF6XX_PAD_PAD_92__QUADSPI0_DQS_B \ (_VF6XX_PAD_PAD_92__QUADSPI0_DQS_B | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_92__DSPI3_SCK \ @@ -3108,7 +3109,7 @@ typedef enum iomux_config { (_VF6XX_PAD_PAD_92__VIU_MUX_DEBUG_OUT28 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_93__RGPIOC_GPIO93 \ - (_VF6XX_PAD_PAD_93__RGPIOC_GPIO93 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_93__RGPIOC_GPIO93 | MUX_CTRL_PAD(VF6XX_PAD_CTRL_IOBE)) #define VF6XX_PAD_PAD_93__SAI0_TX_BCLK \ (_VF6XX_PAD_PAD_93__SAI0_TX_BCLK | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_93__SCI_FLX1_TX \ @@ -3135,7 +3136,7 @@ typedef enum iomux_config { #define VF6XX_PAD_PAD_94__PLATFORM_FB_CS4_B \ (_VF6XX_PAD_PAD_94__PLATFORM_FB_CS4_B | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_94__NFC_MLC_NF_WE_B \ - (_VF6XX_PAD_PAD_94__NFC_MLC_NF_WE_B | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_94__NFC_MLC_NF_WE_B | MUX_CTRL_PAD(VF6XX_PAD_CTRL_OBE)) #define VF6XX_PAD_PAD_94__SCI_FLX3_CTS \ (_VF6XX_PAD_PAD_94__SCI_FLX3_CTS | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_94__TCON1_DATA_OUT14 \ @@ -3152,12 +3153,12 @@ typedef enum iomux_config { #define VF6XX_PAD_PAD_95__PLATFORM_FB_CS1_B \ (_VF6XX_PAD_PAD_95__PLATFORM_FB_CS1_B | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_95__NFC_MLC_NF_CE0_B \ - (_VF6XX_PAD_PAD_95__NFC_MLC_NF_CE0_B | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_95__NFC_MLC_NF_CE0_B | MUX_CTRL_PAD(VF6XX_PAD_CTRL_OBE)) #define VF6XX_PAD_PAD_95__TCON1_DATA_OUT15 \ (_VF6XX_PAD_PAD_95__TCON1_DATA_OUT15 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_96__RGPIOC_GPIO96 \ - (_VF6XX_PAD_PAD_96__RGPIOC_GPIO96 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_96__RGPIOC_GPIO96 | MUX_CTRL_PAD(VF6XX_PAD_CTRL_IOBE)) #define VF6XX_PAD_PAD_96__SAI0_TX_DATA \ (_VF6XX_PAD_PAD_96__SAI0_TX_DATA | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_96__SCI_FLX1_CTS \ @@ -3182,12 +3183,12 @@ typedef enum iomux_config { #define VF6XX_PAD_PAD_97__PLATFORM_FB_TBST_B \ (_VF6XX_PAD_PAD_97__PLATFORM_FB_TBST_B | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_97__NFC_MLC_NF_RE_B \ - (_VF6XX_PAD_PAD_97__NFC_MLC_NF_RE_B | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_97__NFC_MLC_NF_RE_B | MUX_CTRL_PAD(VF6XX_PAD_CTRL_OBE)) #define VF6XX_PAD_PAD_97__TCON1_DATA_OUT17 \ (_VF6XX_PAD_PAD_97__TCON1_DATA_OUT17 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_98__RGPIOC_GPIO98 \ - (_VF6XX_PAD_PAD_98__RGPIOC_GPIO98 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_98__RGPIOC_GPIO98 | MUX_CTRL_PAD(VF6XX_PAD_CTRL_IOBE)) #define VF6XX_PAD_PAD_98__SAI0_TX_SYNC \ (_VF6XX_PAD_PAD_98__SAI0_TX_SYNC | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_98__SRC_RCON23 \ @@ -3208,7 +3209,7 @@ typedef enum iomux_config { #define VF6XX_PAD_PAD_99__PLATFORM_FB_TA_B \ (_VF6XX_PAD_PAD_99__PLATFORM_FB_TA_B | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_99__NFC_MLC_NF_RB_B \ - (_VF6XX_PAD_PAD_99__NFC_MLC_NF_RB_B | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_99__NFC_MLC_NF_RB_B | MUX_CTRL_PAD(VF6XX_PAD_CTRL_OBE)) #define VF6XX_PAD_PAD_99__TCON1_DATA_OUT9 \ (_VF6XX_PAD_PAD_99__TCON1_DATA_OUT9 | MUX_CTRL_PAD(NO_PAD_CTRL)) @@ -3225,7 +3226,7 @@ typedef enum iomux_config { #define VF6XX_PAD_PAD_100__PLATFORM_FB_CS3_B \ (_VF6XX_PAD_PAD_100__PLATFORM_FB_CS3_B | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_100__NFC_MLC_NF_ALE \ - (_VF6XX_PAD_PAD_100__NFC_MLC_NF_ALE | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_100__NFC_MLC_NF_ALE | MUX_CTRL_PAD(VF6XX_PAD_CTRL_OBE)) #define VF6XX_PAD_PAD_100__TCON1_DATA_OUT4 \ (_VF6XX_PAD_PAD_100__TCON1_DATA_OUT4 | MUX_CTRL_PAD(NO_PAD_CTRL)) @@ -3242,12 +3243,12 @@ typedef enum iomux_config { #define VF6XX_PAD_PAD_101__PLATFORM_FB_CS2_B \ (_VF6XX_PAD_PAD_101__PLATFORM_FB_CS2_B | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_101__NFC_MLC_NF_CLE \ - (_VF6XX_PAD_PAD_101__NFC_MLC_NF_CLE | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_101__NFC_MLC_NF_CLE | MUX_CTRL_PAD(VF6XX_PAD_CTRL_OBE)) #define VF6XX_PAD_PAD_101__TCON1_DATA_OUT5 \ (_VF6XX_PAD_PAD_101__TCON1_DATA_OUT5 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_102__RGPIOC_GPIO102 \ - (_VF6XX_PAD_PAD_102__RGPIOC_GPIO102 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_102__RGPIOC_GPIO102 | MUX_CTRL_PAD(VF6XX_PAD_CTRL_IOBE)) /* FIXME */ #define VF6XX_PAD_PAD_102__SAI1_TX_DATA \ (_VF6XX_PAD_PAD_102__SAI1_TX_DATA | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_102__DSPI0_CS2 \ @@ -3262,7 +3263,7 @@ typedef enum iomux_config { (_VF6XX_PAD_PAD_102__TCON1_DATA_OUT6 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_103__RGPIOC_GPIO103 \ - (_VF6XX_PAD_PAD_103__RGPIOC_GPIO103 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_103__RGPIOC_GPIO103 | MUX_CTRL_PAD(VF6XX_PAD_CTRL_IOBE)) /* FIXME */ #define VF6XX_PAD_PAD_103__SAI1_RX_SYNC \ (_VF6XX_PAD_PAD_103__SAI1_RX_SYNC | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_103__DSPI1_CS2 \ @@ -3274,25 +3275,25 @@ typedef enum iomux_config { #define VF6XX_PAD_PAD_103__PLATFORM_FB_TSIZ0 \ (_VF6XX_PAD_PAD_103__PLATFORM_FB_TSIZ0 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_103__ADC0_DA_ADC0SE5 \ - (_VF6XX_PAD_PAD_103__ADC0_DA_ADC0SE5 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_103__ADC0_DA_ADC0SE5 | MUX_CTRL_PAD(VF6XX_PAD_CTRL_IBE)) /* FIXME */ #define VF6XX_PAD_PAD_103__TCON1_DATA_OUT7 \ (_VF6XX_PAD_PAD_103__TCON1_DATA_OUT7 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_104__RGPIOC_GPIO104 \ - (_VF6XX_PAD_PAD_104__RGPIOC_GPIO104 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_104__RGPIOC_GPIO104 | MUX_CTRL_PAD(VF6XX_PAD_CTRL_IOBE)) /* FIXME */ #define VF6XX_PAD_PAD_104__SAI1_TX_SYNC \ (_VF6XX_PAD_PAD_104__SAI1_TX_SYNC | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_104__SRC_RCON29 \ (_VF6XX_PAD_PAD_104__SRC_RCON29 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_104__ADC1_DA_ADC1SE5 \ - (_VF6XX_PAD_PAD_104__ADC1_DA_ADC1SE5 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_104__ADC1_DA_ADC1SE5 | MUX_CTRL_PAD(VF6XX_PAD_CTRL_IBE)) /* FIXME */ #define VF6XX_PAD_PAD_104__TCON1_DATA_OUT8 \ (_VF6XX_PAD_PAD_104__TCON1_DATA_OUT8 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_105__RGPIOC_GPIO105 \ (_VF6XX_PAD_PAD_105__RGPIOC_GPIO105 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_105__TCON0_TCON1 \ - (_VF6XX_PAD_PAD_105__TCON0_TCON1 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_105__TCON0_TCON1 | MUX_CTRL_PAD(VF6XX_PAD_CTRL_IOBE)) /* FIXME */ #define VF6XX_PAD_PAD_105__SRC_BMODE1 \ (_VF6XX_PAD_PAD_105__SRC_BMODE1 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_105__LCD_64F6B_LCD0 \ @@ -3303,7 +3304,7 @@ typedef enum iomux_config { #define VF6XX_PAD_PAD_106__RGPIOC_GPIO106 \ (_VF6XX_PAD_PAD_106__RGPIOC_GPIO106 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_106__TCON0_TCON2 \ - (_VF6XX_PAD_PAD_106__TCON0_TCON2 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_106__TCON0_TCON2 | MUX_CTRL_PAD(VF6XX_PAD_CTRL_IOBE)) /* FIXME */ #define VF6XX_PAD_PAD_106__SRC_BMODE0 \ (_VF6XX_PAD_PAD_106__SRC_BMODE0 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_106__LCD_64F6B_LCD1 \ @@ -3314,14 +3315,14 @@ typedef enum iomux_config { #define VF6XX_PAD_PAD_107__RGPIOC_GPIO107 \ (_VF6XX_PAD_PAD_107__RGPIOC_GPIO107 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_107__TCON0_DATA_OUT1 \ - (_VF6XX_PAD_PAD_107__TCON0_DATA_OUT1 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_107__TCON0_DATA_OUT1 | MUX_CTRL_PAD(VF6XX_PAD_CTRL_IOBE)) #define VF6XX_PAD_PAD_107__LCD_64F6B_LCD2 \ (_VF6XX_PAD_PAD_107__LCD_64F6B_LCD2 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_107__VIU_MUX_DEBUG_OUT31 \ (_VF6XX_PAD_PAD_107__VIU_MUX_DEBUG_OUT31 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_108__RGPIOC_GPIO108 \ - (_VF6XX_PAD_PAD_108__RGPIOC_GPIO108 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_108__RGPIOC_GPIO108 | MUX_CTRL_PAD(VF6XX_PAD_CTRL_IOBE)) #define VF6XX_PAD_PAD_108__TCON0_TCON0 \ (_VF6XX_PAD_PAD_108__TCON0_TCON0 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_108__LCD_64F6B_LCD3 \ @@ -3332,7 +3333,7 @@ typedef enum iomux_config { #define VF6XX_PAD_PAD_109__RGPIOC_GPIO109 \ (_VF6XX_PAD_PAD_109__RGPIOC_GPIO109 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_109__TCON0_TCON3 \ - (_VF6XX_PAD_PAD_109__TCON0_TCON3 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_109__TCON0_TCON3 | MUX_CTRL_PAD(VF6XX_PAD_CTRL_IOBE)) #define VF6XX_PAD_PAD_109__LCD_64F6B_LCD4 \ (_VF6XX_PAD_PAD_109__LCD_64F6B_LCD4 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_109__VIU_MUX_DEBUG_OUT33 \ @@ -3341,7 +3342,7 @@ typedef enum iomux_config { #define VF6XX_PAD_PAD_110__RGPIOC_GPIO110 \ (_VF6XX_PAD_PAD_110__RGPIOC_GPIO110 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_110__TCON0_DATA_OUT18 \ - (_VF6XX_PAD_PAD_110__TCON0_DATA_OUT18 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_110__TCON0_DATA_OUT18 | MUX_CTRL_PAD(VF6XX_PAD_CTRL_OBE)) #define VF6XX_PAD_PAD_110__LCD_64F6B_LCD5 \ (_VF6XX_PAD_PAD_110__LCD_64F6B_LCD5 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_110__VIU_MUX_DEBUG_OUT34 \ @@ -3350,7 +3351,7 @@ typedef enum iomux_config { #define VF6XX_PAD_PAD_111__RGPIOC_GPIO111 \ (_VF6XX_PAD_PAD_111__RGPIOC_GPIO111 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_111__TCON0_DATA_OUT19 \ - (_VF6XX_PAD_PAD_111__TCON0_DATA_OUT19 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_111__TCON0_DATA_OUT19 | MUX_CTRL_PAD(VF6XX_PAD_CTRL_OBE)) #define VF6XX_PAD_PAD_111__LCD_64F6B_LCD6 \ (_VF6XX_PAD_PAD_111__LCD_64F6B_LCD6 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_111__VIU_MUX_DEBUG_OUT35 \ @@ -3359,7 +3360,7 @@ typedef enum iomux_config { #define VF6XX_PAD_PAD_112__RGPIOC_GPIO112 \ (_VF6XX_PAD_PAD_112__RGPIOC_GPIO112 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_112__TCON0_DATA_OUT20 \ - (_VF6XX_PAD_PAD_112__TCON0_DATA_OUT20 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_112__TCON0_DATA_OUT20 | MUX_CTRL_PAD(VF6XX_PAD_CTRL_OBE)) #define VF6XX_PAD_PAD_112__SRC_RCON0 \ (_VF6XX_PAD_PAD_112__SRC_RCON0 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_112__LCD_64F6B_LCD7 \ @@ -3370,7 +3371,7 @@ typedef enum iomux_config { #define VF6XX_PAD_PAD_113__RGPIOC_GPIO113 \ (_VF6XX_PAD_PAD_113__RGPIOC_GPIO113 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_113__TCON0_DATA_OUT21 \ - (_VF6XX_PAD_PAD_113__TCON0_DATA_OUT21 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_113__TCON0_DATA_OUT21 | MUX_CTRL_PAD(VF6XX_PAD_CTRL_OBE)) #define VF6XX_PAD_PAD_113__SRC_RCON1 \ (_VF6XX_PAD_PAD_113__SRC_RCON1 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_113__LCD_64F6B_LCD8 \ @@ -3381,7 +3382,7 @@ typedef enum iomux_config { #define VF6XX_PAD_PAD_114__RGPIOC_GPIO114 \ (_VF6XX_PAD_PAD_114__RGPIOC_GPIO114 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_114__TCON0_DATA_OUT22 \ - (_VF6XX_PAD_PAD_114__TCON0_DATA_OUT22 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_114__TCON0_DATA_OUT22 | MUX_CTRL_PAD(VF6XX_PAD_CTRL_OBE)) #define VF6XX_PAD_PAD_114__SRC_RCON2 \ (_VF6XX_PAD_PAD_114__SRC_RCON2 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_114__LCD_64F6B_LCD9 \ @@ -3392,7 +3393,7 @@ typedef enum iomux_config { #define VF6XX_PAD_PAD_115__RGPIOC_GPIO115 \ (_VF6XX_PAD_PAD_115__RGPIOC_GPIO115 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_115__TCON0_DATA_OUT23 \ - (_VF6XX_PAD_PAD_115__TCON0_DATA_OUT23 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_115__TCON0_DATA_OUT23 | MUX_CTRL_PAD(VF6XX_PAD_CTRL_OBE)) #define VF6XX_PAD_PAD_115__SRC_RCON3 \ (_VF6XX_PAD_PAD_115__SRC_RCON3 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_115__LCD_64F6B_LCD10 \ @@ -3403,7 +3404,7 @@ typedef enum iomux_config { #define VF6XX_PAD_PAD_116__RGPIOC_GPIO116 \ (_VF6XX_PAD_PAD_116__RGPIOC_GPIO116 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_116__TCON0_DATA_OUT24 \ - (_VF6XX_PAD_PAD_116__TCON0_DATA_OUT24 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_116__TCON0_DATA_OUT24 | MUX_CTRL_PAD(VF6XX_PAD_CTRL_OBE)) #define VF6XX_PAD_PAD_116__SRC_RCON4 \ (_VF6XX_PAD_PAD_116__SRC_RCON4 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_116__LCD_64F6B_LCD11 \ @@ -3414,7 +3415,7 @@ typedef enum iomux_config { #define VF6XX_PAD_PAD_117__RGPIOC_GPIO117 \ (_VF6XX_PAD_PAD_117__RGPIOC_GPIO117 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_117__TCON0_DATA_OUT25 \ - (_VF6XX_PAD_PAD_117__TCON0_DATA_OUT25 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_117__TCON0_DATA_OUT25 | MUX_CTRL_PAD(VF6XX_PAD_CTRL_OBE)) #define VF6XX_PAD_PAD_117__DSPI1_CS3 \ (_VF6XX_PAD_PAD_117__DSPI1_CS3 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_117__SRC_RCON5 \ @@ -3427,7 +3428,7 @@ typedef enum iomux_config { #define VF6XX_PAD_PAD_118__RGPIOC_GPIO118 \ (_VF6XX_PAD_PAD_118__RGPIOC_GPIO118 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_118__TCON0_DATA_OUT10 \ - (_VF6XX_PAD_PAD_118__TCON0_DATA_OUT10 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_118__TCON0_DATA_OUT10 | MUX_CTRL_PAD(VF6XX_PAD_CTRL_OBE)) #define VF6XX_PAD_PAD_118__LCD_64F6B_LCD13 \ (_VF6XX_PAD_PAD_118__LCD_64F6B_LCD13 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_118__VIU_MUX_DEBUG_OUT41 \ @@ -3436,7 +3437,7 @@ typedef enum iomux_config { #define VF6XX_PAD_PAD_119__RGPIOC_GPIO119 \ (_VF6XX_PAD_PAD_119__RGPIOC_GPIO119 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_119__TCON0_DATA_OUT11 \ - (_VF6XX_PAD_PAD_119__TCON0_DATA_OUT11 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_119__TCON0_DATA_OUT11 | MUX_CTRL_PAD(VF6XX_PAD_CTRL_OBE)) #define VF6XX_PAD_PAD_119__LCD_64F6B_LCD14 \ (_VF6XX_PAD_PAD_119__LCD_64F6B_LCD14 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_119__VIU_MUX_DEBUG_OUT42 \ @@ -3445,7 +3446,7 @@ typedef enum iomux_config { #define VF6XX_PAD_PAD_120__RGPIOC_GPIO120 \ (_VF6XX_PAD_PAD_120__RGPIOC_GPIO120 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_120__TCON0_DATA_OUT12 \ - (_VF6XX_PAD_PAD_120__TCON0_DATA_OUT12 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_120__TCON0_DATA_OUT12 | MUX_CTRL_PAD(VF6XX_PAD_CTRL_OBE)) #define VF6XX_PAD_PAD_120__SRC_RCON6 \ (_VF6XX_PAD_PAD_120__SRC_RCON6 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_120__LCD_64F6B_LCD15 \ @@ -3456,7 +3457,7 @@ typedef enum iomux_config { #define VF6XX_PAD_PAD_121__RGPIOC_GPIO121 \ (_VF6XX_PAD_PAD_121__RGPIOC_GPIO121 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_121__TCON0_DATA_OUT13 \ - (_VF6XX_PAD_PAD_121__TCON0_DATA_OUT13 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_121__TCON0_DATA_OUT13 | MUX_CTRL_PAD(VF6XX_PAD_CTRL_OBE)) #define VF6XX_PAD_PAD_121__SRC_RCON7 \ (_VF6XX_PAD_PAD_121__SRC_RCON7 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_121__LCD_64F6B_LCD16 \ @@ -3465,7 +3466,7 @@ typedef enum iomux_config { #define VF6XX_PAD_PAD_122__RGPIOC_GPIO122 \ (_VF6XX_PAD_PAD_122__RGPIOC_GPIO122 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_122__TCON0_DATA_OUT14 \ - (_VF6XX_PAD_PAD_122__TCON0_DATA_OUT14 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_122__TCON0_DATA_OUT14 | MUX_CTRL_PAD(VF6XX_PAD_CTRL_OBE)) #define VF6XX_PAD_PAD_122__SRC_RCON8 \ (_VF6XX_PAD_PAD_122__SRC_RCON8 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_122__LCD_64F6B_LCD17 \ @@ -3474,7 +3475,7 @@ typedef enum iomux_config { #define VF6XX_PAD_PAD_123__RGPIOC_GPIO123 \ (_VF6XX_PAD_PAD_123__RGPIOC_GPIO123 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_123__TCON0_DATA_OUT15 \ - (_VF6XX_PAD_PAD_123__TCON0_DATA_OUT15 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_123__TCON0_DATA_OUT15 | MUX_CTRL_PAD(VF6XX_PAD_CTRL_OBE)) #define VF6XX_PAD_PAD_123__SRC_RCON9 \ (_VF6XX_PAD_PAD_123__SRC_RCON9 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_123__LCD_64F6B_LCD18 \ @@ -3483,7 +3484,7 @@ typedef enum iomux_config { #define VF6XX_PAD_PAD_124__RGPIOC_GPIO124 \ (_VF6XX_PAD_PAD_124__RGPIOC_GPIO124 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_124__TCON0_DATA_OUT16 \ - (_VF6XX_PAD_PAD_124__TCON0_DATA_OUT16 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_124__TCON0_DATA_OUT16 | MUX_CTRL_PAD(VF6XX_PAD_CTRL_OBE)) #define VF6XX_PAD_PAD_124__SRC_RCON10 \ (_VF6XX_PAD_PAD_124__SRC_RCON10 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_124__LCD_64F6B_LCD19 \ @@ -3494,7 +3495,7 @@ typedef enum iomux_config { #define VF6XX_PAD_PAD_125__RGPIOC_GPIO125 \ (_VF6XX_PAD_PAD_125__RGPIOC_GPIO125 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_125__TCON0_DATA_OUT17 \ - (_VF6XX_PAD_PAD_125__TCON0_DATA_OUT17 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_125__TCON0_DATA_OUT17 | MUX_CTRL_PAD(VF6XX_PAD_CTRL_OBE)) #define VF6XX_PAD_PAD_125__SRC_RCON11 \ (_VF6XX_PAD_PAD_125__SRC_RCON11 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_125__LCD_64F6B_LCD20 \ @@ -3507,21 +3508,21 @@ typedef enum iomux_config { #define VF6XX_PAD_PAD_126__RGPIOC_GPIO126 \ (_VF6XX_PAD_PAD_126__RGPIOC_GPIO126 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_126__TCON0_DATA_OUT2 \ - (_VF6XX_PAD_PAD_126__TCON0_DATA_OUT2 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_126__TCON0_DATA_OUT2 | MUX_CTRL_PAD(VF6XX_PAD_CTRL_OBE)) #define VF6XX_PAD_PAD_126__LCD_64F6B_LCD21 \ (_VF6XX_PAD_PAD_126__LCD_64F6B_LCD21 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_127__RGPIOC_GPIO127 \ (_VF6XX_PAD_PAD_127__RGPIOC_GPIO127 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_127__TCON0_DATA_OUT3 \ - (_VF6XX_PAD_PAD_127__TCON0_DATA_OUT3 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_127__TCON0_DATA_OUT3 | MUX_CTRL_PAD(VF6XX_PAD_CTRL_OBE)) #define VF6XX_PAD_PAD_127__LCD_64F6B_LCD22 \ (_VF6XX_PAD_PAD_127__LCD_64F6B_LCD22 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_128__RGPIOC_GPIO128 \ (_VF6XX_PAD_PAD_128__RGPIOC_GPIO128 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_128__TCON0_DATA_OUT4 \ - (_VF6XX_PAD_PAD_128__TCON0_DATA_OUT4 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_128__TCON0_DATA_OUT4 | MUX_CTRL_PAD(VF6XX_PAD_CTRL_OBE)) #define VF6XX_PAD_PAD_128__SRC_RCON12 \ (_VF6XX_PAD_PAD_128__SRC_RCON12 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_128__LCD_64F6B_LCD23 \ @@ -3530,7 +3531,7 @@ typedef enum iomux_config { #define VF6XX_PAD_PAD_129__RGPIOC_GPIO129 \ (_VF6XX_PAD_PAD_129__RGPIOC_GPIO129 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_129__TCON0_DATA_OUT5 \ - (_VF6XX_PAD_PAD_129__TCON0_DATA_OUT5 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_129__TCON0_DATA_OUT5 | MUX_CTRL_PAD(VF6XX_PAD_CTRL_OBE)) #define VF6XX_PAD_PAD_129__SRC_RCON13 \ (_VF6XX_PAD_PAD_129__SRC_RCON13 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_129__LCD_64F6B_LCD24 \ @@ -3539,7 +3540,7 @@ typedef enum iomux_config { #define VF6XX_PAD_PAD_130__RGPIOC_GPIO130 \ (_VF6XX_PAD_PAD_130__RGPIOC_GPIO130 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_130__TCON0_DATA_OUT6 \ - (_VF6XX_PAD_PAD_130__TCON0_DATA_OUT6 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_130__TCON0_DATA_OUT6 | MUX_CTRL_PAD(VF6XX_PAD_CTRL_OBE)) #define VF6XX_PAD_PAD_130__SRC_RCON14 \ (_VF6XX_PAD_PAD_130__SRC_RCON14 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_130__LCD_64F6B_LCD25 \ @@ -3548,7 +3549,7 @@ typedef enum iomux_config { #define VF6XX_PAD_PAD_131__RGPIOC_GPIO131 \ (_VF6XX_PAD_PAD_131__RGPIOC_GPIO131 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_131__TCON0_DATA_OUT7 \ - (_VF6XX_PAD_PAD_131__TCON0_DATA_OUT7 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_131__TCON0_DATA_OUT7 | MUX_CTRL_PAD(VF6XX_PAD_CTRL_OBE)) #define VF6XX_PAD_PAD_131__SRC_RCON15 \ (_VF6XX_PAD_PAD_131__SRC_RCON15 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_131__LCD_64F6B_LCD26 \ @@ -3557,7 +3558,7 @@ typedef enum iomux_config { #define VF6XX_PAD_PAD_132__RGPIOC_GPIO132 \ (_VF6XX_PAD_PAD_132__RGPIOC_GPIO132 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_132__TCON0_DATA_OUT8 \ - (_VF6XX_PAD_PAD_132__TCON0_DATA_OUT8 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_132__TCON0_DATA_OUT8 | MUX_CTRL_PAD(VF6XX_PAD_CTRL_OBE)) #define VF6XX_PAD_PAD_132__SRC_RCON16 \ (_VF6XX_PAD_PAD_132__SRC_RCON16 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_132__LCD_64F6B_LCD27 \ @@ -3568,7 +3569,7 @@ typedef enum iomux_config { #define VF6XX_PAD_PAD_133__RGPIOC_GPIO133 \ (_VF6XX_PAD_PAD_133__RGPIOC_GPIO133 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_133__TCON0_DATA_OUT9 \ - (_VF6XX_PAD_PAD_133__TCON0_DATA_OUT9 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_133__TCON0_DATA_OUT9 | MUX_CTRL_PAD(VF6XX_PAD_CTRL_OBE)) #define VF6XX_PAD_PAD_133__SRC_RCON17 \ (_VF6XX_PAD_PAD_133__SRC_RCON17 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_133__LCD_64F6B_LCD28 \ @@ -3579,106 +3580,106 @@ typedef enum iomux_config { (_VF6XX_PAD_PAD_133__EWM_OUT | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_PAD_134__RGPIOC_GPIO134 \ - (_VF6XX_PAD_PAD_134__RGPIOC_GPIO134 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_PAD_134__RGPIOC_GPIO134 | MUX_CTRL_PAD(VF6XX_PAD_CTRL_IOBE)) #define VF6XX_PAD_PAD_134__VIDEO_IN0_PIX_CLK \ (_VF6XX_PAD_PAD_134__VIDEO_IN0_PIX_CLK | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_DDR_RESETB \ (_VF6XX_PAD_DDR_RESETB | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_DDR_A_15 \ - (_VF6XX_PAD_DDR_A_15 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_DDR_A_15 | MUX_CTRL_PAD(VF6XX_UBOOT_DDR_IOMUX)) /* from uboot */ #define VF6XX_PAD_DDR_A_14 \ - (_VF6XX_PAD_DDR_A_14 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_DDR_A_14 | MUX_CTRL_PAD(VF6XX_UBOOT_DDR_IOMUX)) /* from uboot */ #define VF6XX_PAD_DDR_A_13 \ - (_VF6XX_PAD_DDR_A_13 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_DDR_A_13 | MUX_CTRL_PAD(VF6XX_UBOOT_DDR_IOMUX)) /* from uboot */ #define VF6XX_PAD_DDR_A_12 \ - (_VF6XX_PAD_DDR_A_12 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_DDR_A_12 | MUX_CTRL_PAD(VF6XX_UBOOT_DDR_IOMUX)) /* from uboot */ #define VF6XX_PAD_DDR_A_11 \ - (_VF6XX_PAD_DDR_A_11 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_DDR_A_11 | MUX_CTRL_PAD(VF6XX_UBOOT_DDR_IOMUX)) /* from uboot */ #define VF6XX_PAD_DR_A_10 \ - (_VF6XX_PAD_DR_A_10 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_DR_A_10 | MUX_CTRL_PAD(VF6XX_UBOOT_DDR_IOMUX)) /* from uboot */ #define VF6XX_PAD_DDR_A_9 \ - (_VF6XX_PAD_DDR_A_9 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_DDR_A_9 | MUX_CTRL_PAD(VF6XX_UBOOT_DDR_IOMUX)) /* from uboot */ #define VF6XX_PAD_DDR_A_8 \ - (_VF6XX_PAD_DDR_A_8 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_DDR_A_8 | MUX_CTRL_PAD(VF6XX_UBOOT_DDR_IOMUX)) /* from uboot */ #define VF6XX_PAD_DDR_A_7 \ - (_VF6XX_PAD_DDR_A_7 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_DDR_A_7 | MUX_CTRL_PAD(VF6XX_UBOOT_DDR_IOMUX)) /* from uboot */ #define VF6XX_PAD_DDR_A_6 \ - (_VF6XX_PAD_DDR_A_6 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_DDR_A_6 | MUX_CTRL_PAD(VF6XX_UBOOT_DDR_IOMUX)) /* from uboot */ #define VF6XX_PAD_DDR_A_5 \ - (_VF6XX_PAD_DDR_A_5 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_DDR_A_5 | MUX_CTRL_PAD(VF6XX_UBOOT_DDR_IOMUX)) /* from uboot */ #define VF6XX_PAD_DDR_A_4 \ - (_VF6XX_PAD_DDR_A_4 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_DDR_A_4 | MUX_CTRL_PAD(VF6XX_UBOOT_DDR_IOMUX)) /* from uboot */ #define VF6XX_PAD_DDR_A_3 \ - (_VF6XX_PAD_DDR_A_3 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_DDR_A_3 | MUX_CTRL_PAD(VF6XX_UBOOT_DDR_IOMUX)) /* from uboot */ #define VF6XX_PAD_DDR_A_2 \ - (_VF6XX_PAD_DDR_A_2 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_DDR_A_2 | MUX_CTRL_PAD(VF6XX_UBOOT_DDR_IOMUX)) /* from uboot */ #define VF6XX_PAD_DDR_A_1 \ - (_VF6XX_PAD_DDR_A_1 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_DDR_A_1 | MUX_CTRL_PAD(VF6XX_UBOOT_DDR_IOMUX)) /* from uboot */ #define VF6XX_PAD_DDR_A_0 \ (_VF6XX_PAD_DDR_A_0 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_DDR_BA_2 \ - (_VF6XX_PAD_DDR_BA_2 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_DDR_BA_2 | MUX_CTRL_PAD(VF6XX_UBOOT_DDR_IOMUX)) /* from uboot */ #define VF6XX_PAD_DDR_BA_1 \ - (_VF6XX_PAD_DDR_BA_1 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_DDR_BA_1 | MUX_CTRL_PAD(VF6XX_UBOOT_DDR_IOMUX)) /* from uboot */ #define VF6XX_PAD_DDR_BA_0 \ - (_VF6XX_PAD_DDR_BA_0 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_DDR_BA_0 | MUX_CTRL_PAD(VF6XX_UBOOT_DDR_IOMUX)) /* from uboot */ #define VF6XX_PAD_DDR_CAS_B \ - (_VF6XX_PAD_DDR_CAS_B | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_DDR_CAS_B | MUX_CTRL_PAD(VF6XX_UBOOT_DDR_IOMUX)) /* from uboot */ #define VF6XX_PAD_DDR_CKE_0 \ - (_VF6XX_PAD_DDR_CKE_0 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_DDR_CKE_0 | MUX_CTRL_PAD(VF6XX_UBOOT_DDR_IOMUX)) /* from uboot */ #define VF6XX_PAD_DDR_CLK_0 \ - (_VF6XX_PAD_DDR_CLK_0 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_DDR_CLK_0 | MUX_CTRL_PAD(VF6XX_UBOOT_DDR_IOMUX1)) /* from uboot */ #define VF6XX_PAD_DDR_CS_B_0 \ - (_VF6XX_PAD_DDR_CS_B_0 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_DDR_CS_B_0 | MUX_CTRL_PAD(VF6XX_UBOOT_DDR_IOMUX)) /* from uboot */ #define VF6XX_PAD_DDR_CS_D_15 \ - (_VF6XX_PAD_DDR_CS_D_15 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_DDR_CS_D_15 | MUX_CTRL_PAD(VF6XX_UBOOT_DDR_IOMUX)) /* from uboot */ #define VF6XX_PAD_DDR_CS_D_14 \ - (_VF6XX_PAD_DDR_CS_D_14 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_DDR_CS_D_14 | MUX_CTRL_PAD(VF6XX_UBOOT_DDR_IOMUX)) /* from uboot */ #define VF6XX_PAD_DDR_CS_D_13 \ - (_VF6XX_PAD_DDR_CS_D_13 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_DDR_CS_D_13 | MUX_CTRL_PAD(VF6XX_UBOOT_DDR_IOMUX)) /* from uboot */ #define VF6XX_PAD_DDR_CS_D_12 \ - (_VF6XX_PAD_DDR_CS_D_12 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_DDR_CS_D_12 | MUX_CTRL_PAD(VF6XX_UBOOT_DDR_IOMUX)) /* from uboot */ #define VF6XX_PAD_DDR_CS_D_11 \ - (_VF6XX_PAD_DDR_CS_D_11 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_DDR_CS_D_11 | MUX_CTRL_PAD(VF6XX_UBOOT_DDR_IOMUX)) /* from uboot */ #define VF6XX_PAD_DDR_CS_D_10 \ - (_VF6XX_PAD_DDR_CS_D_10 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_DDR_CS_D_10 | MUX_CTRL_PAD(VF6XX_UBOOT_DDR_IOMUX)) /* from uboot */ #define VF6XX_PAD_DDR_CS_D_9 \ - (_VF6XX_PAD_DDR_CS_D_9 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_DDR_CS_D_9 | MUX_CTRL_PAD(VF6XX_UBOOT_DDR_IOMUX)) /* from uboot */ #define VF6XX_PAD_DDR_CS_D_8 \ - (_VF6XX_PAD_DDR_CS_D_8 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_DDR_CS_D_8 | MUX_CTRL_PAD(VF6XX_UBOOT_DDR_IOMUX)) /* from uboot */ #define VF6XX_PAD_DDR_CS_D_7 \ - (_VF6XX_PAD_DDR_CS_D_7 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_DDR_CS_D_7 | MUX_CTRL_PAD(VF6XX_UBOOT_DDR_IOMUX)) /* from uboot */ #define VF6XX_PAD_DDR_CS_D_6 \ - (_VF6XX_PAD_DDR_CS_D_6 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_DDR_CS_D_6 | MUX_CTRL_PAD(VF6XX_UBOOT_DDR_IOMUX)) /* from uboot */ #define VF6XX_PAD_DDR_CS_D_5 \ - (_VF6XX_PAD_DDR_CS_D_5 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_DDR_CS_D_5 | MUX_CTRL_PAD(VF6XX_UBOOT_DDR_IOMUX)) /* from uboot */ #define VF6XX_PAD_DDR_CS_D_4 \ - (_VF6XX_PAD_DDR_CS_D_4 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_DDR_CS_D_4 | MUX_CTRL_PAD(VF6XX_UBOOT_DDR_IOMUX)) /* from uboot */ #define VF6XX_PAD_DDR_CS_D_3 \ - (_VF6XX_PAD_DDR_CS_D_3 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_DDR_CS_D_3 | MUX_CTRL_PAD(VF6XX_UBOOT_DDR_IOMUX)) /* from uboot */ #define VF6XX_PAD_DDR_CS_D_2 \ - (_VF6XX_PAD_DDR_CS_D_2 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_DDR_CS_D_2 | MUX_CTRL_PAD(VF6XX_UBOOT_DDR_IOMUX)) /* from uboot */ #define VF6XX_PAD_DDR_CS_D_1 \ - (_VF6XX_PAD_DDR_CS_D_1 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_DDR_CS_D_1 | MUX_CTRL_PAD(VF6XX_UBOOT_DDR_IOMUX)) /* from uboot */ #define VF6XX_PAD_DDR_CS_D_0 \ - (_VF6XX_PAD_DDR_CS_D_0 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_DDR_CS_D_0 | MUX_CTRL_PAD(VF6XX_UBOOT_DDR_IOMUX)) /* from uboot */ #define VF6XX_PAD_DDR_DQM_1 \ - (_VF6XX_PAD_DDR_DQM_1 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_DDR_DQM_1 | MUX_CTRL_PAD(VF6XX_UBOOT_DDR_IOMUX)) /* from uboot */ #define VF6XX_PAD_DDR_DQM_0 \ - (_VF6XX_PAD_DDR_DQM_0 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_DDR_DQM_0 | MUX_CTRL_PAD(VF6XX_UBOOT_DDR_IOMUX)) /* from uboot */ #define VF6XX_PAD_DDR_DQS_1 \ - (_VF6XX_PAD_DDR_DQS_1 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_DDR_DQS_1 | MUX_CTRL_PAD(VF6XX_UBOOT_DDR_IOMUX1)) /* from uboot */ #define VF6XX_PAD_DDR_DQS_0 \ - (_VF6XX_PAD_DDR_DQS_0 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_DDR_DQS_0 | MUX_CTRL_PAD(VF6XX_UBOOT_DDR_IOMUX1)) /* from uboot */ #define VF6XX_PAD_DDR_RAS_B \ - (_VF6XX_PAD_DDR_RAS_B | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_DDR_RAS_B | MUX_CTRL_PAD(VF6XX_UBOOT_DDR_IOMUX)) /* from uboot */ #define VF6XX_PAD_DDR_WE_B \ - (_VF6XX_PAD_DDR_WE_B | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_DDR_WE_B | MUX_CTRL_PAD(VF6XX_UBOOT_DDR_IOMUX)) /* from uboot */ #define VF6XX_PAD_DDR_ODT_0 \ - (_VF6XX_PAD_DDR_ODT_0 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_DDR_ODT_0 | MUX_CTRL_PAD(VF6XX_UBOOT_DDR_IOMUX)) /* from uboot */ #define VF6XX_PAD_DDR_ODT_1 \ - (_VF6XX_PAD_DDR_ODT_1 | MUX_CTRL_PAD(NO_PAD_CTRL)) + (_VF6XX_PAD_DDR_ODT_1 | MUX_CTRL_PAD(VF6XX_UBOOT_DDR_IOMUX)) /* from uboot */ #define VF6XX_PAD_DUMMY_DDRBYTE1 \ (_VF6XX_PAD_DUMMY_DDRBYTE1 | MUX_CTRL_PAD(NO_PAD_CTRL)) #define VF6XX_PAD_DUMMY_DDRBYTE2 \ diff --git a/arch/arm/plat-mxc/include/mach/iomux-vmvf.h b/arch/arm/plat-mxc/include/mach/iomux-vmvf.h index 4b22a0bfa3d4..7bf3bbf6250e 100644..100755 --- a/arch/arm/plat-mxc/include/mach/iomux-vmvf.h +++ b/arch/arm/plat-mxc/include/mach/iomux-vmvf.h @@ -1,6 +1,9 @@ /* * based on arch/arm/plat-mxc/include/mach/iomux-v3.h * + * Copyright (C) 2009 by Jan Weitzel Phytec Messtechnik GmbH, + * <armlinux@phytec.de> + * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License * as published by the Free Software Foundation; either version 2 @@ -94,7 +97,8 @@ typedef u64 iomux_vmvf_cfg_t; #define MUX_CTL_PAD_DDR_TRIM_150PS (3 << 14) #define MUX_CTL_PAD_SPEED_LOW (0 << 12) -#define MUX_CTL_PAD_SPEED_MED (2 << 12) +#define MUX_CTL_PAD_SPEED_MED01 (1 << 12) +#define MUX_CTL_PAD_SPEED_MED10 (2 << 12) #define MUX_CTL_PAD_SPEED_HIGH (3 << 12) #define MUX_CTL_PAD_SRE_SLOW (0 << 11) |