update: global timer

5 files changed, 34 insertions, 46 deletions

diff --git a/arch/arm/include/asm/hardirq.h b/arch/arm/include/asm/hardirq.h
index 89ad1805e579..eb55ef11286a 100644
--- a/arch/arm/include/asm/hardirq.h
+++ b/arch/arm/include/asm/hardirq.h
@@ -15,6 +15,9 @@ typedef struct {
 #ifdef CONFIG_SMP
 	unsigned int ipi_irqs[NR_IPI];
 #endif
+#ifdef CONFIG_ARCH_MVF
+	unsigned int global_timer_irqs;
+#endif
 } ____cacheline_aligned irq_cpustat_t;
 
 #include <linux/irq_cpustat.h>	/* Standard mappings for irq_cpustat_t above */
diff --git a/arch/arm/kernel/irq.c b/arch/arm/kernel/irq.c
index 83bbad03fcc6..ac9ca03f219d 100644
--- a/arch/arm/kernel/irq.c
+++ b/arch/arm/kernel/irq.c
@@ -62,6 +62,9 @@ int arch_show_interrupts(struct seq_file *p, int prec)
 #ifdef CONFIG_LOCAL_TIMERS
 	show_local_irqs(p, prec);
 #endif
+#ifdef CONFIG_ARCH_MVF
+	show_global_timer_irqs(p, prec);
+#endif
 	seq_printf(p, "%*s: %10lu\n", prec, "Err", irq_err_count);
 	return 0;
 }
diff --git a/arch/arm/mach-mvf/clock.c b/arch/arm/mach-mvf/clock.c
index fdd0c2c05cb1..c1c0e8b9eafe 100644
--- a/arch/arm/mach-mvf/clock.c
+++ b/arch/arm/mach-mvf/clock.c
@@ -4018,6 +4018,7 @@ int __init mvf_clocks_init(unsigned long sirc, unsigned long firc,
 {
 	__iomem void *base;
 	int i;
+	struct clk *old_parent;
 
 	internal_low_reference = sirc;
 	internal_high_reference = firc;
@@ -4040,25 +4041,14 @@ int __init mvf_clocks_init(unsigned long sirc, unsigned long firc,
 	clk_enable(&ips_bus_clk);
 	clk_enable(&ddrc_clk);
 
-#if 1 //DEBUG
-	if (1) {
-		struct clk *old_parent = clk_get_parent(&enet_rmii_clk);
-#if 0
-		if (old_parent != &enet_clk)  {
-			clk_set_parent(&enet_rmii_clk, &enet_clk);
-			printk("*** rmii_clk:%ldHz -> %ldHz\n",
-				clk_get_rate(old_parent), clk_get_rate(&fec0_clk));
-#else
-		if (old_parent != &enet_ext)  {
-			clk_set_parent(&enet_rmii_clk, &enet_ext);
-			printk("*** rmii_clk:%ldHz -> %ldHz\n",
-				clk_get_rate(old_parent), clk_get_rate(&fec0_clk));
-#endif
-		} else {
-			printk("*** rmii_clk:%ldHz\n", clk_get_rate(&enet_rmii_clk));
-		}
-		printk("*** fec0_clk:%ldHz\n", clk_get_rate(&fec0_clk));
-	}
+	/* setup enet rmii clock 50MHz */
+	old_parent = clk_get_parent(&enet_rmii_clk);
+#if 1 //ENET PLL5 Main clock 50Mhz
+	if (old_parent != &enet_clk)
+		clk_set_parent(&enet_rmii_clk, &enet_clk);
+#else //ENET External clock 50MHz
+	if (old_parent != &enet_ext)
+		clk_set_parent(&enet_rmii_clk, &enet_ext);
 #endif
 
 	/* Disable un-necessary PFDs & PLLs */
diff --git a/arch/arm/plat-mxc/include/mach/irqs.h b/arch/arm/plat-mxc/include/mach/irqs.h
index 69575da022a4..16e42f29b52d 100644
--- a/arch/arm/plat-mxc/include/mach/irqs.h
+++ b/arch/arm/plat-mxc/include/mach/irqs.h
@@ -83,4 +83,9 @@ extern int imx_irq_set_priority(unsigned char irq, unsigned char prio);
 /* switch between IRQ and FIQ */
 extern int mxc_set_irq_fiq(unsigned int irq, unsigned int type);
 
+#ifdef CONFIG_ARCH_MVF
+struct seq_file;
+extern void show_global_timer_irqs(struct seq_file *, int);
+#endif
+
 #endif /* __ASM_ARCH_MXC_IRQS_H__ */
diff --git a/arch/arm/plat-mxc/mvf_time.c b/arch/arm/plat-mxc/mvf_time.c
index eb012a140d23..1c6657c55771 100644
--- a/arch/arm/plat-mxc/mvf_time.c
+++ b/arch/arm/plat-mxc/mvf_time.c
@@ -17,6 +17,7 @@
 #include <linux/clk.h>
 #include <linux/cpufreq.h>
 #include <linux/err.h>
+#include <linux/seq_file.h>
 
 #include <asm/sched_clock.h>
 #include <asm/hardware/gic.h>
@@ -131,54 +132,44 @@ static int mvf_set_next_event(unsigned long evt,
 	return 0;
 }
 
-#if 1
 asmlinkage void __exception_irq_entry do_global_timer(struct pt_regs *regs)
 {
 	struct pt_regs *old_regs = set_irq_regs(regs);
+	int cpu = smp_processor_id();
 	struct clock_event_device *evt = &clockevent_mvf;
 	u32 reg;
 
 	reg = __raw_readl(timer_base + GT_INT_STAT);
 	if (reg) {
 		mvf_timer_clear_int();
+		__inc_irq_stat(cpu, global_timer_irqs);
 		evt->event_handler(evt);
 	}
 
 	set_irq_regs(old_regs);
 	
 }
-#else
-static irqreturn_t mvf_timer_interrupt(int irq, void *dev_id)
+
+void show_global_timer_irqs(struct seq_file *p, int prec)
 {
-	struct clock_event_device *evt = &clockevent_mvf;
-	u32 reg;
+	unsigned int cpu;
 
-	reg = __raw_readl(timer_base + GT_INT_STAT);
-	if (reg) {
-		mvf_timer_clear_int();
-		evt->event_handler(evt);
-		return IRQ_HANDLED;
-	}
-	return IRQ_NONE;
-}
+	seq_printf(p, "%*s: ", prec, "GLOB");
 
-static struct irqaction mvf_timer_irq = {
-	.name		= "MVF Timer Tick",
-	.flags		= IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
-	.handler	= mvf_timer_interrupt,
-};
-#endif
+	for_each_present_cpu(cpu)
+		seq_printf(p, "%10u ", __get_irq_stat(cpu, global_timer_irqs));
+
+	seq_printf(p, " Global timer interrupts\n");
+}
 
 static struct clock_event_device clockevent_mvf = {
 	.name		= "mvf_timer",
-	.features	= CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, //FIXME
-	//.shift		= 32,	//FIXME
+	.features	= CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
 	.set_mode	= mvf_set_mode,
 	.set_next_event	= mvf_set_next_event,
-	.rating		= 350,	//FIXME
+	.rating		= 350,
 };
 
-
 /*
  * Setup the global clock events for a CPU.
  */
@@ -213,9 +204,5 @@ void __init mvf_timer_init(struct clk *timer_clk, void __iomem *base, int irq)
 					0xf, 0xffffffff);
 
 	/* Make sure our local interrupt controller has this enabled */
-#if 1
 	gic_enable_ppi(irq);
-#else
-	setup_irq(irq, &mvf_timer_irq);
-#endif
 }