fix: L2 Cache Probe

2 files changed, 45 insertions, 18 deletions

diff --git a/arch/arm/configs/twrvf600_defconfig b/arch/arm/configs/twrvf600_defconfig
index c71c6e3fe32a..99ecb2f7a3d7 100644
--- a/arch/arm/configs/twrvf600_defconfig
+++ b/arch/arm/configs/twrvf600_defconfig
@@ -244,6 +244,7 @@ CONFIG_ARCH_MXC=y
 # CONFIG_ARCH_OMAP is not set
 # CONFIG_PLAT_SPEAR is not set
 # CONFIG_ARCH_VT8500 is not set
+# CONFIG_KEYBOARD_GPIO_POLLED is not set
 CONFIG_IMX_HAVE_PLATFORM_FEC=y
 CONFIG_IMX_HAVE_PLATFORM_IMX_SNVS_RTC=y
 CONFIG_IMX_HAVE_PLATFORM_IMX_UART=y
@@ -311,14 +312,20 @@ CONFIG_ARM_THUMB=y
 # CONFIG_CPU_ICACHE_DISABLE is not set
 # CONFIG_CPU_DCACHE_DISABLE is not set
 # CONFIG_CPU_BPREDICT_DISABLE is not set
-# CONFIG_CACHE_L2X0 is not set
+CONFIG_OUTER_CACHE=y
+CONFIG_OUTER_CACHE_SYNC=y
+CONFIG_CACHE_L2X0=y
+CONFIG_CACHE_PL310=y
 CONFIG_ARM_L1_CACHE_SHIFT=5
 CONFIG_ARM_DMA_MEM_BUFFERABLE=y
 CONFIG_CPU_HAS_PMU=y
 # CONFIG_ARM_ERRATA_430973 is not set
 # CONFIG_ARM_ERRATA_458693 is not set
 # CONFIG_ARM_ERRATA_460075 is not set
+# CONFIG_PL310_ERRATA_588369 is not set
+# CONFIG_PL310_ERRATA_727915 is not set
 CONFIG_ARM_ERRATA_743622=y
+# CONFIG_ARM_ERRATA_753970 is not set
 CONFIG_ARM_ERRATA_754322=y
 CONFIG_ARM_GIC=y
 
@@ -328,6 +335,7 @@ CONFIG_ARM_GIC=y
 # CONFIG_PCI_SYSCALL is not set
 # CONFIG_ARCH_SUPPORTS_MSI is not set
 # CONFIG_PCCARD is not set
+# CONFIG_PL310_ERRATA_769419 is not set
 
 #
 # Kernel Features
@@ -382,7 +390,7 @@ CONFIG_ALIGNMENT_TRAP=y
 # CONFIG_USE_OF is not set
 CONFIG_ZBOOT_ROM_TEXT=0x0
 CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CMDLINE="noinitrd console=ttymvf1,115200n8 mem=128M ip=bootp root=/dev/nfs"
+CONFIG_CMDLINE="noinitrd console=ttymvf1,115200n8 mem=1536M ip=bootp root=/dev/nfs"
 CONFIG_CMDLINE_FROM_BOOTLOADER=y
 # CONFIG_CMDLINE_EXTEND is not set
 # CONFIG_CMDLINE_FORCE is not set
@@ -706,13 +714,24 @@ CONFIG_INPUT_POLLDEV=y
 #
 # CONFIG_INPUT_MOUSEDEV is not set
 # CONFIG_INPUT_JOYDEV is not set
-# CONFIG_INPUT_EVDEV is not set
+CONFIG_INPUT_EVDEV=y
 # CONFIG_INPUT_EVBUG is not set
 
 #
 # Input Device Drivers
 #
-# CONFIG_INPUT_KEYBOARD is not set
+CONFIG_INPUT_KEYBOARD=y
+CONFIG_KEYBOARD_ATKBD=y
+# CONFIG_KEYBOARD_LKKBD is not set
+CONFIG_KEYBOARD_GPIO=y
+# CONFIG_KEYBOARD_MATRIX is not set
+# CONFIG_KEYBOARD_IMX is not set
+# CONFIG_KEYBOARD_NEWTON is not set
+# CONFIG_KEYBOARD_OPENCORES is not set
+# CONFIG_KEYBOARD_STOWAWAY is not set
+# CONFIG_KEYBOARD_SUNKBD is not set
+# CONFIG_KEYBOARD_XTKBD is not set
+# CONFIG_KEYBOARD_MXC is not set
 # CONFIG_INPUT_MOUSE is not set
 # CONFIG_INPUT_JOYSTICK is not set
 # CONFIG_INPUT_TABLET is not set
@@ -722,7 +741,12 @@ CONFIG_INPUT_POLLDEV=y
 #
 # Hardware I/O ports
 #
-# CONFIG_SERIO is not set
+CONFIG_SERIO=y
+CONFIG_SERIO_SERPORT=y
+CONFIG_SERIO_LIBPS2=y
+# CONFIG_SERIO_RAW is not set
+# CONFIG_SERIO_ALTERA_PS2 is not set
+# CONFIG_SERIO_PS2MULT is not set
 # CONFIG_GAMEPORT is not set
 
 #
diff --git a/arch/arm/mach-mvf/mm.c b/arch/arm/mach-mvf/mm.c
index 2f963671031c..3f4a444a1c9d 100644
--- a/arch/arm/mach-mvf/mm.c
+++ b/arch/arm/mach-mvf/mm.c
@@ -67,20 +67,23 @@ void __init mvf_map_io(void)
 int mxc_init_l2x0(void)
 {
 	unsigned int val;
+	void * mscm = MVF_IO_ADDRESS(MVF_MSCM_BASE_ADDR);
 
-	writel(0x132, MVF_IO_ADDRESS(MVF_CA5_L2C_BASE_ADDR + L2X0_TAG_LATENCY_CTRL));
-	writel(0x132, MVF_IO_ADDRESS(MVF_CA5_L2C_BASE_ADDR + L2X0_DATA_LATENCY_CTRL));
-
-	val = readl(MVF_IO_ADDRESS(MVF_CA5_L2C_BASE_ADDR + L2X0_PREFETCH_CTRL));
-	val |= 0x40800000;
-	writel(val, MVF_IO_ADDRESS(MVF_CA5_L2C_BASE_ADDR + L2X0_PREFETCH_CTRL));
-	val = readl(MVF_IO_ADDRESS(MVF_CA5_L2C_BASE_ADDR + L2X0_POWER_CTRL));
-	val |= L2X0_DYNAMIC_CLK_GATING_EN;
-	val |= L2X0_STNDBY_MODE_EN;
-	writel(val, MVF_IO_ADDRESS(MVF_CA5_L2C_BASE_ADDR + L2X0_POWER_CTRL));
-
-	//l2x0_init(MVF_IO_ADDRESS(MVF_CA5_L2C_BASE_ADDR), 0x0, ~0x00000000);
-	l2x0_init(MVF_IO_ADDRESS(MVF_CA5_L2C_BASE_ADDR), 0x00060000, ~0x000F0000);
+	if ( __raw_readl(mscm + 0x14) >> 16) {
+		writel(0x132, MVF_IO_ADDRESS(MVF_CA5_L2C_BASE_ADDR + L2X0_TAG_LATENCY_CTRL));
+		writel(0x132, MVF_IO_ADDRESS(MVF_CA5_L2C_BASE_ADDR + L2X0_DATA_LATENCY_CTRL));
+		
+		val = readl(MVF_IO_ADDRESS(MVF_CA5_L2C_BASE_ADDR + L2X0_PREFETCH_CTRL));
+		val |= 0x40800000;
+		writel(val, MVF_IO_ADDRESS(MVF_CA5_L2C_BASE_ADDR + L2X0_PREFETCH_CTRL));
+		val = readl(MVF_IO_ADDRESS(MVF_CA5_L2C_BASE_ADDR + L2X0_POWER_CTRL));
+		val |= L2X0_DYNAMIC_CLK_GATING_EN;
+		val |= L2X0_STNDBY_MODE_EN;
+		writel(val, MVF_IO_ADDRESS(MVF_CA5_L2C_BASE_ADDR + L2X0_POWER_CTRL));
+		
+		//l2x0_init(MVF_IO_ADDRESS(MVF_CA5_L2C_BASE_ADDR), 0x0, ~0x00000000);
+		l2x0_init(MVF_IO_ADDRESS(MVF_CA5_L2C_BASE_ADDR), 0x00060000, ~0x000F0000);
+	}
 	return 0;
 }