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authorQuinn Jensen <quinn.jensen@freescale.com>2007-05-24 18:23:33 -0600
committerQuinn Jensen <quinn.jensen@freescale.com>2007-05-24 18:23:33 -0600
commit275b10c34dd17fbc7a1f297cd7e9cdf3a4582170 (patch)
treed9e5e94ec53ff9f9aa600e4d21089a3eb77cdf6d
parentbf5b43c760ebf7f2a5be171bddf55ace120e05e9 (diff)
CR ENGR00030367: Fix invalid gpio mode for cspi on imx31ads
Description: This patch fixes invalid GPIO mode settings for CSPI pins on i.MX31ADS. Since the CSPI pins on i.MX31ADS doesnot support GPIO mode, the gpio_spi_inactive() function does nothing. As a result, the CSPI pins retain its primary functional mode even after they are set to inactivate. http://www.bitshrine.org/gpp/linux-2.6.19.2-mx-spi_inactive.patch
-rw-r--r--arch/arm/mach-mx3/mx31ads_gpio.c51
1 files changed, 1 insertions, 50 deletions
diff --git a/arch/arm/mach-mx3/mx31ads_gpio.c b/arch/arm/mach-mx3/mx31ads_gpio.c
index 512c7398c5a5..4c956c8074cd 100644
--- a/arch/arm/mach-mx3/mx31ads_gpio.c
+++ b/arch/arm/mach-mx3/mx31ads_gpio.c
@@ -454,56 +454,7 @@ EXPORT_SYMBOL(gpio_owire_inactive);
*/
void gpio_spi_inactive(int cspi_mod)
{
- switch (cspi_mod) {
- case 0:
- /* SPI1 */
- mxc_request_iomux(MX31_PIN_CSPI1_MISO, OUTPUTCONFIG_GPIO,
- INPUTCONFIG_GPIO);
- mxc_request_iomux(MX31_PIN_CSPI1_MOSI, OUTPUTCONFIG_GPIO,
- INPUTCONFIG_GPIO);
- mxc_request_iomux(MX31_PIN_CSPI1_SCLK, OUTPUTCONFIG_GPIO,
- INPUTCONFIG_GPIO);
- mxc_request_iomux(MX31_PIN_CSPI1_SPI_RDY, OUTPUTCONFIG_GPIO,
- INPUTCONFIG_GPIO);
- mxc_request_iomux(MX31_PIN_CSPI1_SS0, OUTPUTCONFIG_GPIO,
- INPUTCONFIG_GPIO);
- mxc_request_iomux(MX31_PIN_CSPI1_SS1, OUTPUTCONFIG_GPIO,
- INPUTCONFIG_GPIO);
- mxc_request_iomux(MX31_PIN_CSPI1_SS2, OUTPUTCONFIG_GPIO,
- INPUTCONFIG_GPIO);
- break;
- case 1:
- /* SPI2 */
- mxc_request_iomux(MX31_PIN_CSPI2_MISO, OUTPUTCONFIG_GPIO,
- INPUTCONFIG_GPIO);
- mxc_request_iomux(MX31_PIN_CSPI2_MOSI, OUTPUTCONFIG_GPIO,
- INPUTCONFIG_GPIO);
- mxc_request_iomux(MX31_PIN_CSPI2_SCLK, OUTPUTCONFIG_GPIO,
- INPUTCONFIG_GPIO);
- mxc_request_iomux(MX31_PIN_CSPI2_SPI_RDY, OUTPUTCONFIG_GPIO,
- INPUTCONFIG_GPIO);
- mxc_request_iomux(MX31_PIN_CSPI2_SS0, OUTPUTCONFIG_GPIO,
- INPUTCONFIG_GPIO);
- mxc_request_iomux(MX31_PIN_CSPI2_SS1, OUTPUTCONFIG_GPIO,
- INPUTCONFIG_GPIO);
- mxc_request_iomux(MX31_PIN_CSPI2_SS2, OUTPUTCONFIG_GPIO,
- INPUTCONFIG_GPIO);
- break;
- case 2:
- /* SPI3 */
- /*
- mxc_request_iomux(MX31_PIN_CSPI2_MISO, OUTPUTCONFIG_GPIO, INPUTCONFIG_GPIO);
- mxc_request_iomux(MX31_PIN_CSPI2_MOSI, OUTPUTCONFIG_GPIO, INPUTCONFIG_GPIO);
- mxc_request_iomux(MX31_PIN_CSPI2_SCLK, OUTPUTCONFIG_GPIO, INPUTCONFIG_GPIO);
- mxc_request_iomux(MX31_PIN_CSPI2_SPI_RDY, OUTPUTCONFIG_GPIO, INPUTCONFIG_GPIO);
- mxc_request_iomux(MX31_PIN_CSPI2_SS0, OUTPUTCONFIG_GPIO, INPUTCONFIG_GPIO);
- mxc_request_iomux(MX31_PIN_CSPI2_SS1, OUTPUTCONFIG_GPIO, INPUTCONFIG_GPIO);
- mxc_request_iomux(MX31_PIN_CSPI2_SS2, OUTPUTCONFIG_GPIO, INPUTCONFIG_GPIO);
- */
- break;
- default:
- break;
- }
+ /* Do nothing as CSPI pins doesn't have/support GPIO mode */
}
/*!