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authorRanjani Vaidyanathan <ra5478@freescale.com>2011-03-22 15:04:01 -0500
committerAndy Voltz <andy.voltz@timesys.com>2011-06-01 13:21:07 -0400
commit45622833bb38dec3bac38f55632ebe7f7e1869eb (patch)
treeb5b8438b713e3d20743353d0073351defff52ca5
parent0775c6e5e57e6e87cd8a1b557e2fe07b7a7477fd (diff)
ENGR00140979: MX53: Update VDDGP voltages
Update the VDDGP voltages for the various supported frequencies to correspond to the latest characterized data. Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
-rw-r--r--arch/arm/mach-mx5/mx53_wp.c14
1 files changed, 7 insertions, 7 deletions
diff --git a/arch/arm/mach-mx5/mx53_wp.c b/arch/arm/mach-mx5/mx53_wp.c
index 342ba915560a..cd3939e4b185 100644
--- a/arch/arm/mach-mx5/mx53_wp.c
+++ b/arch/arm/mach-mx5/mx53_wp.c
@@ -73,7 +73,7 @@ static struct cpu_wp cpu_wp_aec[] = {
.mfd = 2,
.mfn = 1,
.cpu_podf = 0,
- .cpu_voltage = 1050000,},
+ .cpu_voltage = 1100000,},
};
/* working point for consumer 1G*/
@@ -86,7 +86,7 @@ static struct cpu_wp cpu_wp_ces[] = {
.mfd = 11,
.mfn = 5,
.cpu_podf = 0,
- .cpu_voltage = 1200000,},
+ .cpu_voltage = 1250000,},
{
.pll_rate = 800000000,
.cpu_rate = 800000000,
@@ -95,7 +95,7 @@ static struct cpu_wp cpu_wp_ces[] = {
.mfd = 2,
.mfn = 1,
.cpu_podf = 0,
- .cpu_voltage = 1050000,},
+ .cpu_voltage = 1100000,},
{
.pll_rate = 800000000,
.cpu_rate = 400000000,
@@ -113,7 +113,7 @@ static struct cpu_wp cpu_wp_ces[] = {
.mfd = 2,
.mfn = 1,
.cpu_podf = 4,
- .cpu_voltage = 900000,},
+ .cpu_voltage = 950000,},
};
/* working point for consumer 1.2G*/
@@ -135,7 +135,7 @@ static struct cpu_wp cpu_wp_ces_1_2g[] = {
.mfd = 11,
.mfn = 5,
.cpu_podf = 0,
- .cpu_voltage = 1200000,},
+ .cpu_voltage = 1250000,},
{
.pll_rate = 800000000,
.cpu_rate = 800000000,
@@ -144,7 +144,7 @@ static struct cpu_wp cpu_wp_ces_1_2g[] = {
.mfd = 2,
.mfn = 1,
.cpu_podf = 0,
- .cpu_voltage = 1050000,},
+ .cpu_voltage = 1100000,},
{
.pll_rate = 800000000,
.cpu_rate = 400000000,
@@ -158,7 +158,7 @@ static struct cpu_wp cpu_wp_ces_1_2g[] = {
.mfd = 2,
.mfn = 1,
.cpu_podf = 4,
- .cpu_voltage = 900000,},
+ .cpu_voltage = 950000,},
};
static struct dvfs_wp *mx53_get_dvfs_core_table(int *wp)