diff options
author | Rafael J. Wysocki <rafael.j.wysocki@intel.com> | 2015-08-24 23:09:17 +0200 |
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committer | Rafael J. Wysocki <rafael.j.wysocki@intel.com> | 2015-08-24 23:09:17 +0200 |
commit | c75b89ebff52f758e2559664b2ae3ceed410da30 (patch) | |
tree | 348a9ace1bec7989c2cb42819b2e0649cf1143e9 | |
parent | c13dcf9f2d6f5f06ef1bf79ec456df614c5e058b (diff) | |
parent | 493f133f47750aa5566fafa9403617e3f0506f8c (diff) |
Merge branch 'cpuidle' of https://git.kernel.org/pub/scm/linux/kernel/git/lenb/linux into pm-cpuidle
Pull intel_idle changes for v4.3 from Len Brown.
* 'cpuidle' of https://git.kernel.org/pub/scm/linux/kernel/git/lenb/linux:
intel_idle: Skylake Client Support
intel_idle: allow idle states to be freeze-mode specific
-rw-r--r-- | drivers/idle/intel_idle.c | 72 |
1 files changed, 71 insertions, 1 deletions
diff --git a/drivers/idle/intel_idle.c b/drivers/idle/intel_idle.c index 2a36a95d95cf..3a3738fe016b 100644 --- a/drivers/idle/intel_idle.c +++ b/drivers/idle/intel_idle.c @@ -591,6 +591,67 @@ static struct cpuidle_state bdw_cstates[] = { .enter = NULL } }; +static struct cpuidle_state skl_cstates[] = { + { + .name = "C1-SKL", + .desc = "MWAIT 0x00", + .flags = MWAIT2flg(0x00), + .exit_latency = 2, + .target_residency = 2, + .enter = &intel_idle, + .enter_freeze = intel_idle_freeze, }, + { + .name = "C1E-SKL", + .desc = "MWAIT 0x01", + .flags = MWAIT2flg(0x01), + .exit_latency = 10, + .target_residency = 20, + .enter = &intel_idle, + .enter_freeze = intel_idle_freeze, }, + { + .name = "C3-SKL", + .desc = "MWAIT 0x10", + .flags = MWAIT2flg(0x10) | CPUIDLE_FLAG_TLB_FLUSHED, + .exit_latency = 70, + .target_residency = 100, + .enter = &intel_idle, + .enter_freeze = intel_idle_freeze, }, + { + .name = "C6-SKL", + .desc = "MWAIT 0x20", + .flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TLB_FLUSHED, + .exit_latency = 75, + .target_residency = 200, + .enter = &intel_idle, + .enter_freeze = intel_idle_freeze, }, + { + .name = "C7s-SKL", + .desc = "MWAIT 0x33", + .flags = MWAIT2flg(0x33) | CPUIDLE_FLAG_TLB_FLUSHED, + .exit_latency = 124, + .target_residency = 800, + .enter = &intel_idle, + .enter_freeze = intel_idle_freeze, }, + { + .name = "C8-SKL", + .desc = "MWAIT 0x40", + .flags = MWAIT2flg(0x40) | CPUIDLE_FLAG_TLB_FLUSHED, + .exit_latency = 174, + .target_residency = 800, + .enter = &intel_idle, + .enter_freeze = intel_idle_freeze, }, + { + .name = "C10-SKL", + .desc = "MWAIT 0x60", + .flags = MWAIT2flg(0x60) | CPUIDLE_FLAG_TLB_FLUSHED, + .exit_latency = 890, + .target_residency = 5000, + .enter = &intel_idle, + .enter_freeze = intel_idle_freeze, }, + { + .enter = NULL } +}; + static struct cpuidle_state atom_cstates[] = { { .name = "C1E-ATM", @@ -810,6 +871,12 @@ static const struct idle_cpu idle_cpu_bdw = { .disable_promotion_to_c1e = true, }; +static const struct idle_cpu idle_cpu_skl = { + .state_table = skl_cstates, + .disable_promotion_to_c1e = true, +}; + + static const struct idle_cpu idle_cpu_avn = { .state_table = avn_cstates, .disable_promotion_to_c1e = true, @@ -844,6 +911,8 @@ static const struct x86_cpu_id intel_idle_ids[] __initconst = { ICPU(0x47, idle_cpu_bdw), ICPU(0x4f, idle_cpu_bdw), ICPU(0x56, idle_cpu_bdw), + ICPU(0x4e, idle_cpu_skl), + ICPU(0x5e, idle_cpu_skl), {} }; MODULE_DEVICE_TABLE(x86cpu, intel_idle_ids); @@ -965,7 +1034,8 @@ static int __init intel_idle_cpuidle_driver_init(void) for (cstate = 0; cstate < CPUIDLE_STATE_MAX; ++cstate) { int num_substates, mwait_hint, mwait_cstate; - if (cpuidle_state_table[cstate].enter == NULL) + if ((cpuidle_state_table[cstate].enter == NULL) && + (cpuidle_state_table[cstate].enter_freeze == NULL)) break; if (cstate + 1 > max_cstate) { |