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authorWill Deacon <will.deacon@arm.com>2015-03-26 15:09:20 +0000
committerWill Deacon <will.deacon@arm.com>2015-03-26 15:13:11 +0000
commit8ef320319592693f4a6286d80df210fd47b3e356 (patch)
treec25a982b539e212df97d21e55e56c79c8ddb6f29
parentfb094eb19900937322848beaf1a622c6afb6250b (diff)
ARM64 / ACPI: fix usage of acpi_map_gic_cpu_interface
acpi_parse_gic_cpu_interface calls acpi_map_gic_cpu_interface by both passing a 32-bit value in the u8 enabled parameter and then subsequently ignoring its return value. Sort it out. Reported-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
-rw-r--r--arch/arm64/kernel/acpi.c11
1 files changed, 5 insertions, 6 deletions
diff --git a/arch/arm64/kernel/acpi.c b/arch/arm64/kernel/acpi.c
index cd60329da8c4..07649e413244 100644
--- a/arch/arm64/kernel/acpi.c
+++ b/arch/arm64/kernel/acpi.c
@@ -103,9 +103,12 @@ void __init __acpi_unmap_table(char *map, unsigned long size)
*
* Returns the logical cpu number which maps to MPIDR
*/
-static int __init acpi_map_gic_cpu_interface(u64 mpidr, u8 enabled)
+static int __init
+acpi_map_gic_cpu_interface(struct acpi_madt_generic_interrupt *processor)
{
int i;
+ u64 mpidr = processor->arm_mpidr & MPIDR_HWID_BITMASK;
+ bool enabled = !!(processor->flags & ACPI_MADT_ENABLED);
if (mpidr == INVALID_HWID) {
pr_info("Skip MADT cpu entry with invalid MPIDR\n");
@@ -178,11 +181,7 @@ acpi_parse_gic_cpu_interface(struct acpi_subtable_header *header,
return -EINVAL;
acpi_table_print_madt_entry(header);
-
- acpi_map_gic_cpu_interface(processor->arm_mpidr & MPIDR_HWID_BITMASK,
- processor->flags & ACPI_MADT_ENABLED);
-
- return 0;
+ return acpi_map_gic_cpu_interface(processor);
}
/* Parse GIC cpu interface entries in MADT for SMP init */