diff options
author | Sifan Naeem <sifan.naeem@imgtec.com> | 2015-04-06 14:29:06 -0700 |
---|---|---|
committer | Mark Brown <broonie@kernel.org> | 2015-04-08 11:35:54 +0100 |
commit | ede8342bf63166e8d8fc3c05fc0985b27cc8186b (patch) | |
tree | 372bd0c2545b114affa74d01fb99506312bb8342 | |
parent | b6fe39770aa63d14129bc7e061c95cfc3cb1419a (diff) |
spi: img-spfi: Setup TRANSACTION register before CONTROL register
Setting the transfer length in the TRANSACTION register after the
CONTROL register is programmed causes intermittent timeout issues in
SPFI transfers when using the SPI framework to control the CS GPIO
lines. To avoid this issue, set transfer length before programming
the CONTROL register.
Signed-off-by: Sifan Naeem <sifan.naeem@imgtec.com>
Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
-rw-r--r-- | drivers/spi/spi-img-spfi.c | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/drivers/spi/spi-img-spfi.c b/drivers/spi/spi-img-spfi.c index 642259e88429..6c6ae4a9401a 100644 --- a/drivers/spi/spi-img-spfi.c +++ b/drivers/spi/spi-img-spfi.c @@ -434,6 +434,9 @@ static void img_spfi_config(struct spi_master *master, struct spi_device *spi, val |= div << SPFI_DEVICE_PARAMETER_BITCLK_SHIFT; spfi_writel(spfi, val, SPFI_DEVICE_PARAMETER(spi->chip_select)); + spfi_writel(spfi, xfer->len << SPFI_TRANSACTION_TSIZE_SHIFT, + SPFI_TRANSACTION); + val = spfi_readl(spfi, SPFI_CONTROL); val &= ~(SPFI_CONTROL_SEND_DMA | SPFI_CONTROL_GET_DMA); if (xfer->tx_buf) @@ -452,8 +455,6 @@ static void img_spfi_config(struct spi_master *master, struct spi_device *spi, &master->cur_msg->transfers)) val |= SPFI_CONTROL_CONTINUE; spfi_writel(spfi, val, SPFI_CONTROL); - spfi_writel(spfi, xfer->len << SPFI_TRANSACTION_TSIZE_SHIFT, - SPFI_TRANSACTION); } static int img_spfi_transfer_one(struct spi_master *master, |